blob: d62d50d8361325f77e3a42f6eb602827bb5c1290 [file] [log] [blame]
Krzysztof Parzyszek66dd6792016-08-19 14:29:43 +00001; RUN: llc -march=hexagon < %s
2; REQUIRES: asserts
3
4; Test that the HexagonExpandCondsets pass does not assert due to
5; attempting to shrink a live interval incorrectly.
6
7
8define void @test() #0 {
9entry:
10 br i1 undef, label %cleanup, label %if.end
11
12if.end:
13 %0 = load i32, i32* undef, align 4
14 %sext = shl i32 %0, 16
15 %conv19 = ashr exact i32 %sext, 16
16 br i1 undef, label %cleanup, label %for.body.lr.ph
17
18for.body.lr.ph:
19 br label %for.body
20
21for.body:
22 %bestScoreL16Q4.0278 = phi i16 [ 32767, %for.body.lr.ph ], [ %.sink, %early_termination ]
23 br i1 false, label %for.body44.lr.ph, label %for.cond90.preheader
24
25for.body44.lr.ph:
26 %conv77 = sext i16 %bestScoreL16Q4.0278 to i32
27 unreachable
28
29for.cond90.preheader:
30 br i1 undef, label %early_termination, label %for.body97
31
32for.body97:
33 br i1 undef, label %for.body97, label %early_termination
34
35early_termination:
36 %.sink = select i1 undef, i16 undef, i16 %bestScoreL16Q4.0278
37 %cmp27 = icmp slt i32 undef, %conv19
38 br i1 %cmp27, label %for.body, label %for.end124
39
40for.end124:
41 unreachable
42
43cleanup:
44 ret void
45}
46
47attributes #0 = { nounwind "target-cpu"="hexagonv60" }