| Krzysztof Parzyszek | 046090d | 2018-03-12 14:01:28 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon < %s |
| 2 | ; REQUIRES: asserts |
| 3 | |
| 4 | target triple = "hexagon" |
| 5 | |
| 6 | %s.0 = type { i32, i32, [10 x %s.1] } |
| 7 | %s.1 = type { [4 x i32] } |
| 8 | %s.2 = type { i128 } |
| 9 | |
| 10 | @g0 = external global %s.0* |
| 11 | |
| 12 | ; Function Attrs: nounwind ssp |
| 13 | define void @f0(%s.2* nocapture %a0, i32 %a1) #0 { |
| 14 | b0: |
| 15 | %v0 = getelementptr inbounds %s.2, %s.2* %a0, i32 0, i32 0 |
| 16 | br label %b1 |
| 17 | |
| 18 | b1: ; preds = %b4, %b3, %b0 |
| 19 | %v1 = phi i32 [ 0, %b0 ], [ %v14, %b4 ], [ %v13, %b3 ] |
| 20 | switch i32 %v1, label %b4 [ |
| 21 | i32 0, label %b3 |
| 22 | i32 1, label %b2 |
| 23 | ] |
| 24 | |
| 25 | b2: ; preds = %b1 |
| 26 | br label %b3 |
| 27 | |
| 28 | b3: ; preds = %b2, %b1 |
| 29 | %v2 = phi i32 [ 1, %b2 ], [ 0, %b1 ] |
| 30 | %v3 = phi i128 [ 64, %b2 ], [ 32, %b1 ] |
| 31 | %v4 = phi i128 [ -79228162495817593519834398721, %b2 ], [ -18446744069414584321, %b1 ] |
| 32 | %v5 = load %s.0*, %s.0** @g0, align 4 |
| 33 | %v6 = getelementptr inbounds %s.0, %s.0* %v5, i32 0, i32 2, i32 %a1, i32 0, i32 %v2 |
| 34 | %v7 = load i32, i32* %v6, align 4 |
| 35 | %v8 = zext i32 %v7 to i128 |
| 36 | %v9 = load i128, i128* %v0, align 4 |
| 37 | %v10 = shl nuw nsw i128 %v8, %v3 |
| 38 | %v11 = and i128 %v9, %v4 |
| 39 | %v12 = or i128 %v11, %v10 |
| 40 | store i128 %v12, i128* %v0, align 4 |
| 41 | %v13 = add i32 %v1, 1 |
| 42 | br label %b1 |
| 43 | |
| 44 | b4: ; preds = %b1 |
| 45 | %v14 = add i32 %v1, 1 |
| 46 | %v15 = icmp eq i32 %v14, 4 |
| 47 | br i1 %v15, label %b5, label %b1 |
| 48 | |
| 49 | b5: ; preds = %b4 |
| 50 | ret void |
| 51 | } |
| 52 | |
| 53 | ; Function Attrs: nounwind ssp |
| 54 | define void @f1(%s.2* nocapture %a0, i32 %a1) #0 { |
| 55 | b0: |
| 56 | %v0 = getelementptr inbounds %s.2, %s.2* %a0, i32 0, i32 0 |
| 57 | br label %b1 |
| 58 | |
| 59 | b1: ; preds = %b5, %b4, %b0 |
| 60 | %v1 = phi i32 [ 0, %b0 ], [ %v20, %b5 ], [ %v19, %b4 ] |
| 61 | switch i32 %v1, label %b5 [ |
| 62 | i32 0, label %b2 |
| 63 | i32 1, label %b3 |
| 64 | ] |
| 65 | |
| 66 | b2: ; preds = %b1 |
| 67 | %v2 = load %s.0*, %s.0** @g0, align 4 |
| 68 | %v3 = getelementptr inbounds %s.0, %s.0* %v2, i32 0, i32 2, i32 %a1, i32 0, i32 0 |
| 69 | %v4 = load i32, i32* %v3, align 4 |
| 70 | %v5 = zext i32 %v4 to i128 |
| 71 | %v6 = load i128, i128* %v0, align 4 |
| 72 | %v7 = shl nuw nsw i128 %v5, 32 |
| 73 | %v8 = and i128 %v6, -18446744069414584321 |
| 74 | %v9 = or i128 %v8, %v7 |
| 75 | br label %b4 |
| 76 | |
| 77 | b3: ; preds = %b1 |
| 78 | %v10 = load %s.0*, %s.0** @g0, align 4 |
| 79 | %v11 = getelementptr inbounds %s.0, %s.0* %v10, i32 0, i32 2, i32 %a1, i32 0, i32 1 |
| 80 | %v12 = load i32, i32* %v11, align 4 |
| 81 | %v13 = zext i32 %v12 to i128 |
| 82 | %v14 = load i128, i128* %v0, align 4 |
| 83 | %v15 = shl nuw nsw i128 %v13, 64 |
| 84 | %v16 = and i128 %v14, -79228162495817593519834398721 |
| 85 | %v17 = or i128 %v16, %v15 |
| 86 | br label %b4 |
| 87 | |
| 88 | b4: ; preds = %b3, %b2 |
| 89 | %v18 = phi i128 [ %v17, %b3 ], [ %v9, %b2 ] |
| 90 | store i128 %v18, i128* %v0, align 4 |
| 91 | %v19 = add i32 %v1, 1 |
| 92 | br label %b1 |
| 93 | |
| 94 | b5: ; preds = %b1 |
| 95 | %v20 = add i32 %v1, 1 |
| 96 | %v21 = icmp eq i32 %v20, 4 |
| 97 | br i1 %v21, label %b6, label %b1 |
| 98 | |
| 99 | b6: ; preds = %b5 |
| 100 | ret void |
| 101 | } |
| 102 | |
| 103 | attributes #0 = { nounwind ssp } |