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Krzysztof Parzyszek545a68c2018-12-05 21:01:07 +00001; RUN: llc -march=hexagon < %s | FileCheck %s
2; This test validates the generation of v66 only instruction M2_mnaci
3; CHECK: r{{[0-9]+}} -= mpyi(r{{[0-9]+}},r{{[0-9]+}})
4
5target triple = "hexagon-unknown--elf"
6
7; Function Attrs: norecurse nounwind readnone
8define i32 @_Z4testiii(i32 %a, i32 %b, i32 %c) #0 {
9entry:
10 %mul = mul nsw i32 %c, %b
11 %sub = sub nsw i32 %a, %mul
12 ret i32 %sub
13}
14
15attributes #0 = { norecurse nounwind readnone "target-cpu"="hexagonv66" "target-features"="-hvx,-long-calls" }