blob: bd2ddec14fcaa867ff2bed8cd5ec03d06121bb99 [file] [log] [blame]
Krzysztof Parzyszek046090d2018-03-12 14:01:28 +00001; RUN: llc -march=hexagon -O2 < %s
2; REQUIRES: asserts
3; Expect successful compilation.
4
5target triple = "hexagon"
6
7; Function Attrs: nounwind optsize
8define void @f0(i32* nocapture %a0, i8* %a1) #0 {
9b0:
10 call void @llvm.hexagon.prefetch(i8* %a1)
11 store i32 0, i32* %a0, align 4, !tbaa !0
12 ret void
13}
14
15; Function Attrs: nounwind
16declare void @llvm.hexagon.prefetch(i8*) #1
17
18attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }
19attributes #1 = { nounwind }
20
21!0 = !{!1, !1, i64 0}
22!1 = !{!"int", !2, i64 0}
23!2 = !{!"omnipotent char", !3, i64 0}
24!3 = !{!"Simple C/C++ TBAA"}