Krzysztof Parzyszek | 4094ab7 | 2018-03-20 19:35:09 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon -enable-pipeliner -pipeliner-max-stages=2 -disable-packetizer < %s | FileCheck %s |
| 2 | |
| 3 | ; Test that the early start and late start values are computed correctly |
| 4 | ; when a Phi depends on another Phi. In this case, they should occur in |
| 5 | ; the same stage. |
| 6 | |
| 7 | ; CHECK-DAG: [[REG3:(r[0-9]+)]] = add([[REG1:(r[0-9]+)]],#-1) |
| 8 | ; CHECK-DAG: [[REG2:(r[0-9]+)]] = add([[REG1]],#-1) |
| 9 | ; CHECK-DAG: loop0(.LBB0_[[LOOP:.]],[[REG3]]) |
| 10 | ; CHECK-NOT: = [[REG2]] |
| 11 | ; CHECK: .LBB0_[[LOOP]]: |
| 12 | ; CHECK: }{{[ \t]*}}:endloop |
| 13 | |
| 14 | ; Function Attrs: nounwind |
| 15 | define void @f0(i32 %a0, i16* nocapture %a1) #0 { |
| 16 | b0: |
| 17 | br i1 undef, label %b1, label %b2 |
| 18 | |
| 19 | b1: ; preds = %b0 |
| 20 | %v0 = add nsw i32 undef, -8 |
| 21 | br i1 undef, label %b3, label %b2 |
| 22 | |
| 23 | b2: ; preds = %b2, %b1, %b0 |
| 24 | %v1 = phi i32 [ %v7, %b2 ], [ undef, %b0 ], [ %v0, %b1 ] |
| 25 | %v2 = phi i32 [ %v1, %b2 ], [ %a0, %b0 ], [ undef, %b1 ] |
| 26 | %v3 = add nsw i32 %v2, -2 |
| 27 | %v4 = getelementptr inbounds i16, i16* %a1, i32 %v3 |
| 28 | %v5 = load i16, i16* %v4, align 2, !tbaa !0 |
| 29 | %v6 = getelementptr inbounds i16, i16* %a1, i32 %v1 |
| 30 | store i16 %v5, i16* %v6, align 2, !tbaa !0 |
| 31 | %v7 = add nsw i32 %v1, -1 |
| 32 | %v8 = icmp sgt i32 %v7, 0 |
| 33 | br i1 %v8, label %b2, label %b3 |
| 34 | |
| 35 | b3: ; preds = %b2, %b1 |
| 36 | ret void |
| 37 | } |
| 38 | |
| 39 | attributes #0 = { nounwind "target-cpu"="hexagonv55" } |
| 40 | |
| 41 | !0 = !{!1, !1, i64 0} |
| 42 | !1 = !{!"short", !2, i64 0} |
| 43 | !2 = !{!"omnipotent char", !3, i64 0} |
| 44 | !3 = !{!"Simple C/C++ TBAA"} |