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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / Mips / analyzebranch.ll
blob: f6bc32a2b785926fd4d0f60026369844c119bbd0 [file] [log] [blame]
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=mips-unknown-linux-gnu -mcpu=mips32 < %s | FileCheck %s -check-prefixes=MIPS32
3; RUN: llc -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=MIPS32R2
4; RUN: llc -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 < %s | FileCheck %s -check-prefixes=MIPS32r6
5; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 < %s | FileCheck %s -check-prefixes=MIPS4
6; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 < %s | FileCheck %s -check-prefixes=MIPS64
7; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 < %s | FileCheck %s -check-prefixes=MIPS64R2
8; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 < %s | FileCheck %s -check-prefixes=MIPS64R6
Akira Hatanaka93f898f2011-04-01 17:39:08 +0000[diff] [blame]9
10define double @foo(double %a, double %b) nounwind readnone {
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]11; MIPS32-LABEL: foo:
12; MIPS32: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]13; MIPS32-NEXT: mtc1 $zero, $f2
14; MIPS32-NEXT: mtc1 $zero, $f3
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]15; MIPS32-NEXT: c.ule.d $f12, $f2
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]16; MIPS32-NEXT: bc1f $BB0_2
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]17; MIPS32-NEXT: mov.d $f0, $f12
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]18; MIPS32-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]19; MIPS32-NEXT: mtc1 $zero, $f0
20; MIPS32-NEXT: mtc1 $zero, $f1
21; MIPS32-NEXT: c.ule.d $f14, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]22; MIPS32-NEXT: bc1t $BB0_3
23; MIPS32-NEXT: nop
24; MIPS32-NEXT: $BB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]25; MIPS32-NEXT: sub.d $f0, $f14, $f0
26; MIPS32-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]27; MIPS32-NEXT: $BB0_3: # %return
28; MIPS32-NEXT: jr $ra
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]29; MIPS32-NEXT: nop
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]30;
31; MIPS32R2-LABEL: foo:
32; MIPS32R2: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]33; MIPS32R2-NEXT: mov.d $f0, $f12
34; MIPS32R2-NEXT: mtc1 $zero, $f2
35; MIPS32R2-NEXT: mthc1 $zero, $f2
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]36; MIPS32R2-NEXT: c.ule.d $f12, $f2
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]37; MIPS32R2-NEXT: bc1f $BB0_2
38; MIPS32R2-NEXT: nop
39; MIPS32R2-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]40; MIPS32R2-NEXT: mtc1 $zero, $f0
41; MIPS32R2-NEXT: mthc1 $zero, $f0
42; MIPS32R2-NEXT: c.ule.d $f14, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]43; MIPS32R2-NEXT: bc1t $BB0_3
44; MIPS32R2-NEXT: nop
45; MIPS32R2-NEXT: $BB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]46; MIPS32R2-NEXT: sub.d $f0, $f14, $f0
47; MIPS32R2-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]48; MIPS32R2-NEXT: $BB0_3: # %return
49; MIPS32R2-NEXT: jr $ra
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]50; MIPS32R2-NEXT: nop
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]51;
52; MIPS32r6-LABEL: foo:
53; MIPS32r6: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]54; MIPS32r6-NEXT: mov.d $f0, $f12
55; MIPS32r6-NEXT: mtc1 $zero, $f1
56; MIPS32r6-NEXT: mthc1 $zero, $f1
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]57; MIPS32r6-NEXT: cmp.lt.d $f1, $f1, $f12
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]58; MIPS32r6-NEXT: mfc1 $1, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]59; MIPS32r6-NEXT: andi $1, $1, 1
60; MIPS32r6-NEXT: bnezc $1, $BB0_2
61; MIPS32r6-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]62; MIPS32r6-NEXT: mtc1 $zero, $f0
63; MIPS32r6-NEXT: mthc1 $zero, $f0
64; MIPS32r6-NEXT: cmp.ule.d $f1, $f14, $f0
65; MIPS32r6-NEXT: mfc1 $1, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]66; MIPS32r6-NEXT: andi $1, $1, 1
67; MIPS32r6-NEXT: bnezc $1, $BB0_3
68; MIPS32r6-NEXT: $BB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]69; MIPS32r6-NEXT: sub.d $f0, $f14, $f0
70; MIPS32r6-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]71; MIPS32r6-NEXT: $BB0_3: # %return
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]72; MIPS32r6-NEXT: jrc $ra
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]73;
74; MIPS4-LABEL: foo:
75; MIPS4: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]76; MIPS4-NEXT: dmtc1 $zero, $f1
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]77; MIPS4-NEXT: c.ule.d $f12, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]78; MIPS4-NEXT: bc1f .LBB0_2
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]79; MIPS4-NEXT: mov.d $f0, $f12
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]80; MIPS4-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]81; MIPS4-NEXT: dmtc1 $zero, $f0
82; MIPS4-NEXT: c.ule.d $f13, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]83; MIPS4-NEXT: bc1t .LBB0_3
84; MIPS4-NEXT: nop
85; MIPS4-NEXT: .LBB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]86; MIPS4-NEXT: sub.d $f0, $f13, $f0
87; MIPS4-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]88; MIPS4-NEXT: .LBB0_3: # %return
89; MIPS4-NEXT: jr $ra
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]90; MIPS4-NEXT: nop
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]91;
92; MIPS64-LABEL: foo:
93; MIPS64: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]94; MIPS64-NEXT: dmtc1 $zero, $f1
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]95; MIPS64-NEXT: c.ule.d $f12, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]96; MIPS64-NEXT: bc1f .LBB0_2
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]97; MIPS64-NEXT: mov.d $f0, $f12
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]98; MIPS64-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]99; MIPS64-NEXT: dmtc1 $zero, $f0
100; MIPS64-NEXT: c.ule.d $f13, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]101; MIPS64-NEXT: bc1t .LBB0_3
102; MIPS64-NEXT: nop
103; MIPS64-NEXT: .LBB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]104; MIPS64-NEXT: sub.d $f0, $f13, $f0
105; MIPS64-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]106; MIPS64-NEXT: .LBB0_3: # %return
107; MIPS64-NEXT: jr $ra
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]108; MIPS64-NEXT: nop
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]109;
110; MIPS64R2-LABEL: foo:
111; MIPS64R2: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]112; MIPS64R2-NEXT: dmtc1 $zero, $f1
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]113; MIPS64R2-NEXT: c.ule.d $f12, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]114; MIPS64R2-NEXT: bc1f .LBB0_2
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]115; MIPS64R2-NEXT: mov.d $f0, $f12
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]116; MIPS64R2-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]117; MIPS64R2-NEXT: dmtc1 $zero, $f0
118; MIPS64R2-NEXT: c.ule.d $f13, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]119; MIPS64R2-NEXT: bc1t .LBB0_3
120; MIPS64R2-NEXT: nop
121; MIPS64R2-NEXT: .LBB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]122; MIPS64R2-NEXT: sub.d $f0, $f13, $f0
123; MIPS64R2-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]124; MIPS64R2-NEXT: .LBB0_3: # %return
125; MIPS64R2-NEXT: jr $ra
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]126; MIPS64R2-NEXT: nop
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]127;
128; MIPS64R6-LABEL: foo:
129; MIPS64R6: # %bb.0: # %entry
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]130; MIPS64R6-NEXT: dmtc1 $zero, $f1
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]131; MIPS64R6-NEXT: cmp.lt.d $f1, $f1, $f12
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]132; MIPS64R6-NEXT: mfc1 $1, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]133; MIPS64R6-NEXT: andi $1, $1, 1
Geoff Berrya2b90112018-02-27 16:59:10 +0000[diff] [blame]134; MIPS64R6-NEXT: bnez $1, .LBB0_2
135; MIPS64R6-NEXT: mov.d $f0, $f12
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]136; MIPS64R6-NEXT: # %bb.1: # %if.else
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]137; MIPS64R6-NEXT: dmtc1 $zero, $f0
138; MIPS64R6-NEXT: cmp.ule.d $f1, $f13, $f0
139; MIPS64R6-NEXT: mfc1 $1, $f1
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]140; MIPS64R6-NEXT: andi $1, $1, 1
141; MIPS64R6-NEXT: bnezc $1, .LBB0_3
142; MIPS64R6-NEXT: .LBB0_2: # %if.end6
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]143; MIPS64R6-NEXT: sub.d $f0, $f13, $f0
144; MIPS64R6-NEXT: add.d $f0, $f0, $f0
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]145; MIPS64R6-NEXT: .LBB0_3: # %return
Jonas Paulsson07d6aea2018-02-23 08:30:15 +0000[diff] [blame]146; MIPS64R6-NEXT: jrc $ra
Akira Hatanaka93f898f2011-04-01 17:39:08 +0000[diff] [blame]147entry:
Akira Hatanaka93f898f2011-04-01 17:39:08 +0000[diff] [blame]148 %cmp = fcmp ogt double %a, 0.000000e+00
149 br i1 %cmp, label %if.end6, label %if.else
150
151if.else: ; preds = %entry
152 %cmp3 = fcmp ogt double %b, 0.000000e+00
153 br i1 %cmp3, label %if.end6, label %return
154
155if.end6: ; preds = %if.else, %entry
156 %c.0 = phi double [ %a, %entry ], [ 0.000000e+00, %if.else ]
157 %sub = fsub double %b, %c.0
158 %mul = fmul double %sub, 2.000000e+00
159 br label %return
160
161return: ; preds = %if.else, %if.end6
162 %retval.0 = phi double [ %mul, %if.end6 ], [ 0.000000e+00, %if.else ]
163 ret double %retval.0
164}
165
166define void @f1(float %f) nounwind {
Simon Dardis16596472018-02-22 11:53:01 +0000[diff] [blame]167; MIPS32-LABEL: f1:
168; MIPS32: # %bb.0: # %entry
169; MIPS32-NEXT: addiu $sp, $sp, -24
170; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
171; MIPS32-NEXT: mtc1 $zero, $f0
172; MIPS32-NEXT: c.eq.s $f12, $f0
173; MIPS32-NEXT: bc1f $BB1_2
174; MIPS32-NEXT: nop
175; MIPS32-NEXT: # %bb.1: # %if.end
176; MIPS32-NEXT: jal f2
177; MIPS32-NEXT: nop
178; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
179; MIPS32-NEXT: jr $ra
180; MIPS32-NEXT: addiu $sp, $sp, 24
181; MIPS32-NEXT: $BB1_2: # %if.then
182; MIPS32-NEXT: jal abort
183; MIPS32-NEXT: nop
184;
185; MIPS32R2-LABEL: f1:
186; MIPS32R2: # %bb.0: # %entry
187; MIPS32R2-NEXT: addiu $sp, $sp, -24
188; MIPS32R2-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
189; MIPS32R2-NEXT: mtc1 $zero, $f0
190; MIPS32R2-NEXT: c.eq.s $f12, $f0
191; MIPS32R2-NEXT: bc1f $BB1_2
192; MIPS32R2-NEXT: nop
193; MIPS32R2-NEXT: # %bb.1: # %if.end
194; MIPS32R2-NEXT: jal f2
195; MIPS32R2-NEXT: nop
196; MIPS32R2-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
197; MIPS32R2-NEXT: jr $ra
198; MIPS32R2-NEXT: addiu $sp, $sp, 24
199; MIPS32R2-NEXT: $BB1_2: # %if.then
200; MIPS32R2-NEXT: jal abort
201; MIPS32R2-NEXT: nop
202;
203; MIPS32r6-LABEL: f1:
204; MIPS32r6: # %bb.0: # %entry
205; MIPS32r6-NEXT: addiu $sp, $sp, -24
206; MIPS32r6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
207; MIPS32r6-NEXT: mtc1 $zero, $f0
208; MIPS32r6-NEXT: cmp.eq.s $f0, $f12, $f0
209; MIPS32r6-NEXT: mfc1 $1, $f0
210; MIPS32r6-NEXT: andi $1, $1, 1
211; MIPS32r6-NEXT: beqzc $1, $BB1_2
212; MIPS32r6-NEXT: nop
213; MIPS32r6-NEXT: # %bb.1: # %if.end
214; MIPS32r6-NEXT: jal f2
215; MIPS32r6-NEXT: nop
216; MIPS32r6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
217; MIPS32r6-NEXT: jr $ra
218; MIPS32r6-NEXT: addiu $sp, $sp, 24
219; MIPS32r6-NEXT: $BB1_2: # %if.then
220; MIPS32r6-NEXT: jal abort
221; MIPS32r6-NEXT: nop
222;
223; MIPS4-LABEL: f1:
224; MIPS4: # %bb.0: # %entry
225; MIPS4-NEXT: daddiu $sp, $sp, -16
226; MIPS4-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
227; MIPS4-NEXT: mtc1 $zero, $f0
228; MIPS4-NEXT: c.eq.s $f12, $f0
229; MIPS4-NEXT: bc1f .LBB1_2
230; MIPS4-NEXT: nop
231; MIPS4-NEXT: # %bb.1: # %if.end
232; MIPS4-NEXT: jal f2
233; MIPS4-NEXT: nop
234; MIPS4-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
235; MIPS4-NEXT: jr $ra
236; MIPS4-NEXT: daddiu $sp, $sp, 16
237; MIPS4-NEXT: .LBB1_2: # %if.then
238; MIPS4-NEXT: jal abort
239; MIPS4-NEXT: nop
240;
241; MIPS64-LABEL: f1:
242; MIPS64: # %bb.0: # %entry
243; MIPS64-NEXT: daddiu $sp, $sp, -16
244; MIPS64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
245; MIPS64-NEXT: mtc1 $zero, $f0
246; MIPS64-NEXT: c.eq.s $f12, $f0
247; MIPS64-NEXT: bc1f .LBB1_2
248; MIPS64-NEXT: nop
249; MIPS64-NEXT: # %bb.1: # %if.end
250; MIPS64-NEXT: jal f2
251; MIPS64-NEXT: nop
252; MIPS64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
253; MIPS64-NEXT: jr $ra
254; MIPS64-NEXT: daddiu $sp, $sp, 16
255; MIPS64-NEXT: .LBB1_2: # %if.then
256; MIPS64-NEXT: jal abort
257; MIPS64-NEXT: nop
258;
259; MIPS64R2-LABEL: f1:
260; MIPS64R2: # %bb.0: # %entry
261; MIPS64R2-NEXT: daddiu $sp, $sp, -16
262; MIPS64R2-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
263; MIPS64R2-NEXT: mtc1 $zero, $f0
264; MIPS64R2-NEXT: c.eq.s $f12, $f0
265; MIPS64R2-NEXT: bc1f .LBB1_2
266; MIPS64R2-NEXT: nop
267; MIPS64R2-NEXT: # %bb.1: # %if.end
268; MIPS64R2-NEXT: jal f2
269; MIPS64R2-NEXT: nop
270; MIPS64R2-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
271; MIPS64R2-NEXT: jr $ra
272; MIPS64R2-NEXT: daddiu $sp, $sp, 16
273; MIPS64R2-NEXT: .LBB1_2: # %if.then
274; MIPS64R2-NEXT: jal abort
275; MIPS64R2-NEXT: nop
276;
277; MIPS64R6-LABEL: f1:
278; MIPS64R6: # %bb.0: # %entry
279; MIPS64R6-NEXT: daddiu $sp, $sp, -16
280; MIPS64R6-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
281; MIPS64R6-NEXT: mtc1 $zero, $f0
282; MIPS64R6-NEXT: cmp.eq.s $f0, $f12, $f0
283; MIPS64R6-NEXT: mfc1 $1, $f0
284; MIPS64R6-NEXT: andi $1, $1, 1
285; MIPS64R6-NEXT: beqzc $1, .LBB1_2
286; MIPS64R6-NEXT: nop
287; MIPS64R6-NEXT: # %bb.1: # %if.end
288; MIPS64R6-NEXT: jal f2
289; MIPS64R6-NEXT: nop
290; MIPS64R6-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
291; MIPS64R6-NEXT: jr $ra
292; MIPS64R6-NEXT: daddiu $sp, $sp, 16
293; MIPS64R6-NEXT: .LBB1_2: # %if.then
294; MIPS64R6-NEXT: jal abort
295; MIPS64R6-NEXT: nop
Akira Hatanaka93f898f2011-04-01 17:39:08 +0000[diff] [blame]296entry:
Akira Hatanaka93f898f2011-04-01 17:39:08 +0000[diff] [blame]297 %cmp = fcmp une float %f, 0.000000e+00
298 br i1 %cmp, label %if.then, label %if.end
299
300if.then: ; preds = %entry
301 tail call void @abort() noreturn
302 unreachable
303
304if.end: ; preds = %entry
David Blaikie23af6482015-04-16 23:24:18 +0000[diff] [blame]305 tail call void (...) @f2() nounwind
Akira Hatanaka93f898f2011-04-01 17:39:08 +0000[diff] [blame]306 ret void
307}
308
309declare void @abort() noreturn nounwind
310
311declare void @f2(...)