Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / Mips / longbranch / branch-limits-fp-micromips.mir
blob: 1e336a810e934ba82147a781b87946a087f93dbb [file] [log] [blame]
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
Aleksandar Beserminjia5f75512018-05-22 13:24:38 +0000[diff] [blame]2# RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MM
3# RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]4
5# Test the long branch expansion of various branches
6
7--- |
8
9 define i32 @a(double %a, double %b) {
10 entry:
11 %cmp = fcmp une double %a, %b
12 br i1 %cmp, label %if.then, label %return
13
14 if.then:
15 call void asm sideeffect ".space 310680", "~{$1}"()
16 ret i32 0
17
18 return:
19 ret i32 1
20 }
21
22 define i32 @b(double %a, double %b) {
23 entry:
24 %cmp = fcmp ueq double %a, %b
25 br i1 %cmp, label %if.then, label %return
26
27 if.then:
28 call void asm sideeffect ".space 310680", "~{$1}"()
29 ret i32 0
30
31 return:
32 ret i32 1
33 }
34
35...
36---
37name: a
38alignment: 2
39exposesReturnsTwice: false
40legalized: false
41regBankSelected: false
42selected: false
43failedISel: false
44tracksRegLiveness: true
45registers:
46liveins:
47 - { reg: '$d6', virtual-reg: '' }
48 - { reg: '$d7', virtual-reg: '' }
49frameInfo:
50 isFrameAddressTaken: false
51 isReturnAddressTaken: false
52 hasStackMap: false
53 hasPatchPoint: false
54 stackSize: 0
55 offsetAdjustment: 0
56 maxAlignment: 1
57 adjustsStack: false
58 hasCalls: false
59 stackProtector: ''
60 maxCallFrameSize: 0
61 hasOpaqueSPAdjustment: false
62 hasVAStart: false
63 hasMustTailInVarArgFunc: false
64 localFrameSize: 0
65 savePoint: ''
66 restorePoint: ''
67fixedStack:
68stack:
69constants:
70body: |
71 ; MM-LABEL: name: a
72 ; MM: bb.0.entry:
73 ; MM: successors: %bb.2(0x50000000), %bb.1(0x30000000)
74 ; MM: FCMP_D32_MM killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
75 ; MM: BC1F_MM $fcc0, %bb.2, implicit-def $at {
76 ; MM: NOP
77 ; MM: }
78 ; MM: bb.1.entry:
79 ; MM: successors: %bb.3(0x80000000)
80 ; MM: J %bb.3, implicit-def $at {
81 ; MM: NOP
82 ; MM: }
83 ; MM: bb.2.if.then:
84 ; MM: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at
85 ; MM: $v0 = LI16_MM 0
86 ; MM: JRC16_MM undef $ra, implicit killed $v0
87 ; MM: bb.3.return:
88 ; MM: $v0 = LI16_MM 1
89 ; MM: JRC16_MM undef $ra, implicit killed $v0
90 ; PIC-LABEL: name: a
91 ; PIC: bb.0.entry:
92 ; PIC: successors: %bb.3(0x50000000), %bb.1(0x30000000)
93 ; PIC: FCMP_D32_MM killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
94 ; PIC: BC1F_MM $fcc0, %bb.3, implicit-def $at {
95 ; PIC: NOP
96 ; PIC: }
97 ; PIC: bb.1.entry:
98 ; PIC: successors: %bb.2(0x80000000)
99 ; PIC: $sp = ADDiu $sp, -8
100 ; PIC: SW $ra, $sp, 0
Aleksandar Beserminji8acdc102018-06-12 10:23:49 +0000[diff] [blame]101 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]102 ; PIC: BAL_BR_MM %bb.2, implicit-def $ra {
Aleksandar Beserminji8acdc102018-06-12 10:23:49 +0000[diff] [blame]103 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]104 ; PIC: }
105 ; PIC: bb.2.entry:
106 ; PIC: successors: %bb.4(0x80000000)
107 ; PIC: $at = ADDu $ra, $at
108 ; PIC: $ra = LW $sp, 0
109 ; PIC: JR $at {
110 ; PIC: $sp = ADDiu $sp, 8
111 ; PIC: }
112 ; PIC: bb.3.if.then:
113 ; PIC: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at
114 ; PIC: $v0 = LI16_MM 0
115 ; PIC: JRC16_MM undef $ra, implicit killed $v0
116 ; PIC: bb.4.return:
117 ; PIC: $v0 = LI16_MM 1
118 ; PIC: JRC16_MM undef $ra, implicit killed $v0
119 bb.0.entry:
120 successors: %bb.1(0x50000000), %bb.2(0x30000000)
121 liveins: $d6, $d7
122
123 FCMP_D32_MM killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
124 BC1T_MM killed $fcc0, %bb.2, implicit-def dead $at
125
126 bb.1.if.then:
127 INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at
128 $v0 = LI16_MM 0
129 PseudoReturn undef $ra, implicit killed $v0
130
131 bb.2.return:
132 $v0 = LI16_MM 1
133 PseudoReturn undef $ra, implicit killed $v0
134
135...
136---
137name: b
138alignment: 2
139exposesReturnsTwice: false
140legalized: false
141regBankSelected: false
142selected: false
143failedISel: false
144tracksRegLiveness: true
145registers:
146liveins:
147 - { reg: '$d6', virtual-reg: '' }
148 - { reg: '$d7', virtual-reg: '' }
149frameInfo:
150 isFrameAddressTaken: false
151 isReturnAddressTaken: false
152 hasStackMap: false
153 hasPatchPoint: false
154 stackSize: 0
155 offsetAdjustment: 0
156 maxAlignment: 1
157 adjustsStack: false
158 hasCalls: false
159 stackProtector: ''
160 maxCallFrameSize: 0
161 hasOpaqueSPAdjustment: false
162 hasVAStart: false
163 hasMustTailInVarArgFunc: false
164 localFrameSize: 0
165 savePoint: ''
166 restorePoint: ''
167fixedStack:
168stack:
169constants:
170body: |
171 ; MM-LABEL: name: b
172 ; MM: bb.0.entry:
173 ; MM: successors: %bb.2(0x30000000), %bb.1(0x50000000)
174 ; MM: FCMP_D32_MM killed renamable $d6, killed renamable $d7, 19, implicit-def $fcc0
175 ; MM: BC1F_MM killed $fcc0, %bb.1, implicit-def dead $at {
176 ; MM: NOP
177 ; MM: }
178 ; MM: bb.1.return:
179 ; MM: $v0 = LI16_MM 1
180 ; MM: JRC16_MM undef $ra, implicit killed $v0
181 ; MM: bb.2.if.then:
182 ; MM: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at
183 ; MM: $v0 = LI16_MM 0
184 ; MM: JRC16_MM undef $ra, implicit killed $v0
185 ; PIC-LABEL: name: b
186 ; PIC: bb.0.entry:
187 ; PIC: successors: %bb.2(0x30000000), %bb.1(0x50000000)
188 ; PIC: FCMP_D32_MM killed renamable $d6, killed renamable $d7, 19, implicit-def $fcc0
189 ; PIC: BC1F_MM killed $fcc0, %bb.1, implicit-def dead $at {
190 ; PIC: NOP
191 ; PIC: }
192 ; PIC: bb.1.return:
193 ; PIC: $v0 = LI16_MM 1
194 ; PIC: JRC16_MM undef $ra, implicit killed $v0
195 ; PIC: bb.2.if.then:
196 ; PIC: INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at
197 ; PIC: $v0 = LI16_MM 0
198 ; PIC: JRC16_MM undef $ra, implicit killed $v0
199 bb.0.entry:
200 successors: %bb.1(0x30000000), %bb.2(0x50000000)
201 liveins: $d6, $d7
202
203 FCMP_D32_MM killed renamable $d6, killed renamable $d7, 19, implicit-def $fcc0
204 BC1F_MM killed $fcc0, %bb.2, implicit-def dead $at
205
206 bb.2.return:
207 $v0 = LI16_MM 1
208 PseudoReturn undef $ra, implicit killed $v0
209
210 bb.1.if.then:
211 INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at
212 $v0 = LI16_MM 0
213 PseudoReturn undef $ra, implicit killed $v0
214
215...