blob: fd1d13bae7f6b929480f1817178941d8be8a6f62 [file] [log] [blame]
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +00001; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
Stefan Pintilie46f840f2018-12-04 20:14:57 +00003; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +00004; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
Stefan Pintilie46f840f2018-12-04 20:14:57 +00006; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +00007; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i32 0, align 4
10
11; Function Attrs: norecurse nounwind readnone
12define i64 @test_llequi(i32 zeroext %a, i32 zeroext %b) {
13; CHECK-LABEL: test_llequi:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +000014; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000015; CHECK-NEXT: xor r3, r3, r4
16; CHECK-NEXT: cntlzw r3, r3
17; CHECK-NEXT: srwi r3, r3, 5
18; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +000019; CHECK-BE-LABEL: test_llequi:
20; CHECK-BE: # %bb.0: # %entry
21; CHECK-BE-NEXT: xor r3, r3, r4
22; CHECK-BE-NEXT: cntlzw r3, r3
23; CHECK-BE-NEXT: srwi r3, r3, 5
24; CHECK-BE-NEXT: blr
25;
26; CHECK-LE-LABEL: test_llequi:
27; CHECK-LE: # %bb.0: # %entry
28; CHECK-LE-NEXT: xor r3, r3, r4
29; CHECK-LE-NEXT: cntlzw r3, r3
30; CHECK-LE-NEXT: srwi r3, r3, 5
31; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000032entry:
33 %cmp = icmp eq i32 %a, %b
34 %conv1 = zext i1 %cmp to i64
35 ret i64 %conv1
36}
37
38; Function Attrs: norecurse nounwind readnone
39define i64 @test_llequi_sext(i32 zeroext %a, i32 zeroext %b) {
40; CHECK-LABEL: test_llequi_sext:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +000041; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000042; CHECK-NEXT: xor r3, r3, r4
43; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +000044; CHECK-NEXT: srwi r3, r3, 5
45; CHECK-NEXT: neg r3, r3
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000046; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +000047; CHECK-BE-LABEL: test_llequi_sext:
48; CHECK-BE: # %bb.0: # %entry
49; CHECK-BE-NEXT: xor r3, r3, r4
50; CHECK-BE-NEXT: cntlzw r3, r3
51; CHECK-BE-NEXT: srwi r3, r3, 5
52; CHECK-BE-NEXT: neg r3, r3
53; CHECK-BE-NEXT: blr
54;
55; CHECK-LE-LABEL: test_llequi_sext:
56; CHECK-LE: # %bb.0: # %entry
57; CHECK-LE-NEXT: xor r3, r3, r4
58; CHECK-LE-NEXT: cntlzw r3, r3
59; CHECK-LE-NEXT: srwi r3, r3, 5
60; CHECK-LE-NEXT: neg r3, r3
61; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000062entry:
63 %cmp = icmp eq i32 %a, %b
64 %conv1 = sext i1 %cmp to i64
65 ret i64 %conv1
66}
67
68; Function Attrs: norecurse nounwind readnone
69define i64 @test_llequi_z(i32 zeroext %a) {
70; CHECK-LABEL: test_llequi_z:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +000071; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000072; CHECK-NEXT: cntlzw r3, r3
73; CHECK-NEXT: srwi r3, r3, 5
74; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +000075; CHECK-BE-LABEL: test_llequi_z:
76; CHECK-BE: # %bb.0: # %entry
77; CHECK-BE-NEXT: cntlzw r3, r3
78; CHECK-BE-NEXT: srwi r3, r3, 5
79; CHECK-BE-NEXT: blr
80;
81; CHECK-LE-LABEL: test_llequi_z:
82; CHECK-LE: # %bb.0: # %entry
83; CHECK-LE-NEXT: cntlzw r3, r3
84; CHECK-LE-NEXT: srwi r3, r3, 5
85; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000086entry:
87 %cmp = icmp eq i32 %a, 0
88 %conv1 = zext i1 %cmp to i64
89 ret i64 %conv1
90}
91
92; Function Attrs: norecurse nounwind readnone
93define i64 @test_llequi_sext_z(i32 zeroext %a) {
94; CHECK-LABEL: test_llequi_sext_z:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +000095; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000096; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +000097; CHECK-NEXT: srwi r3, r3, 5
98; CHECK-NEXT: neg r3, r3
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +000099; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000100; CHECK-BE-LABEL: test_llequi_sext_z:
101; CHECK-BE: # %bb.0: # %entry
102; CHECK-BE-NEXT: cntlzw r3, r3
103; CHECK-BE-NEXT: srwi r3, r3, 5
104; CHECK-BE-NEXT: neg r3, r3
105; CHECK-BE-NEXT: blr
106;
107; CHECK-LE-LABEL: test_llequi_sext_z:
108; CHECK-LE: # %bb.0: # %entry
109; CHECK-LE-NEXT: cntlzw r3, r3
110; CHECK-LE-NEXT: srwi r3, r3, 5
111; CHECK-LE-NEXT: neg r3, r3
112; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000113entry:
114 %cmp = icmp eq i32 %a, 0
115 %conv1 = sext i1 %cmp to i64
116 ret i64 %conv1
117}
118
119; Function Attrs: norecurse nounwind
120define void @test_llequi_store(i32 zeroext %a, i32 zeroext %b) {
121; CHECK-LABEL: test_llequi_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000122; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000123; CHECK-NEXT: xor r3, r3, r4
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000124; CHECK-NEXT: addis r5, r2, glob@toc@ha
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000125; CHECK-NEXT: cntlzw r3, r3
126; CHECK-NEXT: srwi r3, r3, 5
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000127; CHECK-NEXT: stw r3, glob@toc@l(r5)
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000128; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000129; CHECK-BE-LABEL: test_llequi_store:
130; CHECK-BE: # %bb.0: # %entry
131; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
132; CHECK-BE-NEXT: xor r3, r3, r4
133; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
134; CHECK-BE-NEXT: cntlzw r3, r3
135; CHECK-BE-NEXT: srwi r3, r3, 5
136; CHECK-BE-NEXT: stw r3, 0(r4)
137; CHECK-BE-NEXT: blr
138;
139; CHECK-LE-LABEL: test_llequi_store:
140; CHECK-LE: # %bb.0: # %entry
141; CHECK-LE-NEXT: xor r3, r3, r4
142; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
143; CHECK-LE-NEXT: cntlzw r3, r3
144; CHECK-LE-NEXT: srwi r3, r3, 5
145; CHECK-LE-NEXT: stw r3, glob@toc@l(r5)
146; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000147entry:
148 %cmp = icmp eq i32 %a, %b
149 %conv = zext i1 %cmp to i32
150 store i32 %conv, i32* @glob, align 4
151 ret void
152}
153
154; Function Attrs: norecurse nounwind
155define void @test_llequi_sext_store(i32 zeroext %a, i32 zeroext %b) {
156; CHECK-LABEL: test_llequi_sext_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000157; CHECK: # %bb.0: # %entry
Stefan Pintiliecb4f0c52018-07-04 18:54:25 +0000158; CHECK-NEXT: xor r3, r3, r4
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000159; CHECK-NEXT: addis r5, r2, glob@toc@ha
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000160; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000161; CHECK-NEXT: srwi r3, r3, 5
162; CHECK-NEXT: neg r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000163; CHECK-NEXT: stw r3, glob@toc@l(r5)
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000164; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000165; CHECK-BE-LABEL: test_llequi_sext_store:
166; CHECK-BE: # %bb.0: # %entry
167; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
168; CHECK-BE-NEXT: xor r3, r3, r4
169; CHECK-BE-NEXT: cntlzw r3, r3
170; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
171; CHECK-BE-NEXT: srwi r3, r3, 5
172; CHECK-BE-NEXT: neg r3, r3
173; CHECK-BE-NEXT: stw r3, 0(r4)
174; CHECK-BE-NEXT: blr
175;
176; CHECK-LE-LABEL: test_llequi_sext_store:
177; CHECK-LE: # %bb.0: # %entry
178; CHECK-LE-NEXT: xor r3, r3, r4
179; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
180; CHECK-LE-NEXT: cntlzw r3, r3
181; CHECK-LE-NEXT: srwi r3, r3, 5
182; CHECK-LE-NEXT: neg r3, r3
183; CHECK-LE-NEXT: stw r3, glob@toc@l(r5)
184; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000185entry:
186 %cmp = icmp eq i32 %a, %b
187 %sub = sext i1 %cmp to i32
188 store i32 %sub, i32* @glob, align 4
189 ret void
190}
191
192; Function Attrs: norecurse nounwind
193define void @test_llequi_z_store(i32 zeroext %a) {
194; CHECK-LABEL: test_llequi_z_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000195; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000196; CHECK-NEXT: cntlzw r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000197; CHECK-NEXT: addis r4, r2, glob@toc@ha
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000198; CHECK-NEXT: srwi r3, r3, 5
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000199; CHECK-NEXT: stw r3, glob@toc@l(r4)
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000200; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000201; CHECK-BE-LABEL: test_llequi_z_store:
202; CHECK-BE: # %bb.0: # %entry
203; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
204; CHECK-BE-NEXT: cntlzw r3, r3
205; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
206; CHECK-BE-NEXT: srwi r3, r3, 5
207; CHECK-BE-NEXT: stw r3, 0(r4)
208; CHECK-BE-NEXT: blr
209;
210; CHECK-LE-LABEL: test_llequi_z_store:
211; CHECK-LE: # %bb.0: # %entry
212; CHECK-LE-NEXT: cntlzw r3, r3
213; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
214; CHECK-LE-NEXT: srwi r3, r3, 5
215; CHECK-LE-NEXT: stw r3, glob@toc@l(r4)
216; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000217entry:
218 %cmp = icmp eq i32 %a, 0
219 %conv = zext i1 %cmp to i32
220 store i32 %conv, i32* @glob, align 4
221 ret void
222}
223
224; Function Attrs: norecurse nounwind
225define void @test_llequi_sext_z_store(i32 zeroext %a) {
226; CHECK-LABEL: test_llequi_sext_z_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000227; CHECK: # %bb.0: # %entry
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000228; CHECK-NEXT: cntlzw r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000229; CHECK-NEXT: addis r4, r2, glob@toc@ha
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000230; CHECK-NEXT: srwi r3, r3, 5
231; CHECK-NEXT: neg r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000232; CHECK-NEXT: stw r3, glob@toc@l(r4)
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000233; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000234; CHECK-BE-LABEL: test_llequi_sext_z_store:
235; CHECK-BE: # %bb.0: # %entry
236; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
237; CHECK-BE-NEXT: cntlzw r3, r3
238; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
239; CHECK-BE-NEXT: srwi r3, r3, 5
240; CHECK-BE-NEXT: neg r3, r3
241; CHECK-BE-NEXT: stw r3, 0(r4)
242; CHECK-BE-NEXT: blr
243;
244; CHECK-LE-LABEL: test_llequi_sext_z_store:
245; CHECK-LE: # %bb.0: # %entry
246; CHECK-LE-NEXT: cntlzw r3, r3
247; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
248; CHECK-LE-NEXT: srwi r3, r3, 5
249; CHECK-LE-NEXT: neg r3, r3
250; CHECK-LE-NEXT: stw r3, glob@toc@l(r4)
251; CHECK-LE-NEXT: blr
Nemanja Ivanovic96c3d622017-05-11 16:54:23 +0000252entry:
253 %cmp = icmp eq i32 %a, 0
254 %sub = sext i1 %cmp to i32
255 store i32 %sub, i32* @glob, align 4
256 ret void
257}