| Alex Bradbury | e96b7c88 | 2018-10-04 07:28:49 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \ |
| 3 | ; RUN: | FileCheck %s -check-prefix=RV32IF |
| 4 | |
| 5 | ; Exercises the ILP32 calling convention code in the case that f32 is a legal |
| 6 | ; type. As well as testing that lowering is correct, these tests also aim to |
| 7 | ; check that floating point load/store or integer load/store is chosen |
| 8 | ; optimally when floats are passed on the stack. |
| 9 | |
| 10 | define float @onstack_f32_noop(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind { |
| 11 | ; RV32IF-LABEL: onstack_f32_noop: |
| 12 | ; RV32IF: # %bb.0: |
| 13 | ; RV32IF-NEXT: lw a0, 4(sp) |
| 14 | ; RV32IF-NEXT: ret |
| 15 | ret float %f |
| 16 | } |
| 17 | |
| 18 | define float @onstack_f32_fadd(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind { |
| 19 | ; RV32IF-LABEL: onstack_f32_fadd: |
| 20 | ; RV32IF: # %bb.0: |
| 21 | ; RV32IF-NEXT: flw ft0, 4(sp) |
| 22 | ; RV32IF-NEXT: flw ft1, 0(sp) |
| 23 | ; RV32IF-NEXT: fadd.s ft0, ft1, ft0 |
| 24 | ; RV32IF-NEXT: fmv.x.w a0, ft0 |
| 25 | ; RV32IF-NEXT: ret |
| 26 | %1 = fadd float %e, %f |
| 27 | ret float %1 |
| 28 | } |
| 29 | |
| 30 | define float @caller_onstack_f32_noop(float %a) nounwind { |
| 31 | ; RV32IF-LABEL: caller_onstack_f32_noop: |
| 32 | ; RV32IF: # %bb.0: |
| 33 | ; RV32IF-NEXT: addi sp, sp, -16 |
| 34 | ; RV32IF-NEXT: sw ra, 12(sp) |
| 35 | ; RV32IF-NEXT: sw a0, 4(sp) |
| 36 | ; RV32IF-NEXT: lui a0, 264704 |
| 37 | ; RV32IF-NEXT: sw a0, 0(sp) |
| 38 | ; RV32IF-NEXT: addi a0, zero, 1 |
| 39 | ; RV32IF-NEXT: addi a2, zero, 2 |
| 40 | ; RV32IF-NEXT: addi a4, zero, 3 |
| 41 | ; RV32IF-NEXT: addi a6, zero, 4 |
| 42 | ; RV32IF-NEXT: mv a1, zero |
| 43 | ; RV32IF-NEXT: mv a3, zero |
| 44 | ; RV32IF-NEXT: mv a5, zero |
| 45 | ; RV32IF-NEXT: mv a7, zero |
| 46 | ; RV32IF-NEXT: call onstack_f32_noop |
| 47 | ; RV32IF-NEXT: lw ra, 12(sp) |
| 48 | ; RV32IF-NEXT: addi sp, sp, 16 |
| 49 | ; RV32IF-NEXT: ret |
| 50 | %1 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float 5.0, float %a) |
| 51 | ret float %1 |
| 52 | } |
| 53 | |
| 54 | define float @caller_onstack_f32_fadd(float %a, float %b) nounwind { |
| 55 | ; RV32IF-LABEL: caller_onstack_f32_fadd: |
| 56 | ; RV32IF: # %bb.0: |
| 57 | ; RV32IF-NEXT: addi sp, sp, -16 |
| 58 | ; RV32IF-NEXT: sw ra, 12(sp) |
| 59 | ; RV32IF-NEXT: fmv.w.x ft0, a0 |
| 60 | ; RV32IF-NEXT: fmv.w.x ft1, a1 |
| 61 | ; RV32IF-NEXT: fsub.s ft2, ft1, ft0 |
| 62 | ; RV32IF-NEXT: fsw ft2, 4(sp) |
| 63 | ; RV32IF-NEXT: fadd.s ft0, ft0, ft1 |
| 64 | ; RV32IF-NEXT: fsw ft0, 0(sp) |
| 65 | ; RV32IF-NEXT: addi a0, zero, 1 |
| 66 | ; RV32IF-NEXT: addi a2, zero, 2 |
| 67 | ; RV32IF-NEXT: addi a4, zero, 3 |
| 68 | ; RV32IF-NEXT: addi a6, zero, 4 |
| 69 | ; RV32IF-NEXT: mv a1, zero |
| 70 | ; RV32IF-NEXT: mv a3, zero |
| 71 | ; RV32IF-NEXT: mv a5, zero |
| 72 | ; RV32IF-NEXT: mv a7, zero |
| 73 | ; RV32IF-NEXT: call onstack_f32_noop |
| 74 | ; RV32IF-NEXT: lw ra, 12(sp) |
| 75 | ; RV32IF-NEXT: addi sp, sp, 16 |
| 76 | ; RV32IF-NEXT: ret |
| 77 | %1 = fadd float %a, %b |
| 78 | %2 = fsub float %b, %a |
| 79 | %3 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float %1, float %2) |
| 80 | ret float %3 |
| 81 | } |