blob: 6609ab2008e991689983fcb55c9a121475ac035d [file] [log] [blame]
Alex Bradburydc31c612017-12-11 12:49:02 +00001; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN: | FileCheck -check-prefix=RV32I %s
4
5define zeroext i8 @uint8_arg_to_uint8_ret(i8 zeroext %a) nounwind {
6; RV32I-LABEL: uint8_arg_to_uint8_ret:
7; RV32I: # %bb.0:
Alex Bradbury59136ff2017-12-15 09:47:01 +00008; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +00009 ret i8 %a
10}
11
12declare void @receive_uint8(i8 zeroext)
13
14define void @pass_uint8_as_uint8(i8 zeroext %a) nounwind {
15; RV32I-LABEL: pass_uint8_as_uint8:
16; RV32I: # %bb.0:
17; RV32I-NEXT: addi sp, sp, -16
18; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +000019; RV32I-NEXT: call receive_uint8
Alex Bradburydc31c612017-12-11 12:49:02 +000020; RV32I-NEXT: lw ra, 12(sp)
21; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +000022; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +000023 call void @receive_uint8(i8 zeroext %a)
24 ret void
25}
26
27declare zeroext i8 @return_uint8()
28
29define zeroext i8 @ret_callresult_uint8_as_uint8() nounwind {
30; RV32I-LABEL: ret_callresult_uint8_as_uint8:
31; RV32I: # %bb.0:
32; RV32I-NEXT: addi sp, sp, -16
33; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +000034; RV32I-NEXT: call return_uint8
Alex Bradburydc31c612017-12-11 12:49:02 +000035; RV32I-NEXT: lw ra, 12(sp)
36; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +000037; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +000038 %1 = call zeroext i8 @return_uint8()
39 ret i8 %1
40}
41
42define signext i8 @uint8_arg_to_sint8_ret(i8 zeroext %a) nounwind {
43; RV32I-LABEL: uint8_arg_to_sint8_ret:
44; RV32I: # %bb.0:
Alex Bradburydc31c612017-12-11 12:49:02 +000045; RV32I-NEXT: slli a0, a0, 24
46; RV32I-NEXT: srai a0, a0, 24
Alex Bradbury59136ff2017-12-15 09:47:01 +000047; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +000048 ret i8 %a
49}
50
51declare void @receive_sint8(i8 signext)
52
53define void @pass_uint8_as_sint8(i8 zeroext %a) nounwind {
54; RV32I-LABEL: pass_uint8_as_sint8:
55; RV32I: # %bb.0:
56; RV32I-NEXT: addi sp, sp, -16
57; RV32I-NEXT: sw ra, 12(sp)
Alex Bradburydc31c612017-12-11 12:49:02 +000058; RV32I-NEXT: slli a0, a0, 24
59; RV32I-NEXT: srai a0, a0, 24
Shiva Chend58bd8d2018-04-25 14:19:12 +000060; RV32I-NEXT: call receive_sint8
Alex Bradburydc31c612017-12-11 12:49:02 +000061; RV32I-NEXT: lw ra, 12(sp)
62; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +000063; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +000064
65 call void @receive_sint8(i8 signext %a)
66 ret void
67}
68
69define signext i8 @ret_callresult_uint8_as_sint8() nounwind {
70; RV32I-LABEL: ret_callresult_uint8_as_sint8:
71; RV32I: # %bb.0:
72; RV32I-NEXT: addi sp, sp, -16
73; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +000074; RV32I-NEXT: call return_uint8
Alex Bradburydc31c612017-12-11 12:49:02 +000075; RV32I-NEXT: slli a0, a0, 24
76; RV32I-NEXT: srai a0, a0, 24
Alex Bradburydc31c612017-12-11 12:49:02 +000077; RV32I-NEXT: lw ra, 12(sp)
78; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +000079; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +000080 %1 = call zeroext i8 @return_uint8()
81 ret i8 %1
82}
83
84define signext i32 @uint8_arg_to_anyint32_ret(i8 zeroext %a) nounwind {
85; RV32I-LABEL: uint8_arg_to_anyint32_ret:
86; RV32I: # %bb.0:
Alex Bradbury59136ff2017-12-15 09:47:01 +000087; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +000088 %1 = zext i8 %a to i32
89 ret i32 %1
90}
91
92declare void @receive_anyint32(i32 signext)
93
94define void @pass_uint8_as_anyint32(i8 zeroext %a) nounwind {
95; RV32I-LABEL: pass_uint8_as_anyint32:
96; RV32I: # %bb.0:
97; RV32I-NEXT: addi sp, sp, -16
98; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +000099; RV32I-NEXT: call receive_anyint32
Alex Bradburydc31c612017-12-11 12:49:02 +0000100; RV32I-NEXT: lw ra, 12(sp)
101; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000102; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000103 %1 = zext i8 %a to i32
104 call void @receive_anyint32(i32 signext %1)
105 ret void
106}
107
108define signext i32 @ret_callresult_uint8_as_anyint32() nounwind {
109; RV32I-LABEL: ret_callresult_uint8_as_anyint32:
110; RV32I: # %bb.0:
111; RV32I-NEXT: addi sp, sp, -16
112; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000113; RV32I-NEXT: call return_uint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000114; RV32I-NEXT: lw ra, 12(sp)
115; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000116; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000117 %1 = call zeroext i8 @return_uint8()
118 %2 = zext i8 %1 to i32
119 ret i32 %2
120}
121
122define zeroext i8 @sint8_arg_to_uint8_ret(i8 signext %a) nounwind {
123; RV32I-LABEL: sint8_arg_to_uint8_ret:
124; RV32I: # %bb.0:
Alex Bradburydc31c612017-12-11 12:49:02 +0000125; RV32I-NEXT: andi a0, a0, 255
Alex Bradbury59136ff2017-12-15 09:47:01 +0000126; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000127 ret i8 %a
128}
129
130define void @pass_sint8_as_uint8(i8 signext %a) nounwind {
131; RV32I-LABEL: pass_sint8_as_uint8:
132; RV32I: # %bb.0:
133; RV32I-NEXT: addi sp, sp, -16
134; RV32I-NEXT: sw ra, 12(sp)
Alex Bradburydc31c612017-12-11 12:49:02 +0000135; RV32I-NEXT: andi a0, a0, 255
Shiva Chend58bd8d2018-04-25 14:19:12 +0000136; RV32I-NEXT: call receive_uint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000137; RV32I-NEXT: lw ra, 12(sp)
138; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000139; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000140 call void @receive_uint8(i8 zeroext %a)
141 ret void
142}
143
144declare signext i8 @return_sint8()
145
146define zeroext i8 @ret_callresult_sint8_as_uint8() nounwind {
147; RV32I-LABEL: ret_callresult_sint8_as_uint8:
148; RV32I: # %bb.0:
149; RV32I-NEXT: addi sp, sp, -16
150; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000151; RV32I-NEXT: call return_sint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000152; RV32I-NEXT: andi a0, a0, 255
Alex Bradburydc31c612017-12-11 12:49:02 +0000153; RV32I-NEXT: lw ra, 12(sp)
154; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000155; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000156 %1 = call signext i8 @return_sint8()
157 ret i8 %1
158}
159
160define signext i8 @sint8_arg_to_sint8_ret(i8 signext %a) nounwind {
161; RV32I-LABEL: sint8_arg_to_sint8_ret:
162; RV32I: # %bb.0:
Alex Bradbury59136ff2017-12-15 09:47:01 +0000163; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000164 ret i8 %a
165}
166
167define void @pass_sint8_as_sint8(i8 signext %a) nounwind {
168; RV32I-LABEL: pass_sint8_as_sint8:
169; RV32I: # %bb.0:
170; RV32I-NEXT: addi sp, sp, -16
171; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000172; RV32I-NEXT: call receive_sint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000173; RV32I-NEXT: lw ra, 12(sp)
174; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000175; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000176 call void @receive_sint8(i8 signext %a)
177 ret void
178}
179
180define signext i8 @ret_callresult_sint8_as_sint8() nounwind {
181; RV32I-LABEL: ret_callresult_sint8_as_sint8:
182; RV32I: # %bb.0:
183; RV32I-NEXT: addi sp, sp, -16
184; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000185; RV32I-NEXT: call return_sint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000186; RV32I-NEXT: lw ra, 12(sp)
187; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000188; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000189 %1 = call signext i8 @return_sint8()
190 ret i8 %1
191}
192
193define signext i32 @sint8_arg_to_anyint32_ret(i8 signext %a) nounwind {
194; RV32I-LABEL: sint8_arg_to_anyint32_ret:
195; RV32I: # %bb.0:
Alex Bradbury59136ff2017-12-15 09:47:01 +0000196; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000197 %1 = sext i8 %a to i32
198 ret i32 %1
199}
200
201define void @pass_sint8_as_anyint32(i8 signext %a) nounwind {
202; RV32I-LABEL: pass_sint8_as_anyint32:
203; RV32I: # %bb.0:
204; RV32I-NEXT: addi sp, sp, -16
205; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000206; RV32I-NEXT: call receive_anyint32
Alex Bradburydc31c612017-12-11 12:49:02 +0000207; RV32I-NEXT: lw ra, 12(sp)
208; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000209; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000210 %1 = sext i8 %a to i32
211 call void @receive_anyint32(i32 signext %1)
212 ret void
213}
214
215define signext i32 @ret_callresult_sint8_as_anyint32() nounwind {
216; RV32I-LABEL: ret_callresult_sint8_as_anyint32:
217; RV32I: # %bb.0:
218; RV32I-NEXT: addi sp, sp, -16
219; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000220; RV32I-NEXT: call return_sint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000221; RV32I-NEXT: lw ra, 12(sp)
222; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000223; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000224 %1 = call signext i8 @return_sint8()
225 %2 = sext i8 %1 to i32
226 ret i32 %2
227}
228
229define zeroext i8 @anyint32_arg_to_uint8_ret(i32 signext %a) nounwind {
230; RV32I-LABEL: anyint32_arg_to_uint8_ret:
231; RV32I: # %bb.0:
Alex Bradburydc31c612017-12-11 12:49:02 +0000232; RV32I-NEXT: andi a0, a0, 255
Alex Bradbury59136ff2017-12-15 09:47:01 +0000233; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000234 %1 = trunc i32 %a to i8
235 ret i8 %1
236}
237
238define void @pass_anyint32_as_uint8(i32 signext %a) nounwind {
239; RV32I-LABEL: pass_anyint32_as_uint8:
240; RV32I: # %bb.0:
241; RV32I-NEXT: addi sp, sp, -16
242; RV32I-NEXT: sw ra, 12(sp)
Alex Bradburydc31c612017-12-11 12:49:02 +0000243; RV32I-NEXT: andi a0, a0, 255
Shiva Chend58bd8d2018-04-25 14:19:12 +0000244; RV32I-NEXT: call receive_uint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000245; RV32I-NEXT: lw ra, 12(sp)
246; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000247; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000248 %1 = trunc i32 %a to i8
249 call void @receive_uint8(i8 zeroext %1)
250 ret void
251}
252
253declare signext i32 @return_anyint32()
254
255define zeroext i8 @ret_callresult_anyint32_as_uint8() nounwind {
256; RV32I-LABEL: ret_callresult_anyint32_as_uint8:
257; RV32I: # %bb.0:
258; RV32I-NEXT: addi sp, sp, -16
259; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000260; RV32I-NEXT: call return_anyint32
Alex Bradburydc31c612017-12-11 12:49:02 +0000261; RV32I-NEXT: andi a0, a0, 255
Alex Bradburydc31c612017-12-11 12:49:02 +0000262; RV32I-NEXT: lw ra, 12(sp)
263; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000264; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000265 %1 = call signext i32 @return_anyint32()
266 %2 = trunc i32 %1 to i8
267 ret i8 %2
268}
269
270define signext i8 @anyint32_arg_to_sint8_ret(i32 signext %a) nounwind {
271; RV32I-LABEL: anyint32_arg_to_sint8_ret:
272; RV32I: # %bb.0:
Alex Bradburydc31c612017-12-11 12:49:02 +0000273; RV32I-NEXT: slli a0, a0, 24
274; RV32I-NEXT: srai a0, a0, 24
Alex Bradbury59136ff2017-12-15 09:47:01 +0000275; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000276 %1 = trunc i32 %a to i8
277 ret i8 %1
278}
279
280define void @pass_anyint32_as_sint8(i32 signext %a) nounwind {
281; RV32I-LABEL: pass_anyint32_as_sint8:
282; RV32I: # %bb.0:
283; RV32I-NEXT: addi sp, sp, -16
284; RV32I-NEXT: sw ra, 12(sp)
Alex Bradburydc31c612017-12-11 12:49:02 +0000285; RV32I-NEXT: slli a0, a0, 24
286; RV32I-NEXT: srai a0, a0, 24
Shiva Chend58bd8d2018-04-25 14:19:12 +0000287; RV32I-NEXT: call receive_sint8
Alex Bradburydc31c612017-12-11 12:49:02 +0000288; RV32I-NEXT: lw ra, 12(sp)
289; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000290; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000291 %1 = trunc i32 %a to i8
292 call void @receive_sint8(i8 signext %1)
293 ret void
294}
295
296define signext i8 @ret_callresult_anyint32_as_sint8() nounwind {
297; RV32I-LABEL: ret_callresult_anyint32_as_sint8:
298; RV32I: # %bb.0:
299; RV32I-NEXT: addi sp, sp, -16
300; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000301; RV32I-NEXT: call return_anyint32
Alex Bradburydc31c612017-12-11 12:49:02 +0000302; RV32I-NEXT: slli a0, a0, 24
303; RV32I-NEXT: srai a0, a0, 24
Alex Bradburydc31c612017-12-11 12:49:02 +0000304; RV32I-NEXT: lw ra, 12(sp)
305; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000306; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000307 %1 = call signext i32 @return_anyint32()
308 %2 = trunc i32 %1 to i8
309 ret i8 %2
310}
311
312define signext i32 @anyint32_arg_to_anyint32_ret(i32 signext %a) nounwind {
313; RV32I-LABEL: anyint32_arg_to_anyint32_ret:
314; RV32I: # %bb.0:
Alex Bradbury59136ff2017-12-15 09:47:01 +0000315; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000316 ret i32 %a
317}
318
319define void @pass_anyint32_as_anyint32(i32 signext %a) nounwind {
320; RV32I-LABEL: pass_anyint32_as_anyint32:
321; RV32I: # %bb.0:
322; RV32I-NEXT: addi sp, sp, -16
323; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000324; RV32I-NEXT: call receive_anyint32
Alex Bradburydc31c612017-12-11 12:49:02 +0000325; RV32I-NEXT: lw ra, 12(sp)
326; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000327; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000328 call void @receive_anyint32(i32 signext %a)
329 ret void
330}
331
332define signext i32 @ret_callresult_anyint32_as_anyint32() nounwind {
333; RV32I-LABEL: ret_callresult_anyint32_as_anyint32:
334; RV32I: # %bb.0:
335; RV32I-NEXT: addi sp, sp, -16
336; RV32I-NEXT: sw ra, 12(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +0000337; RV32I-NEXT: call return_anyint32
Alex Bradburydc31c612017-12-11 12:49:02 +0000338; RV32I-NEXT: lw ra, 12(sp)
339; RV32I-NEXT: addi sp, sp, 16
Alex Bradbury59136ff2017-12-15 09:47:01 +0000340; RV32I-NEXT: ret
Alex Bradburydc31c612017-12-11 12:49:02 +0000341 %1 = call signext i32 @return_anyint32()
342 ret i32 %1
343}
344