blob: b5c0b991e6cc00cbe1af0c4fb11bf7b83de4fb1d [file] [log] [blame]
Alex Bradbury8f296472018-04-12 05:36:44 +00001; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
3; RUN: | FileCheck -check-prefix=RV32IFD %s
4
5define double @func(double %d, i32 %n) nounwind {
6; RV32IFD-LABEL: func:
7; RV32IFD: # %bb.0: # %entry
8; RV32IFD-NEXT: addi sp, sp, -32
9; RV32IFD-NEXT: sw ra, 28(sp)
10; RV32IFD-NEXT: sw a0, 16(sp)
11; RV32IFD-NEXT: sw a1, 20(sp)
12; RV32IFD-NEXT: fld ft0, 16(sp)
13; RV32IFD-NEXT: beqz a2, .LBB0_2
14; RV32IFD-NEXT: # %bb.1: # %if.else
15; RV32IFD-NEXT: addi a2, a2, -1
Alex Bradbury8f296472018-04-12 05:36:44 +000016; RV32IFD-NEXT: fsd ft0, 16(sp)
17; RV32IFD-NEXT: lw a0, 16(sp)
18; RV32IFD-NEXT: lw a1, 20(sp)
19; RV32IFD-NEXT: fsd ft0, 8(sp)
Shiva Chend58bd8d2018-04-25 14:19:12 +000020; RV32IFD-NEXT: call func
Alex Bradbury8f296472018-04-12 05:36:44 +000021; RV32IFD-NEXT: sw a0, 16(sp)
22; RV32IFD-NEXT: sw a1, 20(sp)
23; RV32IFD-NEXT: fld ft0, 16(sp)
24; RV32IFD-NEXT: fld ft1, 8(sp)
25; RV32IFD-NEXT: fadd.d ft0, ft0, ft1
26; RV32IFD-NEXT: .LBB0_2: # %return
27; RV32IFD-NEXT: fsd ft0, 16(sp)
28; RV32IFD-NEXT: lw a0, 16(sp)
29; RV32IFD-NEXT: lw a1, 20(sp)
30; RV32IFD-NEXT: lw ra, 28(sp)
31; RV32IFD-NEXT: addi sp, sp, 32
32; RV32IFD-NEXT: ret
33entry:
34 %cmp = icmp eq i32 %n, 0
35 br i1 %cmp, label %return, label %if.else
36
37if.else:
38 %sub = add i32 %n, -1
39 %call = tail call double @func(double %d, i32 %sub)
40 %add = fadd double %call, %d
41 ret double %add
42
43return:
44 ret double %d
45}