Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 1 | ; Test 64-bit ANDs in which the second operand is variable. |
| 2 | ; |
Richard Sandiford | c57e586 | 2013-07-19 16:24:22 +0000 | [diff] [blame] | 3 | ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s |
| 4 | ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 5 | |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 6 | declare i64 @foo() |
| 7 | |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 8 | ; Check NGR. |
| 9 | define i64 @f1(i64 %a, i64 %b) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 10 | ; CHECK-LABEL: f1: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 11 | ; CHECK: ngr %r2, %r3 |
| 12 | ; CHECK: br %r14 |
| 13 | %and = and i64 %a, %b |
| 14 | ret i64 %and |
| 15 | } |
| 16 | |
| 17 | ; Check NG with no displacement. |
| 18 | define i64 @f2(i64 %a, i64 *%src) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 19 | ; CHECK-LABEL: f2: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 20 | ; CHECK: ng %r2, 0(%r3) |
| 21 | ; CHECK: br %r14 |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 22 | %b = load i64, i64 *%src |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 23 | %and = and i64 %a, %b |
| 24 | ret i64 %and |
| 25 | } |
| 26 | |
| 27 | ; Check the high end of the aligned NG range. |
| 28 | define i64 @f3(i64 %a, i64 *%src) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 29 | ; CHECK-LABEL: f3: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 30 | ; CHECK: ng %r2, 524280(%r3) |
| 31 | ; CHECK: br %r14 |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 32 | %ptr = getelementptr i64, i64 *%src, i64 65535 |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 33 | %b = load i64, i64 *%ptr |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 34 | %and = and i64 %a, %b |
| 35 | ret i64 %and |
| 36 | } |
| 37 | |
| 38 | ; Check the next doubleword up, which needs separate address logic. |
| 39 | ; Other sequences besides this one would be OK. |
| 40 | define i64 @f4(i64 %a, i64 *%src) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 41 | ; CHECK-LABEL: f4: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 42 | ; CHECK: agfi %r3, 524288 |
| 43 | ; CHECK: ng %r2, 0(%r3) |
| 44 | ; CHECK: br %r14 |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 45 | %ptr = getelementptr i64, i64 *%src, i64 65536 |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 46 | %b = load i64, i64 *%ptr |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 47 | %and = and i64 %a, %b |
| 48 | ret i64 %and |
| 49 | } |
| 50 | |
| 51 | ; Check the high end of the negative aligned NG range. |
| 52 | define i64 @f5(i64 %a, i64 *%src) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 53 | ; CHECK-LABEL: f5: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 54 | ; CHECK: ng %r2, -8(%r3) |
| 55 | ; CHECK: br %r14 |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 56 | %ptr = getelementptr i64, i64 *%src, i64 -1 |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 57 | %b = load i64, i64 *%ptr |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 58 | %and = and i64 %a, %b |
| 59 | ret i64 %and |
| 60 | } |
| 61 | |
| 62 | ; Check the low end of the NG range. |
| 63 | define i64 @f6(i64 %a, i64 *%src) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 64 | ; CHECK-LABEL: f6: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 65 | ; CHECK: ng %r2, -524288(%r3) |
| 66 | ; CHECK: br %r14 |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 67 | %ptr = getelementptr i64, i64 *%src, i64 -65536 |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 68 | %b = load i64, i64 *%ptr |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 69 | %and = and i64 %a, %b |
| 70 | ret i64 %and |
| 71 | } |
| 72 | |
| 73 | ; Check the next doubleword down, which needs separate address logic. |
| 74 | ; Other sequences besides this one would be OK. |
| 75 | define i64 @f7(i64 %a, i64 *%src) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 76 | ; CHECK-LABEL: f7: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 77 | ; CHECK: agfi %r3, -524296 |
| 78 | ; CHECK: ng %r2, 0(%r3) |
| 79 | ; CHECK: br %r14 |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 80 | %ptr = getelementptr i64, i64 *%src, i64 -65537 |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 81 | %b = load i64, i64 *%ptr |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 82 | %and = and i64 %a, %b |
| 83 | ret i64 %and |
| 84 | } |
| 85 | |
| 86 | ; Check that NG allows an index. |
| 87 | define i64 @f8(i64 %a, i64 %src, i64 %index) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 88 | ; CHECK-LABEL: f8: |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 89 | ; CHECK: ng %r2, 524280({{%r4,%r3|%r3,%r4}}) |
| 90 | ; CHECK: br %r14 |
| 91 | %add1 = add i64 %src, %index |
| 92 | %add2 = add i64 %add1, 524280 |
| 93 | %ptr = inttoptr i64 %add2 to i64 * |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 94 | %b = load i64, i64 *%ptr |
Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame] | 95 | %and = and i64 %a, %b |
| 96 | ret i64 %and |
| 97 | } |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 98 | |
| 99 | ; Check that ANDs of spilled values can use NG rather than NGR. |
| 100 | define i64 @f9(i64 *%ptr0) { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 101 | ; CHECK-LABEL: f9: |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 102 | ; CHECK: brasl %r14, foo@PLT |
| 103 | ; CHECK: ng %r2, 160(%r15) |
| 104 | ; CHECK: br %r14 |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 105 | %ptr1 = getelementptr i64, i64 *%ptr0, i64 2 |
| 106 | %ptr2 = getelementptr i64, i64 *%ptr0, i64 4 |
| 107 | %ptr3 = getelementptr i64, i64 *%ptr0, i64 6 |
| 108 | %ptr4 = getelementptr i64, i64 *%ptr0, i64 8 |
| 109 | %ptr5 = getelementptr i64, i64 *%ptr0, i64 10 |
| 110 | %ptr6 = getelementptr i64, i64 *%ptr0, i64 12 |
| 111 | %ptr7 = getelementptr i64, i64 *%ptr0, i64 14 |
| 112 | %ptr8 = getelementptr i64, i64 *%ptr0, i64 16 |
| 113 | %ptr9 = getelementptr i64, i64 *%ptr0, i64 18 |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 114 | |
Ulrich Weigand | 9dd23b8 | 2018-07-20 12:12:10 +0000 | [diff] [blame] | 115 | %val0 = load i64, i64 *%ptr0 |
| 116 | %val1 = load i64, i64 *%ptr1 |
| 117 | %val2 = load i64, i64 *%ptr2 |
| 118 | %val3 = load i64, i64 *%ptr3 |
| 119 | %val4 = load i64, i64 *%ptr4 |
| 120 | %val5 = load i64, i64 *%ptr5 |
| 121 | %val6 = load i64, i64 *%ptr6 |
| 122 | %val7 = load i64, i64 *%ptr7 |
| 123 | %val8 = load i64, i64 *%ptr8 |
| 124 | %val9 = load i64, i64 *%ptr9 |
Richard Sandiford | ed1fab6 | 2013-07-03 10:10:02 +0000 | [diff] [blame] | 125 | |
| 126 | %ret = call i64 @foo() |
| 127 | |
| 128 | %and0 = and i64 %ret, %val0 |
| 129 | %and1 = and i64 %and0, %val1 |
| 130 | %and2 = and i64 %and1, %val2 |
| 131 | %and3 = and i64 %and2, %val3 |
| 132 | %and4 = and i64 %and3, %val4 |
| 133 | %and5 = and i64 %and4, %val5 |
| 134 | %and6 = and i64 %and5, %val6 |
| 135 | %and7 = and i64 %and6, %val7 |
| 136 | %and8 = and i64 %and7, %val8 |
| 137 | %and9 = and i64 %and8, %val9 |
| 138 | |
| 139 | ret i64 %and9 |
| 140 | } |