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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / SystemZ / atomicrmw-xor-01.ll
blob: 365266cecee1358ce4d49265bee39d65eb180ed6 [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]1; Test 8-bit atomic XORs.
2;
Mandeep Singh Grang029a0562016-04-19 23:51:52 +0000[diff] [blame]3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
5; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
6
7; Check XOR of a variable.
8; - CHECK is for the main loop.
9; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
10; RLL is set up correctly. The negation is independent of the NILL and L
11; tested in CHECK.
12; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
13; before being used. This shift is independent of the other loop prologue
14; instructions.
15define i8 @f1(i8 *%src, i8 %b) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]16; CHECK-LABEL: f1:
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]17; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
Jonas Paulssonc63ed222017-10-06 13:59:28 +0000[diff] [blame]18; CHECK-DAG: sll %r2, 3
19; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]20; CHECK: [[LABEL:\.[^:]*]]:
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]21; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]22; CHECK: xr [[ROT]], %r3
23; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]24; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
Richard Sandiford3d768e32013-07-31 12:30:20 +0000[diff] [blame]25; CHECK: jl [[LABEL]]
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]26; CHECK: rll %r2, [[OLD]], 8(%r2)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]27; CHECK: br %r14
28;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]29; CHECK-SHIFT1-LABEL: f1:
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]30; CHECK-SHIFT1: sll %r2, 3
31; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]32; CHECK-SHIFT1: rll
33; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
34; CHECK-SHIFT1: rll
35; CHECK-SHIFT1: br %r14
36;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]37; CHECK-SHIFT2-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]38; CHECK-SHIFT2: sll %r3, 24
39; CHECK-SHIFT2: rll
40; CHECK-SHIFT2: xr {{%r[0-9]+}}, %r3
41; CHECK-SHIFT2: rll
42; CHECK-SHIFT2: rll
43; CHECK-SHIFT2: br %r14
44 %res = atomicrmw xor i8 *%src, i8 %b seq_cst
45 ret i8 %res
46}
47
48; Check the minimum signed value. We XOR the rotated word with 0x80000000.
49define i8 @f2(i8 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]50; CHECK-LABEL: f2:
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]51; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
Jonas Paulssonc63ed222017-10-06 13:59:28 +0000[diff] [blame]52; CHECK-DAG: sll %r2, 3
53; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]54; CHECK: [[LABEL:\.[^:]*]]:
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]55; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]56; CHECK: xilf [[ROT]], 2147483648
57; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]58; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
Richard Sandiford3d768e32013-07-31 12:30:20 +0000[diff] [blame]59; CHECK: jl [[LABEL]]
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]60; CHECK: rll %r2, [[OLD]], 8(%r2)
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]61; CHECK: br %r14
62;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]63; CHECK-SHIFT1-LABEL: f2:
Matt Arsenaultab2232c2016-04-29 19:53:16 +0000[diff] [blame]64; CHECK-SHIFT1: sll %r2, 3
65; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]66; CHECK-SHIFT1: rll
67; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
68; CHECK-SHIFT1: rll
69; CHECK-SHIFT1: br %r14
70;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]71; CHECK-SHIFT2-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]72; CHECK-SHIFT2: br %r14
73 %res = atomicrmw xor i8 *%src, i8 -128 seq_cst
74 ret i8 %res
75}
76
77; Check XORs of -1. We XOR the rotated word with 0xff000000.
78define i8 @f3(i8 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]79; CHECK-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]80; CHECK: xilf [[ROT]], 4278190080
81; CHECK: br %r14
82;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]83; CHECK-SHIFT1-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]84; CHECK-SHIFT1: br %r14
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]85; CHECK-SHIFT2-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]86; CHECK-SHIFT2: br %r14
87 %res = atomicrmw xor i8 *%src, i8 -1 seq_cst
88 ret i8 %res
89}
90
91; Check XORs of 1. We XOR the rotated word with 0x01000000.
92define i8 @f4(i8 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]93; CHECK-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]94; CHECK: xilf [[ROT]], 16777216
95; CHECK: br %r14
96;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]97; CHECK-SHIFT1-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]98; CHECK-SHIFT1: br %r14
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]99; CHECK-SHIFT2-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]100; CHECK-SHIFT2: br %r14
101 %res = atomicrmw xor i8 *%src, i8 1 seq_cst
102 ret i8 %res
103}
104
105; Check the maximum signed value. We XOR the rotated word with 0x7f000000.
106define i8 @f5(i8 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]107; CHECK-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]108; CHECK: xilf [[ROT]], 2130706432
109; CHECK: br %r14
110;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]111; CHECK-SHIFT1-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]112; CHECK-SHIFT1: br %r14
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]113; CHECK-SHIFT2-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]114; CHECK-SHIFT2: br %r14
115 %res = atomicrmw xor i8 *%src, i8 127 seq_cst
116 ret i8 %res
117}
118
119; Check XORs of a large unsigned value. We XOR the rotated word with
120; 0xfd000000.
121define i8 @f6(i8 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]122; CHECK-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]123; CHECK: xilf [[ROT]], 4244635648
124; CHECK: br %r14
125;
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]126; CHECK-SHIFT1-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]127; CHECK-SHIFT1: br %r14
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]128; CHECK-SHIFT2-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]129; CHECK-SHIFT2: br %r14
130 %res = atomicrmw xor i8 *%src, i8 253 seq_cst
131 ret i8 %res
132}