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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / SystemZ / int-sadd-06.ll
blob: f389762f2b833a0fe0530f1740bd2a04d61e24d3 [file] [log] [blame]
Ulrich Weigandc3ec80f2018-04-30 17:54:28 +0000[diff] [blame]1; Test 32-bit addition in which the second operand is constant.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
5
6declare i32 @foo()
7
8; Check additions of 1.
9define zeroext i1 @f1(i32 %dummy, i32 %a, i32 *%res) {
10; CHECK-LABEL: f1:
11; CHECK: ahi %r3, 1
12; CHECK-DAG: st %r3, 0(%r4)
13; CHECK-DAG: ipm [[REG:%r[0-5]]]
14; CHECK-DAG: afi [[REG]], 1342177280
15; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
16; CHECK: br %r14
17 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
18 %val = extractvalue {i32, i1} %t, 0
19 %obit = extractvalue {i32, i1} %t, 1
20 store i32 %val, i32 *%res
21 ret i1 %obit
22}
23
24; Check the high end of the AHI range.
25define zeroext i1 @f2(i32 %dummy, i32 %a, i32 *%res) {
26; CHECK-LABEL: f2:
27; CHECK: ahi %r3, 32767
28; CHECK-DAG: st %r3, 0(%r4)
29; CHECK-DAG: ipm [[REG:%r[0-5]]]
30; CHECK-DAG: afi [[REG]], 1342177280
31; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
32; CHECK: br %r14
33 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 32767)
34 %val = extractvalue {i32, i1} %t, 0
35 %obit = extractvalue {i32, i1} %t, 1
36 store i32 %val, i32 *%res
37 ret i1 %obit
38}
39
40; Check the next value up, which must use AFI instead.
41define zeroext i1 @f3(i32 %dummy, i32 %a, i32 *%res) {
42; CHECK-LABEL: f3:
43; CHECK: afi %r3, 32768
44; CHECK-DAG: st %r3, 0(%r4)
45; CHECK-DAG: ipm [[REG:%r[0-5]]]
46; CHECK-DAG: afi [[REG]], 1342177280
47; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
48; CHECK: br %r14
49 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 32768)
50 %val = extractvalue {i32, i1} %t, 0
51 %obit = extractvalue {i32, i1} %t, 1
52 store i32 %val, i32 *%res
53 ret i1 %obit
54}
55
56; Check the high end of the signed 32-bit range.
57define zeroext i1 @f4(i32 %dummy, i32 %a, i32 *%res) {
58; CHECK-LABEL: f4:
59; CHECK: afi %r3, 2147483647
60; CHECK-DAG: st %r3, 0(%r4)
61; CHECK-DAG: ipm [[REG:%r[0-5]]]
62; CHECK-DAG: afi [[REG]], 1342177280
63; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
64; CHECK: br %r14
65 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 2147483647)
66 %val = extractvalue {i32, i1} %t, 0
67 %obit = extractvalue {i32, i1} %t, 1
68 store i32 %val, i32 *%res
69 ret i1 %obit
70}
71
72; Check the next value up, which is treated as a negative value.
73define zeroext i1 @f5(i32 %dummy, i32 %a, i32 *%res) {
74; CHECK-LABEL: f5:
75; CHECK: afi %r3, -2147483648
76; CHECK-DAG: st %r3, 0(%r4)
77; CHECK-DAG: ipm [[REG:%r[0-5]]]
78; CHECK-DAG: afi [[REG]], 1342177280
79; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
80; CHECK: br %r14
81 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 2147483648)
82 %val = extractvalue {i32, i1} %t, 0
83 %obit = extractvalue {i32, i1} %t, 1
84 store i32 %val, i32 *%res
85 ret i1 %obit
86}
87
88; Check the high end of the negative AHI range.
89define zeroext i1 @f6(i32 %dummy, i32 %a, i32 *%res) {
90; CHECK-LABEL: f6:
91; CHECK: ahi %r3, -1
92; CHECK-DAG: st %r3, 0(%r4)
93; CHECK-DAG: ipm [[REG:%r[0-5]]]
94; CHECK-DAG: afi [[REG]], 1342177280
95; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
96; CHECK: br %r14
97 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -1)
98 %val = extractvalue {i32, i1} %t, 0
99 %obit = extractvalue {i32, i1} %t, 1
100 store i32 %val, i32 *%res
101 ret i1 %obit
102}
103
104; Check the low end of the AHI range.
105define zeroext i1 @f7(i32 %dummy, i32 %a, i32 *%res) {
106; CHECK-LABEL: f7:
107; CHECK: ahi %r3, -32768
108; CHECK-DAG: st %r3, 0(%r4)
109; CHECK-DAG: ipm [[REG:%r[0-5]]]
110; CHECK-DAG: afi [[REG]], 1342177280
111; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
112; CHECK: br %r14
113 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -32768)
114 %val = extractvalue {i32, i1} %t, 0
115 %obit = extractvalue {i32, i1} %t, 1
116 store i32 %val, i32 *%res
117 ret i1 %obit
118}
119
120; Check the next value down, which must use AFI instead.
121define zeroext i1 @f8(i32 %dummy, i32 %a, i32 *%res) {
122; CHECK-LABEL: f8:
123; CHECK: afi %r3, -32769
124; CHECK-DAG: st %r3, 0(%r4)
125; CHECK-DAG: ipm [[REG:%r[0-5]]]
126; CHECK-DAG: afi [[REG]], 1342177280
127; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
128; CHECK: br %r14
129 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -32769)
130 %val = extractvalue {i32, i1} %t, 0
131 %obit = extractvalue {i32, i1} %t, 1
132 store i32 %val, i32 *%res
133 ret i1 %obit
134}
135
136; Check the low end of the signed 32-bit range.
137define zeroext i1 @f9(i32 %dummy, i32 %a, i32 *%res) {
138; CHECK-LABEL: f9:
139; CHECK: afi %r3, -2147483648
140; CHECK-DAG: st %r3, 0(%r4)
141; CHECK-DAG: ipm [[REG:%r[0-5]]]
142; CHECK-DAG: afi [[REG]], 1342177280
143; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
144; CHECK: br %r14
145 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -2147483648)
146 %val = extractvalue {i32, i1} %t, 0
147 %obit = extractvalue {i32, i1} %t, 1
148 store i32 %val, i32 *%res
149 ret i1 %obit
150}
151
152; Check the next value down, which is treated as a positive value.
153define zeroext i1 @f10(i32 %dummy, i32 %a, i32 *%res) {
154; CHECK-LABEL: f10:
155; CHECK: afi %r3, 2147483647
156; CHECK-DAG: st %r3, 0(%r4)
157; CHECK-DAG: ipm [[REG:%r[0-5]]]
158; CHECK-DAG: afi [[REG]], 1342177280
159; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
160; CHECK: br %r14
161 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 -2147483649)
162 %val = extractvalue {i32, i1} %t, 0
163 %obit = extractvalue {i32, i1} %t, 1
164 store i32 %val, i32 *%res
165 ret i1 %obit
166}
167
168; Check using the overflow result for a branch.
169define void @f11(i32 %dummy, i32 %a, i32 *%res) {
170; CHECK-LABEL: f11:
171; CHECK: ahi %r3, 1
172; CHECK: st %r3, 0(%r4)
173; CHECK: {{jgo foo@PLT|bnor %r14}}
174; CHECK: {{br %r14|jg foo@PLT}}
175 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
176 %val = extractvalue {i32, i1} %t, 0
177 %obit = extractvalue {i32, i1} %t, 1
178 store i32 %val, i32 *%res
179 br i1 %obit, label %call, label %exit
180
181call:
182 tail call i32 @foo()
183 br label %exit
184
185exit:
186 ret void
187}
188
189; ... and the same with the inverted direction.
190define void @f12(i32 %dummy, i32 %a, i32 *%res) {
191; CHECK-LABEL: f12:
192; CHECK: ahi %r3, 1
193; CHECK: st %r3, 0(%r4)
194; CHECK: {{jgno foo@PLT|bor %r14}}
195; CHECK: {{br %r14|jg foo@PLT}}
196 %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 1)
197 %val = extractvalue {i32, i1} %t, 0
198 %obit = extractvalue {i32, i1} %t, 1
199 store i32 %val, i32 *%res
200 br i1 %obit, label %exit, label %call
201
202call:
203 tail call i32 @foo()
204 br label %exit
205
206exit:
207 ret void
208}
209
210
211declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
212