blob: 85c81c634dbefc9c7fed1900e42494e7169393bf [file] [log] [blame]
Ulrich Weigandc3ec80f2018-04-30 17:54:28 +00001; Test the three-operand form of 64-bit addition.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
4
5declare i64 @foo(i64, i64, i64)
6
7; Check ALGRK.
8define i64 @f1(i64 %dummy, i64 %a, i64 %b, i64 *%flag) {
9; CHECK-LABEL: f1:
10; CHECK: algrk %r2, %r3, %r4
11; CHECK: ipm [[REG1:%r[0-5]]]
12; CHECK: risbg [[REG2:%r[0-5]]], [[REG1]], 63, 191, 35
13; CHECK: stg [[REG2]], 0(%r5)
14; CHECK: br %r14
15 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
16 %val = extractvalue {i64, i1} %t, 0
17 %obit = extractvalue {i64, i1} %t, 1
18 %ext = zext i1 %obit to i64
19 store i64 %ext, i64 *%flag
20 ret i64 %val
21}
22
23; Check using the overflow result for a branch.
24define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
25; CHECK-LABEL: f2:
26; CHECK: algrk %r2, %r3, %r4
27; CHECK-NEXT: bler %r14
28; CHECK: lghi %r2, 0
29; CHECK: jg foo@PLT
30 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
31 %val = extractvalue {i64, i1} %t, 0
32 %obit = extractvalue {i64, i1} %t, 1
33 br i1 %obit, label %call, label %exit
34
35call:
36 %res = tail call i64 @foo(i64 0, i64 %a, i64 %b)
37 ret i64 %res
38
39exit:
40 ret i64 %val
41}
42
43; ... and the same with the inverted direction.
44define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
45; CHECK-LABEL: f3:
46; CHECK: algrk %r2, %r3, %r4
47; CHECK-NEXT: bnler %r14
48; CHECK: lghi %r2, 0
49; CHECK: jg foo@PLT
50 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
51 %val = extractvalue {i64, i1} %t, 0
52 %obit = extractvalue {i64, i1} %t, 1
53 br i1 %obit, label %exit, label %call
54
55call:
56 %res = tail call i64 @foo(i64 0, i64 %a, i64 %b)
57 ret i64 %res
58
59exit:
60 ret i64 %val
61}
62
63; Check that we can still use ALGR in obvious cases.
64define i64 @f4(i64 %a, i64 %b, i64 *%flag) {
65; CHECK-LABEL: f4:
66; CHECK: algr %r2, %r3
67; CHECK: ipm [[REG1:%r[0-5]]]
68; CHECK: risbg [[REG2:%r[0-5]]], [[REG1]], 63, 191, 35
69; CHECK: stg [[REG2]], 0(%r4)
70; CHECK: br %r14
71 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)
72 %val = extractvalue {i64, i1} %t, 0
73 %obit = extractvalue {i64, i1} %t, 1
74 %ext = zext i1 %obit to i64
75 store i64 %ext, i64 *%flag
76 ret i64 %val
77}
78
79declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
80