Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / SystemZ / knownbits-intrinsics-binop.ll
blob: 3bcbbb45581f9cddd8e41f816427ceda2288ae9a [file] [log] [blame]
Jonas Paulsson13896072018-03-17 08:32:12 +0000[diff] [blame]1; Test that DAGCombiner gets helped by computeKnownBitsForTargetNode() with
2; vector intrinsics.
3;
4; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
5
6declare {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16>, <8 x i16>)
7declare {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32>, <4 x i32>)
8declare {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64>, <2 x i64>)
9
10; PACKS_CC (operand elements are 0): i64 -> i32
11define <4 x i32> @f0() {
12; CHECK-LABEL: f0:
13; CHECK-LABEL: # %bb.0:
14; CHECK-NEXT: vgbm %v24, 0
15; CHECK-NEXT: br %r14
16 %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> <i64 0, i64 0>, <2 x i64> <i64 0, i64 0>)
17 %extr = extractvalue {<4 x i32>, i32} %call, 0
18 %and = and <4 x i32> %extr, <i32 1, i32 1, i32 1, i32 1>
19 ret <4 x i32> %and
20}
21
22; PACKS_CC (operand elements are 1): i64 -> i32
23; NOTE: The vector AND is optimized away, but vrepig+vpksgs is used instead
24; of vrepif. Similarly for more test cases below.
25define <4 x i32> @f1() {
26; CHECK-LABEL: f1:
27; CHECK-LABEL: # %bb.0:
28; CHECK-NEXT: vrepig %v0, 1
29; CHECK-NEXT: vpksgs %v24, %v0, %v0
30; CHECK-NEXT: br %r14
31 %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> <i64 1, i64 1>, <2 x i64> <i64 1, i64 1>)
32 %extr = extractvalue {<4 x i32>, i32} %call, 0
33 %and = and <4 x i32> %extr, <i32 1, i32 1, i32 1, i32 1>
34 ret <4 x i32> %and
35}
36
37; PACKS_CC (operand elements are 0): i32 -> i16
38define <8 x i16> @f2() {
39; CHECK-LABEL: f2:
40; CHECK-LABEL: # %bb.0:
41; CHECK-NEXT: vgbm %v24, 0
42; CHECK-NEXT: br %r14
43 %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> <i32 0, i32 0, i32 0, i32 0>,
44 <4 x i32> <i32 0, i32 0, i32 0, i32 0>)
45 %extr = extractvalue {<8 x i16>, i32} %call, 0
46 %and = and <8 x i16> %extr, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
47 ret <8 x i16> %and
48}
49
50; PACKS_CC (operand elements are 1): i32 -> i16
51define <8 x i16> @f3() {
52; CHECK-LABEL: f3:
53; CHECK-LABEL: # %bb.0:
54; CHECK-NEXT: vrepif %v0, 1
55; CHECK-NEXT: vpksfs %v24, %v0, %v0
56; CHECK-NEXT: br %r14
57 %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> <i32 1, i32 1, i32 1, i32 1>,
58 <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
59 %extr = extractvalue {<8 x i16>, i32} %call, 0
60 %and = and <8 x i16> %extr, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
61 ret <8 x i16> %and
62}
63
64; PACKS_CC (operand elements are 0): i16 -> i8
65define <16 x i8> @f4() {
66; CHECK-LABEL: f4:
67; CHECK-LABEL: # %bb.0:
68; CHECK-NEXT: vgbm %v24, 0
69; CHECK-NEXT: br %r14
70 %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(
71 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>,
72 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
73 %extr = extractvalue {<16 x i8>, i32} %call, 0
74 %and = and <16 x i8> %extr, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
75 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
76 ret <16 x i8> %and
77}
78
79; PACKS_CC (operand elements are 1): i16 -> i8
80define <16 x i8> @f5() {
81; CHECK-LABEL: f5:
82; CHECK-LABEL: # %bb.0:
83; CHECK-NEXT: vrepih %v0, 1
84; CHECK-NEXT: vpkshs %v24, %v0, %v0
85; CHECK-NEXT: br %r14
86 %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(
87 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>,
88 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
89 %extr = extractvalue {<16 x i8>, i32} %call, 0
90 %and = and <16 x i8> %extr, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
91 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
92 ret <16 x i8> %and
93}
94
95declare {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16>, <8 x i16>)
96declare {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32>, <4 x i32>)
97declare {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64>, <2 x i64>)
98
99; PACKLS_CC (operand elements are 0): i64 -> i32
100define <4 x i32> @f6() {
101; CHECK-LABEL: f6:
102; CHECK-LABEL: # %bb.0:
103; CHECK-NEXT: vgbm %v24, 0
104; CHECK-NEXT: br %r14
105 %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> <i64 0, i64 0>, <2 x i64> <i64 0, i64 0>)
106 %extr = extractvalue {<4 x i32>, i32} %call, 0
107 %and = and <4 x i32> %extr, <i32 1, i32 1, i32 1, i32 1>
108 ret <4 x i32> %and
109}
110
111; PACKLS_CC (operand elements are 1): i64 -> i32
112define <4 x i32> @f7() {
113; CHECK-LABEL: f7:
114; CHECK-LABEL: # %bb.0:
115; CHECK-NEXT: vrepig %v0, 1
116; CHECK-NEXT: vpklsgs %v24, %v0, %v0
117; CHECK-NEXT: br %r14
118 %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> <i64 1, i64 1>, <2 x i64> <i64 1, i64 1>)
119 %extr = extractvalue {<4 x i32>, i32} %call, 0
120 %and = and <4 x i32> %extr, <i32 1, i32 1, i32 1, i32 1>
121 ret <4 x i32> %and
122}
123
124; PACKLS_CC (operand elements are 0): i32 -> i16
125define <8 x i16> @f8() {
126; CHECK-LABEL: f8:
127; CHECK-LABEL: # %bb.0:
128; CHECK-NEXT: vgbm %v24, 0
129; CHECK-NEXT: br %r14
130 %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> <i32 0, i32 0, i32 0, i32 0>,
131 <4 x i32> <i32 0, i32 0, i32 0, i32 0>)
132 %extr = extractvalue {<8 x i16>, i32} %call, 0
133 %and = and <8 x i16> %extr, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
134 ret <8 x i16> %and
135}
136
137; PACKLS_CC (operand elements are 1): i32 -> i16
138define <8 x i16> @f9() {
139; CHECK-LABEL: f9:
140; CHECK-LABEL: # %bb.0:
141; CHECK-NEXT: vrepif %v0, 1
142; CHECK-NEXT: vpklsfs %v24, %v0, %v0
143; CHECK-NEXT: br %r14
144 %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> <i32 1, i32 1, i32 1, i32 1>,
145 <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
146 %extr = extractvalue {<8 x i16>, i32} %call, 0
147 %and = and <8 x i16> %extr, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
148 ret <8 x i16> %and
149}
150
151; PACKLS_CC (operand elements are 0): i16 -> i8
152define <16 x i8> @f10() {
153; CHECK-LABEL: f10:
154; CHECK-LABEL: # %bb.0:
155; CHECK-NEXT: vgbm %v24, 0
156; CHECK-NEXT: br %r14
157 %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(
158 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>,
159 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
160 %extr = extractvalue {<16 x i8>, i32} %call, 0
161 %and = and <16 x i8> %extr, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
162 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
163 ret <16 x i8> %and
164}
165
166; PACKLS_CC (operand elements are 1): i16 -> i8
167define <16 x i8> @f11() {
168; CHECK-LABEL: f11:
169; CHECK-LABEL: # %bb.0:
170; CHECK-NEXT: vrepih %v0, 1
171; CHECK-NEXT: vpklshs %v24, %v0, %v0
172; CHECK-NEXT: br %r14
173 %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(
174 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>,
175 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
176 %extr = extractvalue {<16 x i8>, i32} %call, 0
177 %and = and <16 x i8> %extr, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
178 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
179 ret <16 x i8> %and
180}
181
182declare <16 x i8> @llvm.s390.vpksh(<8 x i16>, <8 x i16>)
183declare <8 x i16> @llvm.s390.vpksf(<4 x i32>, <4 x i32>)
184declare <4 x i32> @llvm.s390.vpksg(<2 x i64>, <2 x i64>)
185
186; PACKS (operand elements are 0): i64 -> i32
187define <4 x i32> @f12() {
188; CHECK-LABEL: f12:
189; CHECK-LABEL: # %bb.0:
190; CHECK-NEXT: vgbm %v24, 0
191; CHECK-NEXT: br %r14
192 %call = call <4 x i32> @llvm.s390.vpksg(<2 x i64> <i64 0, i64 0>, <2 x i64> <i64 0, i64 0>)
193 %and = and <4 x i32> %call, <i32 1, i32 1, i32 1, i32 1>
194 ret <4 x i32> %and
195}
196
197; PACKS (operand elements are 1): i64 -> i32
198define <4 x i32> @f13() {
199; CHECK-LABEL: f13:
200; CHECK-LABEL: # %bb.0:
201; CHECK-NEXT: vrepig %v0, 1
202; CHECK-NEXT: vpksg %v24, %v0, %v0
203; CHECK-NEXT: br %r14
204 %call = call <4 x i32> @llvm.s390.vpksg(<2 x i64> <i64 1, i64 1>, <2 x i64> <i64 1, i64 1>)
205 %and = and <4 x i32> %call, <i32 1, i32 1, i32 1, i32 1>
206 ret <4 x i32> %and
207}
208
209; PACKS (operand elements are 0): i32 -> i16
210define <8 x i16> @f14() {
211; CHECK-LABEL: f14:
212; CHECK-LABEL: # %bb.0:
213; CHECK-NEXT: vgbm %v24, 0
214; CHECK-NEXT: br %r14
215 %call = call <8 x i16> @llvm.s390.vpksf(<4 x i32> <i32 0, i32 0, i32 0, i32 0>,
216 <4 x i32> <i32 0, i32 0, i32 0, i32 0>)
217 %and = and <8 x i16> %call, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
218 ret <8 x i16> %and
219}
220
221; PACKS (operand elements are 1): i32 -> i16
222define <8 x i16> @f15() {
223; CHECK-LABEL: f15:
224; CHECK-LABEL: # %bb.0:
225; CHECK-NEXT: vrepif %v0, 1
226; CHECK-NEXT: vpksf %v24, %v0, %v0
227; CHECK-NEXT: br %r14
228 %call = call <8 x i16> @llvm.s390.vpksf(<4 x i32> <i32 1, i32 1, i32 1, i32 1>,
229 <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
230 %and = and <8 x i16> %call, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
231 ret <8 x i16> %and
232}
233
234; PACKS (operand elements are 0): i16 -> i8
235define <16 x i8> @f16() {
236; CHECK-LABEL: f16:
237; CHECK-LABEL: # %bb.0:
238; CHECK-NEXT: vgbm %v24, 0
239; CHECK-NEXT: br %r14
240 %call = call <16 x i8> @llvm.s390.vpksh(
241 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>,
242 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
243 %and = and <16 x i8> %call, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
244 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
245 ret <16 x i8> %and
246}
247
248; PACKS (operand elements are 1): i16 -> i8
249define <16 x i8> @f17() {
250; CHECK-LABEL: f17:
251; CHECK-LABEL: # %bb.0:
252; CHECK-NEXT: vrepih %v0, 1
253; CHECK-NEXT: vpksh %v24, %v0, %v0
254; CHECK-NEXT: br %r14
255 %call = call <16 x i8> @llvm.s390.vpksh(
256 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>,
257 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
258 %and = and <16 x i8> %call, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
259 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
260 ret <16 x i8> %and
261}
262
263declare <16 x i8> @llvm.s390.vpklsh(<8 x i16>, <8 x i16>)
264declare <8 x i16> @llvm.s390.vpklsf(<4 x i32>, <4 x i32>)
265declare <4 x i32> @llvm.s390.vpklsg(<2 x i64>, <2 x i64>)
266
267; PACKLS (operand elements are 0): i64 -> i32
268define <4 x i32> @f18() {
269; CHECK-LABEL: f18:
270; CHECK-LABEL: # %bb.0:
271; CHECK-NEXT: vgbm %v24, 0
272; CHECK-NEXT: br %r14
273 %call = call <4 x i32> @llvm.s390.vpklsg(<2 x i64> <i64 0, i64 0>, <2 x i64> <i64 0, i64 0>)
274 %and = and <4 x i32> %call, <i32 1, i32 1, i32 1, i32 1>
275 ret <4 x i32> %and
276}
277
278; PACKLS (operand elements are 1): i64 -> i32
279define <4 x i32> @f19() {
280; CHECK-LABEL: f19:
281; CHECK-LABEL: # %bb.0:
282; CHECK-NEXT: vrepig %v0, 1
283; CHECK-NEXT: vpklsg %v24, %v0, %v0
284; CHECK-NEXT: br %r14
285 %call = call <4 x i32> @llvm.s390.vpklsg(<2 x i64> <i64 1, i64 1>, <2 x i64> <i64 1, i64 1>)
286 %and = and <4 x i32> %call, <i32 1, i32 1, i32 1, i32 1>
287 ret <4 x i32> %and
288}
289
290; PACKLS (operand elements are 0): i32 -> i16
291define <8 x i16> @f20() {
292; CHECK-LABEL: f20:
293; CHECK-LABEL: # %bb.0:
294; CHECK-NEXT: vgbm %v24, 0
295; CHECK-NEXT: br %r14
296 %call = call <8 x i16> @llvm.s390.vpklsf(<4 x i32> <i32 0, i32 0, i32 0, i32 0>,
297 <4 x i32> <i32 0, i32 0, i32 0, i32 0>)
298 %and = and <8 x i16> %call, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
299 ret <8 x i16> %and
300}
301
302; PACKLS (operand elements are 1): i32 -> i16
303define <8 x i16> @f21() {
304; CHECK-LABEL: f21:
305; CHECK-LABEL: # %bb.0:
306; CHECK-NEXT: vrepif %v0, 1
307; CHECK-NEXT: vpklsf %v24, %v0, %v0
308; CHECK-NEXT: br %r14
309 %call = call <8 x i16> @llvm.s390.vpklsf(<4 x i32> <i32 1, i32 1, i32 1, i32 1>,
310 <4 x i32> <i32 1, i32 1, i32 1, i32 1>)
311 %and = and <8 x i16> %call, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
312 ret <8 x i16> %and
313}
314
315; PACKLS (operand elements are 0): i16 -> i8
316define <16 x i8> @f22() {
317; CHECK-LABEL: f22:
318; CHECK-LABEL: # %bb.0:
319; CHECK-NEXT: vgbm %v24, 0
320; CHECK-NEXT: br %r14
321 %call = call <16 x i8> @llvm.s390.vpklsh(
322 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>,
323 <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
324 %and = and <16 x i8> %call, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
325 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
326 ret <16 x i8> %and
327}
328
329; PACKLS (operand elements are 1): i16 -> i8
330define <16 x i8> @f23() {
331; CHECK-LABEL: f23:
332; CHECK-LABEL: # %bb.0:
333; CHECK-NEXT: vrepih %v0, 1
334; CHECK-NEXT: vpklsh %v24, %v0, %v0
335; CHECK-NEXT: br %r14
336 %call = call <16 x i8> @llvm.s390.vpklsh(
337 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>,
338 <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
339 %and = and <16 x i8> %call, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
340 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
341 ret <16 x i8> %and
342}
343
344declare <2 x i64> @llvm.s390.vpdi(<2 x i64>, <2 x i64>, i32)
345
346; VPDI (operand elements are 0):
347define <2 x i64> @f24() {
348; CHECK-LABEL: f24:
349; CHECK-LABEL: # %bb.0:
350; CHECK-NEXT: vgbm %v24, 0
351; CHECK-NEXT: br %r14
352 %perm = call <2 x i64> @llvm.s390.vpdi(<2 x i64> <i64 0, i64 0>,
353 <2 x i64> <i64 0, i64 0>, i32 0)
354 %res = and <2 x i64> %perm, <i64 1, i64 1>
355 ret <2 x i64> %res
356}
357
358; VPDI (operand elements are 1):
359define <2 x i64> @f25() {
360; CHECK-LABEL: f25:
361; CHECK-LABEL: # %bb.0:
362; CHECK-NEXT: vrepig %v0, 1
363; CHECK-NEXT: vpdi %v24, %v0, %v0, 0
364; CHECK-NEXT: br %r14
365 %perm = call <2 x i64> @llvm.s390.vpdi(<2 x i64> <i64 1, i64 1>,
366 <2 x i64> <i64 1, i64 1>, i32 0)
367 %res = and <2 x i64> %perm, <i64 1, i64 1>
368 ret <2 x i64> %res
369}
370
371declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32)
372
373; VSLDB (operand elements are 0):
374define <16 x i8> @f26() {
375; CHECK-LABEL: f26:
376; CHECK-LABEL: # %bb.0:
377; CHECK-NEXT: vgbm %v24, 0
378; CHECK-NEXT: br %r14
379 %shfd = call <16 x i8> @llvm.s390.vsldb(<16 x i8>
380 <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
381 i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8>
382 <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
383 i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>,
384 i32 1)
385
386 %res = and <16 x i8> %shfd, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
387 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
388 ret <16 x i8> %res
389}
390
391; VSLDB (operand elements are 1):
392define <16 x i8> @f27() {
393; CHECK-LABEL: f27:
394; CHECK-LABEL: # %bb.0:
395; CHECK-NEXT: vrepib %v0, 1
396; CHECK-NEXT: vsldb %v24, %v0, %v0, 1
397; CHECK-NEXT: br %r14
398 %shfd = call <16 x i8> @llvm.s390.vsldb(<16 x i8>
399 <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
400 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <16 x i8>
401 <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
402 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>,
403 i32 1)
404
405 %res = and <16 x i8> %shfd, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
406 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
407 ret <16 x i8> %res
408}
409
410; Test that intrinsic CC result is recognized.
411define i32 @f28(<4 x i32> %a, <4 x i32> %b) {
412; CHECK-LABEL: f28:
413; CHECK-LABEL: # %bb.0:
414; CHECK-NEXT: lhi %r2, 0
415; CHECK-NEXT: br %r14
416 %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> %a, <4 x i32> %b)
417 %cc = extractvalue {<8 x i16>, i32} %call, 1
418 %res = and i32 %cc, -4
419 ret i32 %res
420}
421
422declare <16 x i8> @llvm.s390.vperm(<16 x i8>, <16 x i8>, <16 x i8>)
423
424; Test VPERM (operand elements are 0):
425define <16 x i8> @f29() {
426; CHECK-LABEL: f29:
427; CHECK-LABEL: # %bb.0:
428; CHECK-NEXT: vgbm %v24, 0
429; CHECK-NEXT: br %r14
430 %perm = call <16 x i8> @llvm.s390.vperm(
431 <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
432 i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>,
433 <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
434 i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>,
435 <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
436 i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
437 %res = and <16 x i8> %perm, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
438 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
439 ret <16 x i8> %res
440}
441
442; Test VPERM (operand elements are 1):
443define <16 x i8> @f30() {
444; CHECK-LABEL: f30:
445; CHECK-LABEL: # %bb.0:
446; CHECK-NEXT: vgbm %v0, 0
447; CHECK-NEXT: vrepib %v1, 1
448; CHECK-NEXT: vperm %v24, %v1, %v1, %v0
449; CHECK-NEXT: br %r14
450 %perm = call <16 x i8> @llvm.s390.vperm(
451 <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
452 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>,
453 <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
454 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>,
455 <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,
456 i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
457 %res = and <16 x i8> %perm, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1,
458 i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
459 ret <16 x i8> %res
460}