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gerrit-public.fairphone.software / toolchain / llvm-project / 87b7eb9d0f9555835f35350c20d68957c8f1724c / . / llvm / test / CodeGen / ARM / fast-isel-pic.ll
blob: 838c103e7c09d55a5f6582ec20bf007a5e0f27a1 [file] [log] [blame]
Derek Schuffbd7c6e52013-05-14 16:26:38 +0000[diff] [blame]1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=arm-apple-ios | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARMv7
4; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s --check-prefix=THUMB-ELF
Jim Grosbach5f71aab2013-08-26 20:07:29 +0000[diff] [blame]5; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=armv7-none-linux-gnueabi | FileCheck %s --check-prefix=ARMv7-ELF
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]6
7@g = global i32 0, align 4
8
9define i32 @LoadGV() {
10entry:
11; THUMB: LoadGV
12; THUMB: movw [[reg0:r[0-9]+]],
13; THUMB: movt [[reg0]],
14; THUMB: add [[reg0]], pc
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]15; THUMB-ELF: LoadGV
Mihai Popa8a9da5b2013-07-22 15:49:36 +0000[diff] [blame]16; THUMB-ELF: ldr r[[reg0:[0-9]+]],
17; THUMB-ELF: ldr r[[reg1:[0-9]+]],
Andrew Tricke2431c62013-05-25 03:08:10 +0000[diff] [blame]18; THUMB-ELF: ldr r[[reg0]], [r[[reg0]], r[[reg1]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]19; ARM: LoadGV
20; ARM: ldr [[reg1:r[0-9]+]],
21; ARM: add [[reg1]], pc, [[reg1]]
22; ARMv7: LoadGV
23; ARMv7: movw [[reg2:r[0-9]+]],
24; ARMv7: movt [[reg2]],
25; ARMv7: add [[reg2]], pc, [[reg2]]
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]26; ARMv7-ELF: LoadGV
27; ARMv7-ELF: ldr r[[reg2:[0-9]+]],
Benjamin Kramer30920662013-08-16 12:52:08 +0000[diff] [blame]28; ARMv7-ELF: .LPC
29; ARMv7-ELF-NEXT: add r[[reg2]], pc
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]30; ARMv7-ELF: ldr r[[reg3:[0-9]+]],
JF Bastien18db1f22013-06-14 02:49:43 +0000[diff] [blame]31; ARMv7-ELF: ldr r[[reg2]], [r[[reg3]], r[[reg2]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]32 %tmp = load i32* @g
33 ret i32 %tmp
34}
35
36@i = external global i32
37
38define i32 @LoadIndirectSymbol() {
39entry:
40; THUMB: LoadIndirectSymbol
41; THUMB: movw r[[reg3:[0-9]+]],
42; THUMB: movt r[[reg3]],
43; THUMB: add r[[reg3]], pc
44; THUMB: ldr r[[reg3]], [r[[reg3]]]
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]45; THUMB-ELF: LoadIndirectSymbol
Mihai Popa8a9da5b2013-07-22 15:49:36 +0000[diff] [blame]46; THUMB-ELF: ldr r[[reg3:[0-9]+]],
47; THUMB-ELF: ldr r[[reg4:[0-9]+]],
Andrew Tricke2431c62013-05-25 03:08:10 +0000[diff] [blame]48; THUMB-ELF: ldr r[[reg3]], [r[[reg3]], r[[reg4]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]49; ARM: LoadIndirectSymbol
50; ARM: ldr [[reg4:r[0-9]+]],
51; ARM: ldr [[reg4]], [pc, [[reg4]]]
52; ARMv7: LoadIndirectSymbol
53; ARMv7: movw r[[reg5:[0-9]+]],
54; ARMv7: movt r[[reg5]],
55; ARMv7: add r[[reg5]], pc, r[[reg5]]
56; ARMv7: ldr r[[reg5]], [r[[reg5]]]
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]57; ARMv7-ELF: LoadIndirectSymbol
58; ARMv7-ELF: ldr r[[reg5:[0-9]+]],
Benjamin Kramer30920662013-08-16 12:52:08 +0000[diff] [blame]59; ARMv7-ELF: .LPC
60; ARMv7-ELF-NEXT: add r[[reg5]], pc
Jush Lu47172a02012-09-27 05:21:41 +0000[diff] [blame]61; ARMv7-ELF: ldr r[[reg6:[0-9]+]],
JF Bastien18db1f22013-06-14 02:49:43 +0000[diff] [blame]62; ARMv7-ELF: ldr r[[reg5]], [r[[reg6]], r[[reg5]]]
Jush Lue87e5592012-08-29 02:41:21 +0000[diff] [blame]63 %tmp = load i32* @i
64 ret i32 %tmp
65}