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Chandler Carruth93dcdc42015-01-31 11:17:59 +00001//===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file a TargetTransformInfo::Concept conforming object specific to the
11/// AMDGPU target machine. It uses the target's detailed information to
12/// provide more precise answers to certain TTI queries, while letting the
13/// target independent and default TTI implementations handle the rest.
14///
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
18#define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
19
20#include "AMDGPU.h"
21#include "AMDGPUTargetMachine.h"
22#include "llvm/Analysis/TargetTransformInfo.h"
23#include "llvm/CodeGen/BasicTTIImpl.h"
24#include "llvm/Target/TargetLowering.h"
25
26namespace llvm {
27
28class AMDGPUTTIImpl : public BasicTTIImplBase<AMDGPUTTIImpl> {
29 typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT;
30 typedef TargetTransformInfo TTI;
Chandler Carruthc340ca82015-02-01 14:01:15 +000031 friend BaseT;
Chandler Carruth93dcdc42015-01-31 11:17:59 +000032
33 const AMDGPUSubtarget *ST;
Chandler Carruthc340ca82015-02-01 14:01:15 +000034 const AMDGPUTargetLowering *TLI;
35
Chandler Carruthc956ab662015-02-01 14:22:17 +000036 const AMDGPUSubtarget *getST() const { return ST; }
Chandler Carruthc340ca82015-02-01 14:01:15 +000037 const AMDGPUTargetLowering *getTLI() const { return TLI; }
Chandler Carruth93dcdc42015-01-31 11:17:59 +000038
39public:
Mehdi Amini5010ebf2015-07-09 02:08:42 +000040 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM, const DataLayout &DL)
41 : BaseT(TM, DL), ST(TM->getSubtargetImpl()),
42 TLI(ST->getTargetLowering()) {}
Chandler Carruth93dcdc42015-01-31 11:17:59 +000043
44 // Provide value semantics. MSVC requires that we spell all of these out.
45 AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg)
Chandler Carruthc956ab662015-02-01 14:22:17 +000046 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
Chandler Carruth93dcdc42015-01-31 11:17:59 +000047 AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg)
Chandler Carruthc956ab662015-02-01 14:22:17 +000048 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
49 TLI(std::move(Arg.TLI)) {}
Chandler Carruth93dcdc42015-01-31 11:17:59 +000050
51 bool hasBranchDivergence() { return true; }
52
Chandler Carruthab5cb362015-02-01 14:31:23 +000053 void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP);
Chandler Carruth93dcdc42015-01-31 11:17:59 +000054
55 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
56 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
57 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software;
58 }
59
60 unsigned getNumberOfRegisters(bool Vector);
61 unsigned getRegisterBitWidth(bool Vector);
Wei Mi062c7442015-05-06 17:12:25 +000062 unsigned getMaxInterleaveFactor(unsigned VF);
Matt Arsenaulte830f542015-12-01 19:08:39 +000063
Matt Arsenaulte05ff152015-12-16 18:37:19 +000064 unsigned getCFInstrCost(unsigned Opcode);
65
Matt Arsenaulte830f542015-12-01 19:08:39 +000066 int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index);
Tom Stellarddbe374b2015-12-15 18:04:38 +000067 bool isSourceOfDivergence(const Value *V) const;
Chandler Carruth93dcdc42015-01-31 11:17:59 +000068};
69
70} // end namespace llvm
71
72#endif