Alex Bradbury | 8971842 | 2017-10-19 21:37:38 +0000 | [diff] [blame^] | 1 | //===-- RISCVAsmPrinter.cpp - RISCV LLVM assembly writer ------------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains a printer that converts from our internal representation |
| 11 | // of machine-dependent LLVM code to the RISCV assembly language. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #include "RISCV.h" |
| 16 | #include "InstPrinter/RISCVInstPrinter.h" |
| 17 | #include "RISCVTargetMachine.h" |
| 18 | #include "llvm/CodeGen/AsmPrinter.h" |
| 19 | #include "llvm/CodeGen/MachineConstantPool.h" |
| 20 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 21 | #include "llvm/CodeGen/MachineInstr.h" |
| 22 | #include "llvm/CodeGen/MachineModuleInfo.h" |
| 23 | #include "llvm/MC/MCAsmInfo.h" |
| 24 | #include "llvm/MC/MCInst.h" |
| 25 | #include "llvm/MC/MCStreamer.h" |
| 26 | #include "llvm/MC/MCSymbol.h" |
| 27 | #include "llvm/Support/TargetRegistry.h" |
| 28 | #include "llvm/Support/raw_ostream.h" |
| 29 | using namespace llvm; |
| 30 | |
| 31 | #define DEBUG_TYPE "asm-printer" |
| 32 | |
| 33 | namespace { |
| 34 | class RISCVAsmPrinter : public AsmPrinter { |
| 35 | public: |
| 36 | explicit RISCVAsmPrinter(TargetMachine &TM, |
| 37 | std::unique_ptr<MCStreamer> Streamer) |
| 38 | : AsmPrinter(TM, std::move(Streamer)) {} |
| 39 | |
| 40 | StringRef getPassName() const override { return "RISCV Assembly Printer"; } |
| 41 | |
| 42 | void EmitInstruction(const MachineInstr *MI) override; |
| 43 | |
| 44 | bool emitPseudoExpansionLowering(MCStreamer &OutStreamer, |
| 45 | const MachineInstr *MI); |
| 46 | }; |
| 47 | } |
| 48 | |
| 49 | // Simple pseudo-instructions have their lowering (with expansion to real |
| 50 | // instructions) auto-generated. |
| 51 | #include "RISCVGenMCPseudoLowering.inc" |
| 52 | |
| 53 | void RISCVAsmPrinter::EmitInstruction(const MachineInstr *MI) { |
| 54 | // Do any auto-generated pseudo lowerings. |
| 55 | if (emitPseudoExpansionLowering(*OutStreamer, MI)) |
| 56 | return; |
| 57 | |
| 58 | MCInst TmpInst; |
| 59 | LowerRISCVMachineInstrToMCInst(MI, TmpInst); |
| 60 | EmitToStreamer(*OutStreamer, TmpInst); |
| 61 | } |
| 62 | |
| 63 | // Force static initialization. |
| 64 | extern "C" void LLVMInitializeRISCVAsmPrinter() { |
| 65 | RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target()); |
| 66 | RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target()); |
| 67 | } |