Simon Pilgrim | 9961c55 | 2019-01-13 21:21:46 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2 |
| 3 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41 |
| 4 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42 |
| 5 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 |
| 6 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2 |
| 7 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512F |
| 8 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512BW |
| 9 | |
| 10 | declare i32 @llvm.ssub.sat.i32 (i32, i32) |
| 11 | declare i64 @llvm.ssub.sat.i64 (i64, i64) |
| 12 | declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>) |
| 13 | |
| 14 | ; fold (ssub_sat c, 0) -> x |
| 15 | define i32 @combine_zero_i32(i32 %a0) { |
| 16 | ; CHECK-LABEL: combine_zero_i32: |
| 17 | ; CHECK: # %bb.0: |
Simon Pilgrim | 897d4c6 | 2019-01-13 21:50:24 +0000 | [diff] [blame^] | 18 | ; CHECK-NEXT: movl %edi, %eax |
Simon Pilgrim | 9961c55 | 2019-01-13 21:21:46 +0000 | [diff] [blame] | 19 | ; CHECK-NEXT: retq |
| 20 | %1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 0); |
| 21 | ret i32 %1 |
| 22 | } |
| 23 | |
| 24 | define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) { |
Simon Pilgrim | 897d4c6 | 2019-01-13 21:50:24 +0000 | [diff] [blame^] | 25 | ; CHECK-LABEL: combine_zero_v8i16: |
| 26 | ; CHECK: # %bb.0: |
| 27 | ; CHECK-NEXT: retq |
Simon Pilgrim | 9961c55 | 2019-01-13 21:21:46 +0000 | [diff] [blame] | 28 | %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer); |
| 29 | ret <8 x i16> %1 |
| 30 | } |