blob: 1e2b332be9823d654ee43bb487fa3c8d28ed4263 [file] [log] [blame]
Saleem Abdulrasool905b6d192014-04-03 23:47:24 +00001; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
Evan Chengc7ea8df2009-06-25 20:59:23 +00002
3define i64 @f1(i64 %a, i64 %b) {
4entry:
Stephen Lind24ab202013-07-14 06:24:09 +00005; CHECK-LABEL: f1:
Evan Cheng1e6c2a12009-08-12 01:49:45 +00006; CHECK: subs r0, r0, r2
7; CHECK: sbcs r1, r3
Evan Chengc7ea8df2009-06-25 20:59:23 +00008 %tmp = sub i64 %a, %b
9 ret i64 %tmp
10}
11
12define i64 @f2(i64 %a, i64 %b) {
13entry:
Stephen Lind24ab202013-07-14 06:24:09 +000014; CHECK-LABEL: f2:
David Majnemerbff6b582016-01-28 18:59:04 +000015; CHECK: lsls r1, r1, #1
16; CHECK: orr.w r1, r1, r0, lsr #31
17; CHECK: rsbs r0, r2, r0, lsl #1
18; CHECK: sbcs r1, r3
Evan Chengc7ea8df2009-06-25 20:59:23 +000019 %tmp1 = shl i64 %a, 1
20 %tmp2 = sub i64 %tmp1, %b
21 ret i64 %tmp2
22}
Evan Cheng59ed7d42012-10-24 19:53:01 +000023
24; rdar://12559385
25define i64 @f3(i32 %vi) {
26entry:
Stephen Lind24ab202013-07-14 06:24:09 +000027; CHECK-LABEL: f3:
Evan Cheng59ed7d42012-10-24 19:53:01 +000028; CHECK: movw [[REG:r[0-9]+]], #36102
29; CHECK: sbcs r{{[0-9]+}}, [[REG]]
30 %v0 = zext i32 %vi to i64
31 %v1 = xor i64 %v0, -155057456198619
32 %v4 = add i64 %v1, 155057456198619
33 %v5 = add i64 %v4, %v1
34 ret i64 %v5
35}