blob: 6ad3b74aeafa23e420c1fc50942e44b683177189 [file] [log] [blame]
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +00001; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
2; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
3
4define i32 @TestComp128GT(fp128 %d1, fp128 %d2) {
5entry:
6 %cmp = fcmp ogt fp128 %d1, %d2
7 %conv = zext i1 %cmp to i32
8 ret i32 %conv
9; CHECK-LABEL: TestComp128GT:
10; CHECK: callq __gttf2
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000011; CHECK: xorl %ecx, %ecx
12; CHECK: setg %cl
13; CHECK: movl %ecx, %eax
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000014; CHECK: retq
15}
16
17define i32 @TestComp128GE(fp128 %d1, fp128 %d2) {
18entry:
19 %cmp = fcmp oge fp128 %d1, %d2
20 %conv = zext i1 %cmp to i32
21 ret i32 %conv
22; CHECK-LABEL: TestComp128GE:
23; CHECK: callq __getf2
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000024; CHECK: xorl %ecx, %ecx
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000025; CHECK: testl %eax, %eax
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000026; CHECK: setns %cl
27; CHECK: movl %ecx, %eax
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000028; CHECK: retq
29}
30
31define i32 @TestComp128LT(fp128 %d1, fp128 %d2) {
32entry:
33 %cmp = fcmp olt fp128 %d1, %d2
34 %conv = zext i1 %cmp to i32
35 ret i32 %conv
36; CHECK-LABEL: TestComp128LT:
37; CHECK: callq __lttf2
38; CHECK-NEXT: shrl $31, %eax
39; CHECK: retq
40;
41; The 'shrl' is a special optimization in llvm to combine
42; the effect of 'fcmp olt' and 'zext'. The main purpose is
43; to test soften call to __lttf2.
44}
45
46define i32 @TestComp128LE(fp128 %d1, fp128 %d2) {
47entry:
48 %cmp = fcmp ole fp128 %d1, %d2
49 %conv = zext i1 %cmp to i32
50 ret i32 %conv
51; CHECK-LABEL: TestComp128LE:
52; CHECK: callq __letf2
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000053; CHECK: xorl %ecx, %ecx
54; CHECK: testl %eax, %eax
55; CHECK: setle %cl
56; CHECK: movl %ecx, %eax
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000057; CHECK: retq
58}
59
60define i32 @TestComp128EQ(fp128 %d1, fp128 %d2) {
61entry:
62 %cmp = fcmp oeq fp128 %d1, %d2
63 %conv = zext i1 %cmp to i32
64 ret i32 %conv
65; CHECK-LABEL: TestComp128EQ:
66; CHECK: callq __eqtf2
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000067; CHECK: xorl %ecx, %ecx
68; CHECK: testl %eax, %eax
69; CHECK: sete %cl
70; CHECK: movl %ecx, %eax
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000071; CHECK: retq
72}
73
74define i32 @TestComp128NE(fp128 %d1, fp128 %d2) {
75entry:
76 %cmp = fcmp une fp128 %d1, %d2
77 %conv = zext i1 %cmp to i32
78 ret i32 %conv
79; CHECK-LABEL: TestComp128NE:
80; CHECK: callq __netf2
Michael Kuperstein3e3652a2016-07-07 22:50:23 +000081; CHECK: xorl %ecx, %ecx
82; CHECK: testl %eax, %eax
83; CHECK: setne %cl
84; CHECK: movl %ecx, %eax
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000085; CHECK: retq
86}
87
88define fp128 @TestMax(fp128 %x, fp128 %y) {
89entry:
90 %cmp = fcmp ogt fp128 %x, %y
91 %cond = select i1 %cmp, fp128 %x, fp128 %y
92 ret fp128 %cond
93; CHECK-LABEL: TestMax:
Hans Wennborg5a7723c2016-04-08 15:17:43 +000094; CHECK: movaps %xmm0
Wei Mi9a16d652016-04-13 03:08:27 +000095; CHECK: movaps %xmm1
Chih-Hung Hsieh7993e182015-12-14 22:08:36 +000096; CHECK: callq __gttf2
97; CHECK: movaps {{.*}}, %xmm0
98; CHECK: testl %eax, %eax
99; CHECK: movaps {{.*}}, %xmm0
100; CHECK: retq
101}