Aaron Watry | 2fa162e | 2013-06-25 13:55:29 +0000 | [diff] [blame] | 1 | ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s |
Tom Stellard | 70f13db | 2013-10-10 17:11:46 +0000 | [diff] [blame] | 2 | ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s |
Tom Stellard | 4489b85 | 2013-05-03 17:21:31 +0000 | [diff] [blame] | 3 | |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 4 | ; EG-CHECK-LABEL: @or_v2i32 |
Aaron Watry | 2fa162e | 2013-06-25 13:55:29 +0000 | [diff] [blame] | 5 | ; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 6 | ; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
Tom Stellard | 4489b85 | 2013-05-03 17:21:31 +0000 | [diff] [blame] | 7 | |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 8 | ;SI-CHECK-LABEL: @or_v2i32 |
Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 9 | ;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
| 10 | ;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
Aaron Watry | 2fa162e | 2013-06-25 13:55:29 +0000 | [diff] [blame] | 11 | |
| 12 | define void @or_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { |
| 13 | %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1 |
| 14 | %a = load <2 x i32> addrspace(1) * %in |
| 15 | %b = load <2 x i32> addrspace(1) * %b_ptr |
| 16 | %result = or <2 x i32> %a, %b |
| 17 | store <2 x i32> %result, <2 x i32> addrspace(1)* %out |
| 18 | ret void |
| 19 | } |
| 20 | |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 21 | ; EG-CHECK-LABEL: @or_v4i32 |
Aaron Watry | 2fa162e | 2013-06-25 13:55:29 +0000 | [diff] [blame] | 22 | ; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 23 | ; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 24 | ; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 25 | ; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |
| 26 | |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 27 | ;SI-CHECK-LABEL: @or_v4i32 |
Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 28 | ;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
| 29 | ;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
| 30 | ;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
| 31 | ;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} |
Aaron Watry | 2fa162e | 2013-06-25 13:55:29 +0000 | [diff] [blame] | 32 | |
| 33 | define void @or_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { |
| 34 | %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1 |
| 35 | %a = load <4 x i32> addrspace(1) * %in |
| 36 | %b = load <4 x i32> addrspace(1) * %b_ptr |
Tom Stellard | 4489b85 | 2013-05-03 17:21:31 +0000 | [diff] [blame] | 37 | %result = or <4 x i32> %a, %b |
| 38 | store <4 x i32> %result, <4 x i32> addrspace(1)* %out |
| 39 | ret void |
| 40 | } |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 41 | |
| 42 | ; EG-CHECK-LABEL: @or_i64 |
| 43 | ; EG-CHECK-DAG: OR_INT * T{{[0-9]\.[XYZW]}}, KC0[2].W, KC0[3].Y |
Tom Stellard | af77543 | 2013-10-23 00:44:32 +0000 | [diff] [blame] | 44 | ; EG-CHECK-DAG: OR_INT * T{{[0-9]\.[XYZW]}}, KC0[3].X, KC0[3].Z |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 45 | ; SI-CHECK-LABEL: @or_i64 |
Matt Arsenault | 72b31ee | 2013-11-12 02:35:51 +0000 | [diff] [blame] | 46 | ; SI-CHECK: V_OR_B32_e32 v{{[0-9]}} |
| 47 | ; SI-CHECK: V_OR_B32_e32 v{{[0-9]}} |
Tom Stellard | fb96169 | 2013-10-23 00:44:19 +0000 | [diff] [blame] | 48 | define void @or_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) { |
| 49 | entry: |
| 50 | %0 = or i64 %a, %b |
| 51 | store i64 %0, i64 addrspace(1)* %out |
| 52 | ret void |
| 53 | } |