| Matt Arsenault | 8e2581b | 2014-03-21 18:01:18 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s |
| Michel Danzer | 1290369 | 2013-05-14 09:53:30 +0000 | [diff] [blame] | 2 | |
| Matt Arsenault | 8e2581b | 2014-03-21 18:01:18 +0000 | [diff] [blame^] | 3 | ; SI-LABEL: @vector_umin |
| 4 | ; SI: V_MIN_U32_e32 |
| 5 | define void @vector_umin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 { |
| Michel Danzer | 1290369 | 2013-05-14 09:53:30 +0000 | [diff] [blame] | 6 | main_body: |
| Matt Arsenault | 8e2581b | 2014-03-21 18:01:18 +0000 | [diff] [blame^] | 7 | %load = load i32 addrspace(1)* %in, align 4 |
| 8 | %min = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %load) |
| 9 | %bc = bitcast i32 %min to float |
| 10 | call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc) |
| 11 | ret void |
| 12 | } |
| 13 | |
| 14 | ; SI-LABEL: @scalar_umin |
| 15 | ; SI: S_MIN_U32 |
| 16 | define void @scalar_umin(i32 %p0, i32 %p1) #0 { |
| 17 | entry: |
| 18 | %min = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %p1) |
| 19 | %bc = bitcast i32 %min to float |
| 20 | call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc) |
| Michel Danzer | 1290369 | 2013-05-14 09:53:30 +0000 | [diff] [blame] | 21 | ret void |
| 22 | } |
| 23 | |
| 24 | ; Function Attrs: readnone |
| 25 | declare i32 @llvm.AMDGPU.umin(i32, i32) #1 |
| 26 | |
| 27 | declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) |
| 28 | |
| Matt Arsenault | 8e2581b | 2014-03-21 18:01:18 +0000 | [diff] [blame^] | 29 | attributes #0 = { nounwind } |
| 30 | attributes #1 = { nounwind readnone } |
| Michel Danzer | 1290369 | 2013-05-14 09:53:30 +0000 | [diff] [blame] | 31 | |
| 32 | !0 = metadata !{metadata !"const", null, i32 1} |