Nemanja Ivanovic | 6cc31ca | 2018-03-05 19:27:16 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unkknown-unknown \ |
| 3 | ; RUN: -verify-machineinstrs -O2 < %s | FileCheck %s |
| 4 | $test = comdat any |
| 5 | |
| 6 | ; Function Attrs: noinline nounwind |
| 7 | define void @test() local_unnamed_addr #0 comdat align 2 { |
| 8 | ; CHECK-LABEL: test: |
| 9 | ; CHECK: # %bb.0: # %entry |
| 10 | ; CHECK-NEXT: ld 3, 0(3) |
| 11 | ; CHECK-NEXT: cmpdi 1, 3, 0 |
| 12 | ; CHECK-NEXT: andi. 4, 3, 3 |
| 13 | ; CHECK-NEXT: crand 20, 2, 5 |
| 14 | ; CHECK-NEXT: isel 3, 0, 3, 20 |
| 15 | ; CHECK-NEXT: addi 3, 3, -1 |
| 16 | ; CHECK-NEXT: cmpldi 3, 3 |
| 17 | ; CHECK-NEXT: bltlr+ 0 |
| 18 | ; CHECK-NEXT: # %bb.1: # %for.body.i.i.i.i.i.i.i |
| 19 | entry: |
| 20 | %0 = load float*, float** undef, align 8 |
| 21 | %1 = load i64, i64* undef, align 8 |
| 22 | %add.ptr.i.i.i.i = getelementptr inbounds float, float* %0, i64 undef |
| 23 | %2 = ptrtoint float* %add.ptr.i.i.i.i to i64 |
| 24 | %and.i.i.i.i.i.i.i = and i64 %2, 3 |
| 25 | %tobool.i.i.i.i.i.i.i = icmp eq i64 %and.i.i.i.i.i.i.i, 0 |
| 26 | %cmp.i.i.i.i.i.i.i = icmp slt i64 0, %1 |
| 27 | %3 = and i1 %tobool.i.i.i.i.i.i.i, %cmp.i.i.i.i.i.i.i |
| 28 | %spec.select.i.i.i.i.i.i.i = select i1 %3, i64 0, i64 %1 |
| 29 | %4 = add i64 %spec.select.i.i.i.i.i.i.i, -1 |
| 30 | %5 = sub i64 %4, 0 |
| 31 | br label %for.body.i.i.i.i.i.i.i.prol.loopexit |
| 32 | |
| 33 | for.body.i.i.i.i.i.i.i.prol.loopexit: ; preds = %entry |
| 34 | %6 = icmp ult i64 %5, 3 |
| 35 | br i1 %6, label %exitBB, label %for.body.i.i.i.i.i.i.i |
| 36 | |
| 37 | for.body.i.i.i.i.i.i.i: ; preds = %for.body.i.i.i.i.i.i.i.prol.loopexit |
| 38 | unreachable |
| 39 | |
| 40 | exitBB: ; preds = %for.body.i.i.i.i.i.i.i.prol.loopexit |
| 41 | ret void |
| 42 | } |
Nemanja Ivanovic | 87c31a6 | 2018-09-18 13:43:16 +0000 | [diff] [blame] | 43 | |
| 44 | define signext i32 @andis_bot(i32 signext %a, i32 signext %b) { |
| 45 | ; CHECK-LABEL: andis_bot: |
| 46 | ; CHECK: # %bb.0: # %entry |
| 47 | ; CHECK-NEXT: andis. 5, 3, 1 |
| 48 | ; CHECK-NEXT: li 5, 1 |
| 49 | ; CHECK-NEXT: isel 4, 4, 5, 2 |
| 50 | ; CHECK-NEXT: mullw 3, 4, 3 |
| 51 | ; CHECK-NEXT: extsw 3, 3 |
| 52 | ; CHECK-NEXT: blr |
| 53 | entry: |
| 54 | %and = and i32 %a, 65536 |
| 55 | %tobool = icmp eq i32 %and, 0 |
| 56 | %mul = select i1 %tobool, i32 %b, i32 1 |
| 57 | %cond = mul nsw i32 %mul, %a |
| 58 | ret i32 %cond |
| 59 | } |
| 60 | |
| 61 | ; Function Attrs: norecurse nounwind readnone |
| 62 | define signext i32 @andis_mid(i32 signext %a, i32 signext %b) { |
| 63 | ; CHECK-LABEL: andis_mid: |
| 64 | ; CHECK: # %bb.0: # %entry |
| 65 | ; CHECK-NEXT: andis. 5, 3, 252 |
| 66 | ; CHECK-NEXT: li 5, 1 |
| 67 | ; CHECK-NEXT: isel 4, 4, 5, 2 |
| 68 | ; CHECK-NEXT: mullw 3, 4, 3 |
| 69 | ; CHECK-NEXT: extsw 3, 3 |
| 70 | ; CHECK-NEXT: blr |
| 71 | entry: |
| 72 | %and = and i32 %a, 16515072 |
| 73 | %tobool = icmp eq i32 %and, 0 |
| 74 | %mul = select i1 %tobool, i32 %b, i32 1 |
| 75 | %cond = mul nsw i32 %mul, %a |
| 76 | ret i32 %cond |
| 77 | } |
| 78 | |
| 79 | ; Function Attrs: norecurse nounwind readnone |
| 80 | define signext i32 @andis_top(i32 signext %a, i32 signext %b) { |
| 81 | ; CHECK-LABEL: andis_top: |
| 82 | ; CHECK: # %bb.0: # %entry |
| 83 | ; CHECK-NEXT: andis. 5, 3, 64512 |
| 84 | ; CHECK-NEXT: li 5, 1 |
| 85 | ; CHECK-NEXT: isel 4, 4, 5, 2 |
| 86 | ; CHECK-NEXT: mullw 3, 4, 3 |
| 87 | ; CHECK-NEXT: extsw 3, 3 |
| 88 | ; CHECK-NEXT: blr |
| 89 | entry: |
| 90 | %tobool = icmp ugt i32 %a, 67108863 |
| 91 | %mul = select i1 %tobool, i32 1, i32 %b |
| 92 | %cond = mul nsw i32 %mul, %a |
| 93 | ret i32 %cond |
| 94 | } |
| 95 | |
| 96 | define i64 @andis_no_cmp(i64 %a, i64 %b) { |
| 97 | entry: |
| 98 | %and = and i64 %a, 65536 |
| 99 | %tobool = icmp eq i64 %and, 0 |
| 100 | %mul = select i1 %tobool, i64 %b, i64 1 |
| 101 | %cond = mul nsw i64 %mul, %a |
| 102 | ret i64 %cond |
| 103 | } |