| Matt Arsenault | 90083d3 | 2018-06-07 09:54:49 +0000 | [diff] [blame^] | 1 | ; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s |
| 2 | ; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-spill-sgpr-to-smem=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s |
| 3 | ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s |
| 4 | ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s |
| Matt Arsenault | 2430958 | 2014-03-01 21:45:41 +0000 | [diff] [blame] | 5 | |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 6 | ; GCN-LABEL: {{^}}test_branch: |
| 7 | ; GCNNOOPT: v_writelane_b32 |
| 8 | ; GCNNOOPT: v_writelane_b32 |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 9 | ; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]] |
| 10 | |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 11 | ; GCNNOOPT: v_readlane_b32 |
| 12 | ; GCNNOOPT: v_readlane_b32 |
| 13 | ; GCN: buffer_store_dword |
| Kyle Butt | 7fbec9b | 2017-02-15 19:49:14 +0000 | [diff] [blame] | 14 | ; GCNNOOPT: s_endpgm |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 15 | |
| Matt Arsenault | ad55ee5 | 2016-12-06 01:02:51 +0000 | [diff] [blame] | 16 | ; GCN: {{^}}[[END]]: |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 17 | ; GCN: s_endpgm |
| Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 18 | define amdgpu_kernel void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 { |
| Matt Arsenault | 2430958 | 2014-03-01 21:45:41 +0000 | [diff] [blame] | 19 | %cmp = icmp ne i32 %val, 0 |
| 20 | br i1 %cmp, label %store, label %end |
| 21 | |
| 22 | store: |
| 23 | store i32 222, i32 addrspace(1)* %out |
| 24 | ret void |
| 25 | |
| 26 | end: |
| 27 | ret void |
| 28 | } |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 29 | |
| 30 | ; GCN-LABEL: {{^}}test_brcc_i1: |
| Matt Arsenault | 90083d3 | 2018-06-07 09:54:49 +0000 | [diff] [blame^] | 31 | ; GCN: s_load_dword [[VAL:s[0-9]+]] |
| 32 | ; GCNNOOPT: s_and_b32 s{{[0-9]+}}, 1, [[VAL]] |
| 33 | ; GCNOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], 1 |
| 34 | ; GCN: s_cmp_eq_u32 |
| 35 | ; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]] |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 36 | |
| 37 | ; GCN: buffer_store_dword |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 38 | |
| Matt Arsenault | ad55ee5 | 2016-12-06 01:02:51 +0000 | [diff] [blame] | 39 | ; GCN: {{^}}[[END]]: |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 40 | ; GCN: s_endpgm |
| Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 41 | define amdgpu_kernel void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 { |
| Matt Arsenault | d89c99c | 2016-05-25 17:58:27 +0000 | [diff] [blame] | 42 | %cmp0 = icmp ne i1 %val, 0 |
| 43 | br i1 %cmp0, label %store, label %end |
| 44 | |
| 45 | store: |
| 46 | store i32 222, i32 addrspace(1)* %out |
| 47 | ret void |
| 48 | |
| 49 | end: |
| 50 | ret void |
| 51 | } |
| 52 | |
| 53 | attributes #0 = { nounwind } |