| Jia Liu | b22310f | 2012-02-18 12:03:15 +0000 | [diff] [blame] | 1 | //===-- Hexagon.td - Describe the Hexagon Target Machine --*- tablegen -*--===// | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 2 | // | 
|  | 3 | //                     The LLVM Compiler Infrastructure | 
|  | 4 | // | 
|  | 5 | // This file is distributed under the University of Illinois Open Source | 
|  | 6 | // License. See LICENSE.TXT for details. | 
|  | 7 | // | 
|  | 8 | //===----------------------------------------------------------------------===// | 
|  | 9 | // | 
| Jia Liu | b22310f | 2012-02-18 12:03:15 +0000 | [diff] [blame] | 10 | // This is the top level entry point for the Hexagon target. | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 11 | // | 
|  | 12 | //===----------------------------------------------------------------------===// | 
|  | 13 |  | 
|  | 14 | //===----------------------------------------------------------------------===// | 
|  | 15 | // Target-independent interfaces which we are implementing | 
|  | 16 | //===----------------------------------------------------------------------===// | 
|  | 17 |  | 
|  | 18 | include "llvm/Target/Target.td" | 
|  | 19 |  | 
|  | 20 | //===----------------------------------------------------------------------===// | 
|  | 21 | // Hexagon Subtarget features. | 
| Jia Liu | b22310f | 2012-02-18 12:03:15 +0000 | [diff] [blame] | 22 | //===----------------------------------------------------------------------===// | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 23 |  | 
|  | 24 | // Hexagon Archtectures | 
|  | 25 | def ArchV2       : SubtargetFeature<"v2", "HexagonArchVersion", "V2", | 
|  | 26 | "Hexagon v2">; | 
|  | 27 | def ArchV3       : SubtargetFeature<"v3", "HexagonArchVersion", "V3", | 
|  | 28 | "Hexagon v3">; | 
|  | 29 | def ArchV4       : SubtargetFeature<"v4", "HexagonArchVersion", "V4", | 
|  | 30 | "Hexagon v4">; | 
| Sirish Pande | 69295b8 | 2012-05-10 20:20:25 +0000 | [diff] [blame] | 31 | def ArchV5       : SubtargetFeature<"v5", "HexagonArchVersion", "V5", | 
|  | 32 | "Hexagon v5">; | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 33 |  | 
|  | 34 | //===----------------------------------------------------------------------===// | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 35 | // Hexagon Instruction Predicate Definitions. | 
|  | 36 | //===----------------------------------------------------------------------===// | 
|  | 37 | def HasV2T                      : Predicate<"Subtarget.hasV2TOps()">; | 
|  | 38 | def HasV2TOnly                  : Predicate<"Subtarget.hasV2TOpsOnly()">; | 
|  | 39 | def NoV2T                       : Predicate<"!Subtarget.hasV2TOps()">; | 
|  | 40 | def HasV3T                      : Predicate<"Subtarget.hasV3TOps()">; | 
|  | 41 | def HasV3TOnly                  : Predicate<"Subtarget.hasV3TOpsOnly()">; | 
|  | 42 | def NoV3T                       : Predicate<"!Subtarget.hasV3TOps()">; | 
|  | 43 | def HasV4T                      : Predicate<"Subtarget.hasV4TOps()">; | 
|  | 44 | def NoV4T                       : Predicate<"!Subtarget.hasV4TOps()">; | 
|  | 45 | def HasV5T                      : Predicate<"Subtarget.hasV5TOps()">; | 
|  | 46 | def NoV5T                       : Predicate<"!Subtarget.hasV5TOps()">; | 
|  | 47 | def UseMEMOP                    : Predicate<"Subtarget.useMemOps()">; | 
|  | 48 | def IEEERndNearV5T              : Predicate<"Subtarget.modeIEEERndNear()">; | 
|  | 49 |  | 
|  | 50 | //===----------------------------------------------------------------------===// | 
|  | 51 | // Classes used for relation maps. | 
|  | 52 | //===----------------------------------------------------------------------===// | 
| Colin LeMahieu | 9161d47 | 2014-12-30 18:58:47 +0000 | [diff] [blame^] | 53 |  | 
|  | 54 | class ImmRegShl; | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 55 | // PredRel - Filter class used to relate non-predicated instructions with their | 
|  | 56 | // predicated forms. | 
|  | 57 | class PredRel; | 
|  | 58 | // PredNewRel - Filter class used to relate predicated instructions with their | 
|  | 59 | // predicate-new forms. | 
|  | 60 | class PredNewRel: PredRel; | 
|  | 61 | // ImmRegRel - Filter class used to relate instructions having reg-reg form | 
|  | 62 | // with their reg-imm counterparts. | 
|  | 63 | class ImmRegRel; | 
|  | 64 | // NewValueRel - Filter class used to relate regular store instructions with | 
|  | 65 | // their new-value store form. | 
|  | 66 | class NewValueRel: PredNewRel; | 
|  | 67 | // NewValueRel - Filter class used to relate load/store instructions having | 
|  | 68 | // different addressing modes with each other. | 
|  | 69 | class AddrModeRel: NewValueRel; | 
|  | 70 |  | 
|  | 71 | //===----------------------------------------------------------------------===// | 
|  | 72 | // Generate mapping table to relate non-predicate instructions with their | 
|  | 73 | // predicated formats - true and false. | 
|  | 74 | // | 
|  | 75 |  | 
|  | 76 | def getPredOpcode : InstrMapping { | 
|  | 77 | let FilterClass = "PredRel"; | 
|  | 78 | // Instructions with the same BaseOpcode and isNVStore values form a row. | 
|  | 79 | let RowFields = ["BaseOpcode", "isNVStore", "PNewValue"]; | 
|  | 80 | // Instructions with the same predicate sense form a column. | 
|  | 81 | let ColFields = ["PredSense"]; | 
|  | 82 | // The key column is the unpredicated instructions. | 
|  | 83 | let KeyCol = [""]; | 
|  | 84 | // Value columns are PredSense=true and PredSense=false | 
|  | 85 | let ValueCols = [["true"], ["false"]]; | 
|  | 86 | } | 
|  | 87 |  | 
|  | 88 | //===----------------------------------------------------------------------===// | 
| Jyotsna Verma | 84c4710 | 2013-05-06 18:49:23 +0000 | [diff] [blame] | 89 | // Generate mapping table to relate predicate-true instructions with their | 
|  | 90 | // predicate-false forms | 
|  | 91 | // | 
|  | 92 | def getFalsePredOpcode : InstrMapping { | 
|  | 93 | let FilterClass = "PredRel"; | 
|  | 94 | let RowFields = ["BaseOpcode", "PNewValue", "isNVStore", "isBrTaken"]; | 
|  | 95 | let ColFields = ["PredSense"]; | 
|  | 96 | let KeyCol = ["true"]; | 
|  | 97 | let ValueCols = [["false"]]; | 
|  | 98 | } | 
|  | 99 |  | 
|  | 100 | //===----------------------------------------------------------------------===// | 
|  | 101 | // Generate mapping table to relate predicate-false instructions with their | 
|  | 102 | // predicate-true forms | 
|  | 103 | // | 
|  | 104 | def getTruePredOpcode : InstrMapping { | 
|  | 105 | let FilterClass = "PredRel"; | 
|  | 106 | let RowFields = ["BaseOpcode", "PNewValue", "isNVStore", "isBrTaken"]; | 
|  | 107 | let ColFields = ["PredSense"]; | 
|  | 108 | let KeyCol = ["false"]; | 
|  | 109 | let ValueCols = [["true"]]; | 
|  | 110 | } | 
|  | 111 |  | 
|  | 112 | //===----------------------------------------------------------------------===// | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 113 | // Generate mapping table to relate predicated instructions with their .new | 
|  | 114 | // format. | 
|  | 115 | // | 
|  | 116 | def getPredNewOpcode : InstrMapping { | 
|  | 117 | let FilterClass = "PredNewRel"; | 
| Jyotsna Verma | 5ed5181 | 2013-05-01 21:37:34 +0000 | [diff] [blame] | 118 | let RowFields = ["BaseOpcode", "PredSense", "isNVStore", "isBrTaken"]; | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 119 | let ColFields = ["PNewValue"]; | 
|  | 120 | let KeyCol = [""]; | 
|  | 121 | let ValueCols = [["new"]]; | 
|  | 122 | } | 
|  | 123 |  | 
|  | 124 | //===----------------------------------------------------------------------===// | 
| Jyotsna Verma | 438cec5 | 2013-05-10 20:58:11 +0000 | [diff] [blame] | 125 | // Generate mapping table to relate .new predicated instructions with their old | 
|  | 126 | // format. | 
|  | 127 | // | 
|  | 128 | def getPredOldOpcode : InstrMapping { | 
|  | 129 | let FilterClass = "PredNewRel"; | 
|  | 130 | let RowFields = ["BaseOpcode", "PredSense", "isNVStore"]; | 
|  | 131 | let ColFields = ["PNewValue"]; | 
|  | 132 | let KeyCol = ["new"]; | 
|  | 133 | let ValueCols = [[""]]; | 
|  | 134 | } | 
|  | 135 |  | 
|  | 136 | //===----------------------------------------------------------------------===// | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 137 | // Generate mapping table to relate store instructions with their new-value | 
|  | 138 | // format. | 
|  | 139 | // | 
|  | 140 | def getNewValueOpcode : InstrMapping { | 
|  | 141 | let FilterClass = "NewValueRel"; | 
|  | 142 | let RowFields = ["BaseOpcode", "PredSense", "PNewValue"]; | 
| Jyotsna Verma | 300f0b9 | 2013-05-10 20:27:34 +0000 | [diff] [blame] | 143 | let ColFields = ["NValueST"]; | 
|  | 144 | let KeyCol = ["false"]; | 
|  | 145 | let ValueCols = [["true"]]; | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 146 | } | 
|  | 147 |  | 
| Jyotsna Verma | 438cec5 | 2013-05-10 20:58:11 +0000 | [diff] [blame] | 148 | //===----------------------------------------------------------------------===// | 
|  | 149 | // Generate mapping table to relate new-value store instructions with their old | 
|  | 150 | // format. | 
|  | 151 | // | 
|  | 152 | def getNonNVStore : InstrMapping { | 
|  | 153 | let FilterClass = "NewValueRel"; | 
|  | 154 | let RowFields = ["BaseOpcode", "PredSense", "PNewValue"]; | 
|  | 155 | let ColFields = ["NValueST"]; | 
|  | 156 | let KeyCol = ["true"]; | 
|  | 157 | let ValueCols = [["false"]]; | 
|  | 158 | } | 
|  | 159 |  | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 160 | def getBasedWithImmOffset : InstrMapping { | 
|  | 161 | let FilterClass = "AddrModeRel"; | 
|  | 162 | let RowFields = ["CextOpcode", "PredSense", "PNewValue", "isNVStore", | 
|  | 163 | "isMEMri", "isFloat"]; | 
|  | 164 | let ColFields = ["addrMode"]; | 
|  | 165 | let KeyCol = ["Absolute"]; | 
|  | 166 | let ValueCols = [["BaseImmOffset"]]; | 
|  | 167 | } | 
|  | 168 |  | 
|  | 169 | def getBaseWithRegOffset : InstrMapping { | 
|  | 170 | let FilterClass = "AddrModeRel"; | 
|  | 171 | let RowFields = ["CextOpcode", "PredSense", "PNewValue", "isNVStore"]; | 
|  | 172 | let ColFields = ["addrMode"]; | 
|  | 173 | let KeyCol = ["BaseImmOffset"]; | 
|  | 174 | let ValueCols = [["BaseRegOffset"]]; | 
|  | 175 | } | 
|  | 176 |  | 
|  | 177 | def getRegForm : InstrMapping { | 
|  | 178 | let FilterClass = "ImmRegRel"; | 
|  | 179 | let RowFields = ["CextOpcode", "PredSense", "PNewValue"]; | 
|  | 180 | let ColFields = ["InputType"]; | 
|  | 181 | let KeyCol = ["imm"]; | 
|  | 182 | let ValueCols = [["reg"]]; | 
|  | 183 | } | 
|  | 184 |  | 
| Colin LeMahieu | 9161d47 | 2014-12-30 18:58:47 +0000 | [diff] [blame^] | 185 | def getRegShlForm : InstrMapping { | 
|  | 186 | let FilterClass = "ImmRegShl"; | 
|  | 187 | let RowFields = ["CextOpcode", "PredSense", "PNewValue", "isNVStore"]; | 
|  | 188 | let ColFields = ["InputType"]; | 
|  | 189 | let KeyCol = ["imm"]; | 
|  | 190 | let ValueCols = [["reg"]]; | 
|  | 191 | } | 
|  | 192 |  | 
| Jyotsna Verma | efe4f55 | 2012-12-04 04:29:16 +0000 | [diff] [blame] | 193 | //===----------------------------------------------------------------------===// | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 194 | // Register File, Calling Conv, Instruction Descriptions | 
|  | 195 | //===----------------------------------------------------------------------===// | 
|  | 196 | include "HexagonSchedule.td" | 
|  | 197 | include "HexagonRegisterInfo.td" | 
|  | 198 | include "HexagonCallingConv.td" | 
|  | 199 | include "HexagonInstrInfo.td" | 
|  | 200 | include "HexagonIntrinsics.td" | 
|  | 201 | include "HexagonIntrinsicsDerived.td" | 
|  | 202 |  | 
| Evandro Menezes | 5cee621 | 2012-04-12 17:55:53 +0000 | [diff] [blame] | 203 | def HexagonInstrInfo : InstrInfo; | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 204 |  | 
|  | 205 | //===----------------------------------------------------------------------===// | 
|  | 206 | // Hexagon processors supported. | 
|  | 207 | //===----------------------------------------------------------------------===// | 
|  | 208 |  | 
| Andrew Trick | 87255e3 | 2012-07-07 04:00:00 +0000 | [diff] [blame] | 209 | class Proc<string Name, SchedMachineModel Model, | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 210 | list<SubtargetFeature> Features> | 
| Andrew Trick | 87255e3 | 2012-07-07 04:00:00 +0000 | [diff] [blame] | 211 | : ProcessorModel<Name, Model, Features>; | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 212 |  | 
| Andrew Trick | 87255e3 | 2012-07-07 04:00:00 +0000 | [diff] [blame] | 213 | def : Proc<"hexagonv4", HexagonModelV4, [ArchV2, ArchV3, ArchV4]>; | 
|  | 214 | def : Proc<"hexagonv5", HexagonModelV4, [ArchV2, ArchV3, ArchV4, ArchV5]>; | 
| Sirish Pande | 69295b8 | 2012-05-10 20:20:25 +0000 | [diff] [blame] | 215 |  | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 216 | //===----------------------------------------------------------------------===// | 
|  | 217 | // Declare the target which we are implementing | 
|  | 218 | //===----------------------------------------------------------------------===// | 
|  | 219 |  | 
|  | 220 | def Hexagon : Target { | 
|  | 221 | // Pull in Instruction Info: | 
|  | 222 | let InstructionSet = HexagonInstrInfo; | 
| Tony Linthicum | 1213a7a | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 223 | } |