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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / clang / test / CodeGen / avx512-reduceIntrin.c
blob: 8157095fc644707371a55a103e9e8746d2fb7c5e [file] [log] [blame]
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]1// RUN: %clang_cc1 -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]2
3#include <immintrin.h>
4
5long long test_mm512_reduce_add_epi64(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]6// CHECK-LABEL: @test_mm512_reduce_add_epi64(
7// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
8// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
9// CHECK: add <4 x i64> %{{.*}}, %{{.*}}
10// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
11// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
12// CHECK: add <2 x i64> %{{.*}}, %{{.*}}
13// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
14// CHECK: add <2 x i64> %{{.*}}, %{{.*}}
15// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]16 return _mm512_reduce_add_epi64(__W);
17}
18
19long long test_mm512_reduce_mul_epi64(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]20// CHECK-LABEL: @test_mm512_reduce_mul_epi64(
21// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
22// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
23// CHECK: mul <4 x i64> %{{.*}}, %{{.*}}
24// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
25// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
26// CHECK: mul <2 x i64> %{{.*}}, %{{.*}}
27// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
28// CHECK: mul <2 x i64> %{{.*}}, %{{.*}}
29// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]30 return _mm512_reduce_mul_epi64(__W);
31}
32
33long long test_mm512_reduce_or_epi64(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]34// CHECK-LABEL: @test_mm512_reduce_or_epi64(
35// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
36// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
37// CHECK: or <4 x i64> %{{.*}}, %{{.*}}
38// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
39// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
40// CHECK: or <2 x i64> %{{.*}}, %{{.*}}
41// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
42// CHECK: or <2 x i64> %{{.*}}, %{{.*}}
43// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]44 return _mm512_reduce_or_epi64(__W);
45}
46
47long long test_mm512_reduce_and_epi64(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]48// CHECK-LABEL: @test_mm512_reduce_and_epi64(
49// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
50// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
51// CHECK: and <4 x i64> %{{.*}}, %{{.*}}
52// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
53// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
54// CHECK: and <2 x i64> %{{.*}}, %{{.*}}
55// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
56// CHECK: and <2 x i64> %{{.*}}, %{{.*}}
57// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]58 return _mm512_reduce_and_epi64(__W);
59}
60
61long long test_mm512_mask_reduce_add_epi64(__mmask8 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]62// CHECK-LABEL: @test_mm512_mask_reduce_add_epi64(
63// CHECK: bitcast i8 %{{.*}} to <8 x i1>
64// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
65// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
66// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
67// CHECK: add <4 x i64> %{{.*}}, %{{.*}}
68// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
69// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
70// CHECK: add <2 x i64> %{{.*}}, %{{.*}}
71// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
72// CHECK: add <2 x i64> %{{.*}}, %{{.*}}
73// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]74 return _mm512_mask_reduce_add_epi64(__M, __W);
75}
76
77long long test_mm512_mask_reduce_mul_epi64(__mmask8 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]78// CHECK-LABEL: @test_mm512_mask_reduce_mul_epi64(
79// CHECK: bitcast i8 %{{.*}} to <8 x i1>
80// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
81// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
82// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
83// CHECK: mul <4 x i64> %{{.*}}, %{{.*}}
84// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
85// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
86// CHECK: mul <2 x i64> %{{.*}}, %{{.*}}
87// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
88// CHECK: mul <2 x i64> %{{.*}}, %{{.*}}
89// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]90 return _mm512_mask_reduce_mul_epi64(__M, __W);
91}
92
93long long test_mm512_mask_reduce_and_epi64(__mmask8 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]94// CHECK-LABEL: @test_mm512_mask_reduce_and_epi64(
95// CHECK: bitcast i8 %{{.*}} to <8 x i1>
96// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
97// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
98// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
99// CHECK: and <4 x i64> %{{.*}}, %{{.*}}
100// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
101// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
102// CHECK: and <2 x i64> %{{.*}}, %{{.*}}
103// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
104// CHECK: and <2 x i64> %{{.*}}, %{{.*}}
105// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]106 return _mm512_mask_reduce_and_epi64(__M, __W);
107}
108
109long long test_mm512_mask_reduce_or_epi64(__mmask8 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]110// CHECK-LABEL: @test_mm512_mask_reduce_or_epi64(
111// CHECK: bitcast i8 %{{.*}} to <8 x i1>
112// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
113// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
114// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
115// CHECK: or <4 x i64> %{{.*}}, %{{.*}}
116// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
117// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
118// CHECK: or <2 x i64> %{{.*}}, %{{.*}}
119// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 0>
120// CHECK: or <2 x i64> %{{.*}}, %{{.*}}
121// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]122 return _mm512_mask_reduce_or_epi64(__M, __W);
123}
124
125int test_mm512_reduce_add_epi32(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]126// CHECK-LABEL: @test_mm512_reduce_add_epi32(
127// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
128// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
129// CHECK: add <8 x i32> %{{.*}}, %{{.*}}
130// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
131// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
132// CHECK: add <4 x i32> %{{.*}}, %{{.*}}
133// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
134// CHECK: add <4 x i32> %{{.*}}, %{{.*}}
135// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
136// CHECK: add <4 x i32> %{{.*}}, %{{.*}}
137// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]138 return _mm512_reduce_add_epi32(__W);
139}
140
141int test_mm512_reduce_mul_epi32(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]142// CHECK-LABEL: @test_mm512_reduce_mul_epi32(
143// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
144// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
145// CHECK: mul <8 x i32> %{{.*}}, %{{.*}}
146// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
147// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
148// CHECK: mul <4 x i32> %{{.*}}, %{{.*}}
149// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
150// CHECK: mul <4 x i32> %{{.*}}, %{{.*}}
151// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
152// CHECK: mul <4 x i32> %{{.*}}, %{{.*}}
153// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]154 return _mm512_reduce_mul_epi32(__W);
155}
156
157int test_mm512_reduce_or_epi32(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]158// CHECK-LABEL: @test_mm512_reduce_or_epi32(
159// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
160// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
161// CHECK: or <8 x i32> %{{.*}}, %{{.*}}
162// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
163// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
164// CHECK: or <4 x i32> %{{.*}}, %{{.*}}
165// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
166// CHECK: or <4 x i32> %{{.*}}, %{{.*}}
167// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
168// CHECK: or <4 x i32> %{{.*}}, %{{.*}}
169// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]170 return _mm512_reduce_or_epi32(__W);
171}
172
173int test_mm512_reduce_and_epi32(__m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]174// CHECK-LABEL: @test_mm512_reduce_and_epi32(
175// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
176// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
177// CHECK: and <8 x i32> %{{.*}}, %{{.*}}
178// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
179// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
180// CHECK: and <4 x i32> %{{.*}}, %{{.*}}
181// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
182// CHECK: and <4 x i32> %{{.*}}, %{{.*}}
183// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
184// CHECK: and <4 x i32> %{{.*}}, %{{.*}}
185// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]186 return _mm512_reduce_and_epi32(__W);
187}
188
189int test_mm512_mask_reduce_add_epi32(__mmask16 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]190// CHECK-LABEL: @test_mm512_mask_reduce_add_epi32(
191// CHECK: bitcast i16 %{{.*}} to <16 x i1>
192// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
193// CHECK: bitcast <16 x i32> %{{.*}} to <8 x i64>
194// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
195// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
196// CHECK: add <8 x i32> %{{.*}}, %{{.*}}
197// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
198// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
199// CHECK: add <4 x i32> %{{.*}}, %{{.*}}
200// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
201// CHECK: add <4 x i32> %{{.*}}, %{{.*}}
202// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
203// CHECK: add <4 x i32> %{{.*}}, %{{.*}}
204// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]205 return _mm512_mask_reduce_add_epi32(__M, __W);
206}
207
208int test_mm512_mask_reduce_mul_epi32(__mmask16 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]209// CHECK-LABEL: @test_mm512_mask_reduce_mul_epi32(
210// CHECK: bitcast i16 %{{.*}} to <16 x i1>
211// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
212// CHECK: bitcast <16 x i32> %{{.*}} to <8 x i64>
213// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
214// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
215// CHECK: mul <8 x i32> %{{.*}}, %{{.*}}
216// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
217// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
218// CHECK: mul <4 x i32> %{{.*}}, %{{.*}}
219// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
220// CHECK: mul <4 x i32> %{{.*}}, %{{.*}}
221// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
222// CHECK: mul <4 x i32> %{{.*}}, %{{.*}}
223// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]224 return _mm512_mask_reduce_mul_epi32(__M, __W);
225}
226
227int test_mm512_mask_reduce_and_epi32(__mmask16 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]228// CHECK-LABEL: @test_mm512_mask_reduce_and_epi32(
229// CHECK: bitcast i16 %{{.*}} to <16 x i1>
230// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
231// CHECK: bitcast <16 x i32> %{{.*}} to <8 x i64>
232// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
233// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
234// CHECK: and <8 x i32> %{{.*}}, %{{.*}}
235// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
236// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
237// CHECK: and <4 x i32> %{{.*}}, %{{.*}}
238// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
239// CHECK: and <4 x i32> %{{.*}}, %{{.*}}
240// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
241// CHECK: and <4 x i32> %{{.*}}, %{{.*}}
242// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]243 return _mm512_mask_reduce_and_epi32(__M, __W);
244}
245
246int test_mm512_mask_reduce_or_epi32(__mmask16 __M, __m512i __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]247// CHECK-LABEL: @test_mm512_mask_reduce_or_epi32(
248// CHECK: bitcast i16 %{{.*}} to <16 x i1>
249// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
250// CHECK: bitcast <16 x i32> %{{.*}} to <8 x i64>
251// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
252// CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
253// CHECK: or <8 x i32> %{{.*}}, %{{.*}}
254// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
255// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
256// CHECK: or <4 x i32> %{{.*}}, %{{.*}}
257// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
258// CHECK: or <4 x i32> %{{.*}}, %{{.*}}
259// CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
260// CHECK: or <4 x i32> %{{.*}}, %{{.*}}
261// CHECK: extractelement <4 x i32> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]262 return _mm512_mask_reduce_or_epi32(__M, __W);
263}
264
265double test_mm512_reduce_add_pd(__m512d __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]266// CHECK-LABEL: @test_mm512_reduce_add_pd(
267// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
268// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
269// CHECK: fadd <4 x double> %{{.*}}, %{{.*}}
270// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 0, i32 1>
271// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3>
272// CHECK: fadd <2 x double> %{{.*}}, %{{.*}}
273// CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 0>
274// CHECK: fadd <2 x double> %{{.*}}, %{{.*}}
275// CHECK: extractelement <2 x double> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]276 return _mm512_reduce_add_pd(__W);
277}
278
279double test_mm512_reduce_mul_pd(__m512d __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]280// CHECK-LABEL: @test_mm512_reduce_mul_pd(
281// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
282// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
283// CHECK: fmul <4 x double> %{{.*}}, %{{.*}}
284// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 0, i32 1>
285// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3>
286// CHECK: fmul <2 x double> %{{.*}}, %{{.*}}
287// CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 0>
288// CHECK: fmul <2 x double> %{{.*}}, %{{.*}}
289// CHECK: extractelement <2 x double> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]290 return _mm512_reduce_mul_pd(__W);
291}
292
293float test_mm512_reduce_add_ps(__m512 __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]294// CHECK-LABEL: @test_mm512_reduce_add_ps(
295// CHECK: bitcast <16 x float> %{{.*}} to <8 x double>
296// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
297// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
298// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
299// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
300// CHECK: fadd <8 x float> %{{.*}}, %{{.*}}
301// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
302// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
303// CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
304// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
305// CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
306// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
307// CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
308// CHECK: extractelement <4 x float> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]309 return _mm512_reduce_add_ps(__W);
310}
311
312float test_mm512_reduce_mul_ps(__m512 __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]313// CHECK-LABEL: @test_mm512_reduce_mul_ps(
314// CHECK: bitcast <16 x float> %{{.*}} to <8 x double>
315// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
316// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
317// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
318// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
319// CHECK: fmul <8 x float> %{{.*}}, %{{.*}}
320// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
321// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
322// CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
323// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
324// CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
325// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
326// CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
327// CHECK: extractelement <4 x float> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]328 return _mm512_reduce_mul_ps(__W);
329}
330
331double test_mm512_mask_reduce_add_pd(__mmask8 __M, __m512d __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]332// CHECK-LABEL: @test_mm512_mask_reduce_add_pd(
333// CHECK: bitcast i8 %{{.*}} to <8 x i1>
334// CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
335// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
336// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
337// CHECK: fadd <4 x double> %{{.*}}, %{{.*}}
338// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 0, i32 1>
339// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3>
340// CHECK: fadd <2 x double> %{{.*}}, %{{.*}}
341// CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 0>
342// CHECK: fadd <2 x double> %{{.*}}, %{{.*}}
343// CHECK: extractelement <2 x double> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]344 return _mm512_mask_reduce_add_pd(__M, __W);
345}
346
347double test_mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]348// CHECK-LABEL: @test_mm512_mask_reduce_mul_pd(
349// CHECK: bitcast i8 %{{.*}} to <8 x i1>
350// CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
351// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
352// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
353// CHECK: fmul <4 x double> %{{.*}}, %{{.*}}
354// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 0, i32 1>
355// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3>
356// CHECK: fmul <2 x double> %{{.*}}, %{{.*}}
357// CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 0>
358// CHECK: fmul <2 x double> %{{.*}}, %{{.*}}
359// CHECK: extractelement <2 x double> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]360 return _mm512_mask_reduce_mul_pd(__M, __W);
361}
362
363float test_mm512_mask_reduce_add_ps(__mmask16 __M, __m512 __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]364// CHECK-LABEL: @test_mm512_mask_reduce_add_ps(
365// CHECK-NEXT: entry:
366// CHECK: bitcast i16 %{{.*}} to <16 x i1>
367// CHECK: select <16 x i1> %{{.*}}, <16 x float> {{.*}}, <16 x float> {{.*}}
368// CHECK: bitcast <16 x float> %{{.*}} to <8 x double>
369// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
370// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
371// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
372// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
373// CHECK: fadd <8 x float> %{{.*}}, %{{.*}}
374// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
375// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
376// CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
377// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
378// CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
379// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
380// CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
381// CHECK: extractelement <4 x float> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]382 return _mm512_mask_reduce_add_ps(__M, __W);
383}
384
385float test_mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W){
Craig Topperddfe69c2018-06-21 16:41:28 +0000[diff] [blame]386// CHECK-LABEL: @test_mm512_mask_reduce_mul_ps(
387// CHECK: bitcast i16 %{{.*}} to <16 x i1>
388// CHECK: select <16 x i1> %{{.*}}, <16 x float> {{.*}}, <16 x float> %{{.*}}
389// CHECK: bitcast <16 x float> %{{.*}} to <8 x double>
390// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
391// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
392// CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
393// CHECK: bitcast <4 x double> %{{.*}} to <8 x float>
394// CHECK: fmul <8 x float> %{{.*}}, %{{.*}}
395// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
396// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
397// CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
398// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
399// CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
400// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
401// CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
402// CHECK: extractelement <4 x float> %{{.*}}, i32 0
Michael Zuckermanfacb37c2016-10-25 07:56:04 +0000[diff] [blame]403 return _mm512_mask_reduce_mul_ps(__M, __W);
404}