blob: b8158e1020488ed778e41f777b6e71024c265c08 [file] [log] [blame]
Max Kazantsev4e9def52018-08-10 09:20:46 +00001; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -disable-output -print-mustexecute %s 2>&1 | FileCheck %s
3
4; Infinite loop.
Max Kazantsev7b78d392018-08-17 06:19:17 +00005; Make sure that the backedge is mustexec.
Max Kazantsev4e9def52018-08-10 09:20:46 +00006define void @test_no_exit_block(i1 %cond, i32 %a, i32 %b) {
7; CHECK-LABEL: @test_no_exit_block(
8; CHECK-NEXT: entry:
9; CHECK-NEXT: br label [[LOOP:%.*]]
10; CHECK: loop:
11; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
12; CHECK-NEXT: br i1 [[COND:%.*]], label [[MAYBE_TAKEN:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
Max Kazantsev4e9def52018-08-10 09:20:46 +000013; CHECK: maybe_taken:
Max Kazantsev7b78d392018-08-17 06:19:17 +000014; CHECK-NOT: mustexec
Max Kazantsev4e9def52018-08-10 09:20:46 +000015; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
16; CHECK-NEXT: br label [[BACKEDGE]]
17; CHECK: backedge:
Max Kazantsev7b78d392018-08-17 06:19:17 +000018; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; (mustexec in: loop)
19; CHECK-NEXT: br label [[LOOP]] ; (mustexec in: loop)
Max Kazantsev4e9def52018-08-10 09:20:46 +000020;
21entry:
22 br label %loop
23
24loop:
25 %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
26 br i1 %cond, label %maybe_taken, label %backedge
27
28maybe_taken:
29 %div = sdiv i32 %a, %b
30 br label %backedge
31
32backedge:
33 %iv.next = add i32 %iv, 1
34 br label %loop
35}
36
37; Unlike the test before, we can say that backedge is mustexec, which is the
38; correct behavior.
39define void @test_impossible_exit_on_latch(i1 %cond, i32 %a, i32 %b) {
40; CHECK-LABEL: @test_impossible_exit_on_latch(
41; CHECK-NEXT: entry:
42; CHECK-NEXT: br label [[LOOP:%.*]]
43; CHECK: loop:
44; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
45; CHECK-NEXT: br i1 [[COND:%.*]], label [[MAYBE_TAKEN:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
46; CHECK: maybe_taken:
47; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
48; CHECK-NEXT: br label [[BACKEDGE]]
49; CHECK: backedge:
50; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; (mustexec in: loop)
51; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT:%.*]] ; (mustexec in: loop)
52; CHECK: exit:
53; CHECK-NEXT: ret void
54;
55entry:
56 br label %loop
57
58loop:
59 %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
60 br i1 %cond, label %maybe_taken, label %backedge
61
62maybe_taken:
63 %div = sdiv i32 %a, %b
64 br label %backedge
65
66backedge:
67 %iv.next = add i32 %iv, 1
68 br i1 true, label %loop, label %exit
69
70exit:
71 ret void
72}
73
Max Kazantsev7b78d392018-08-17 06:19:17 +000074; Make sure that sdiv is NOT marked as mustexec.
Max Kazantsev4e9def52018-08-10 09:20:46 +000075define void @test_impossible_exit_in_untaken_block(i1 %cond, i32 %a, i32 %b, i32* %p) {
76; CHECK-LABEL: @test_impossible_exit_in_untaken_block(
77; CHECK-NEXT: entry:
78; CHECK-NEXT: br label [[LOOP:%.*]]
79; CHECK: loop:
80; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
81; CHECK-NEXT: br i1 [[COND:%.*]], label [[MAYBE_TAKEN:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
82; CHECK: maybe_taken:
Max Kazantsev7b78d392018-08-17 06:19:17 +000083; CHECK-NOT: mustexec
84; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
85; CHECK-NEXT: store i32 [[DIV]], i32* [[P:%.*]]
86; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[EXIT:%.*]]
Max Kazantsev4e9def52018-08-10 09:20:46 +000087; CHECK: backedge:
88; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; (mustexec in: loop)
89; CHECK-NEXT: br label [[LOOP]] ; (mustexec in: loop)
90; CHECK: exit:
91; CHECK-NEXT: ret void
92;
93entry:
94 br label %loop
95
96loop:
97 %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
98 br i1 %cond, label %maybe_taken, label %backedge
99
100maybe_taken:
101 %div = sdiv i32 %a, %b
102 store i32 %div, i32* %p
103 br i1 true, label %backedge, label %exit
104
105backedge:
106 %iv.next = add i32 %iv, 1
107 br label %loop
108
109exit:
110 ret void
111}