| Roman Lebedev | 42a1ff1 | 2018-06-20 07:54:11 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py |
| 2 | ; RUN: opt -S -analyze -scalar-evolution < %s | FileCheck %s |
| 3 | |
| 4 | ; The obvious case. |
| 5 | define i32 @udiv_biggerLshr(i32 %val) nounwind { |
| 6 | ; CHECK-LABEL: 'udiv_biggerLshr' |
| 7 | ; CHECK-NEXT: Classifying expressions for: @udiv_biggerLshr |
| 8 | ; CHECK-NEXT: %tmp1 = udiv i32 %val, 64 |
| 9 | ; CHECK-NEXT: --> (%val /u 64) U: [0,67108864) S: [0,67108864) |
| 10 | ; CHECK-NEXT: %tmp2 = mul i32 %tmp1, 16 |
| Tim Shen | a064622 | 2018-07-13 23:58:46 +0000 | [diff] [blame] | 11 | ; CHECK-NEXT: --> (16 * (%val /u 64))<nuw><nsw> U: [0,1073741809) S: [0,1073741809) |
| Roman Lebedev | 42a1ff1 | 2018-06-20 07:54:11 +0000 | [diff] [blame] | 12 | ; CHECK-NEXT: Determining loop execution counts for: @udiv_biggerLshr |
| 13 | ; |
| 14 | %tmp1 = udiv i32 %val, 64 |
| 15 | %tmp2 = mul i32 %tmp1, 16 |
| 16 | ret i32 %tmp2 |
| 17 | } |
| 18 | |
| 19 | define i32 @udiv_biggerShl(i32 %val) nounwind { |
| 20 | ; CHECK-LABEL: 'udiv_biggerShl' |
| 21 | ; CHECK-NEXT: Classifying expressions for: @udiv_biggerShl |
| 22 | ; CHECK-NEXT: %tmp1 = udiv i32 %val, 16 |
| 23 | ; CHECK-NEXT: --> (%val /u 16) U: [0,268435456) S: [0,268435456) |
| 24 | ; CHECK-NEXT: %tmp2 = mul i32 %tmp1, 64 |
| 25 | ; CHECK-NEXT: --> (64 * (%val /u 16)) U: [0,-63) S: [-2147483648,2147483585) |
| 26 | ; CHECK-NEXT: Determining loop execution counts for: @udiv_biggerShl |
| 27 | ; |
| 28 | %tmp1 = udiv i32 %val, 16 |
| 29 | %tmp2 = mul i32 %tmp1, 64 |
| 30 | ret i32 %tmp2 |
| 31 | } |
| 32 | |
| 33 | ; Or, it could have been transformed to shifts |
| 34 | |
| 35 | define i32 @shifty_biggerLshr(i32 %val) { |
| 36 | ; CHECK-LABEL: 'shifty_biggerLshr' |
| 37 | ; CHECK-NEXT: Classifying expressions for: @shifty_biggerLshr |
| 38 | ; CHECK-NEXT: %tmp1 = lshr i32 %val, 6 |
| 39 | ; CHECK-NEXT: --> (%val /u 64) U: [0,67108864) S: [0,67108864) |
| 40 | ; CHECK-NEXT: %tmp2 = shl i32 %tmp1, 4 |
| Tim Shen | a064622 | 2018-07-13 23:58:46 +0000 | [diff] [blame] | 41 | ; CHECK-NEXT: --> (16 * (%val /u 64))<nuw><nsw> U: [0,1073741809) S: [0,1073741809) |
| Roman Lebedev | 42a1ff1 | 2018-06-20 07:54:11 +0000 | [diff] [blame] | 42 | ; CHECK-NEXT: Determining loop execution counts for: @shifty_biggerLshr |
| 43 | ; |
| 44 | %tmp1 = lshr i32 %val, 6 |
| 45 | %tmp2 = shl i32 %tmp1, 4 |
| 46 | ret i32 %tmp2 |
| 47 | } |
| 48 | |
| 49 | define i32 @shifty_biggerLshr_lshrexact(i32 %val) { |
| 50 | ; CHECK-LABEL: 'shifty_biggerLshr_lshrexact' |
| 51 | ; CHECK-NEXT: Classifying expressions for: @shifty_biggerLshr_lshrexact |
| 52 | ; CHECK-NEXT: %tmp1 = lshr exact i32 %val, 6 |
| 53 | ; CHECK-NEXT: --> (%val /u 64) U: [0,67108864) S: [0,67108864) |
| 54 | ; CHECK-NEXT: %tmp2 = shl i32 %tmp1, 4 |
| Tim Shen | a064622 | 2018-07-13 23:58:46 +0000 | [diff] [blame] | 55 | ; CHECK-NEXT: --> (16 * (%val /u 64))<nuw><nsw> U: [0,1073741809) S: [0,1073741809) |
| Roman Lebedev | 42a1ff1 | 2018-06-20 07:54:11 +0000 | [diff] [blame] | 56 | ; CHECK-NEXT: Determining loop execution counts for: @shifty_biggerLshr_lshrexact |
| 57 | ; |
| 58 | %tmp1 = lshr exact i32 %val, 6 |
| 59 | %tmp2 = shl i32 %tmp1, 4 |
| 60 | ret i32 %tmp2 |
| 61 | } |
| 62 | |
| 63 | define i32 @shifty_biggerShr(i32 %val) { |
| 64 | ; CHECK-LABEL: 'shifty_biggerShr' |
| 65 | ; CHECK-NEXT: Classifying expressions for: @shifty_biggerShr |
| 66 | ; CHECK-NEXT: %tmp1 = lshr i32 %val, 4 |
| 67 | ; CHECK-NEXT: --> (%val /u 16) U: [0,268435456) S: [0,268435456) |
| 68 | ; CHECK-NEXT: %tmp2 = shl i32 %tmp1, 6 |
| 69 | ; CHECK-NEXT: --> (64 * (%val /u 16)) U: [0,-63) S: [-2147483648,2147483585) |
| 70 | ; CHECK-NEXT: Determining loop execution counts for: @shifty_biggerShr |
| 71 | ; |
| 72 | %tmp1 = lshr i32 %val, 4 |
| 73 | %tmp2 = shl i32 %tmp1, 6 |
| 74 | ret i32 %tmp2 |
| 75 | } |
| 76 | |
| 77 | define i32 @shifty_biggerShr_lshrexact(i32 %val) { |
| 78 | ; CHECK-LABEL: 'shifty_biggerShr_lshrexact' |
| 79 | ; CHECK-NEXT: Classifying expressions for: @shifty_biggerShr_lshrexact |
| 80 | ; CHECK-NEXT: %tmp1 = lshr exact i32 %val, 4 |
| 81 | ; CHECK-NEXT: --> (%val /u 16) U: [0,268435456) S: [0,268435456) |
| 82 | ; CHECK-NEXT: %tmp2 = shl i32 %tmp1, 6 |
| 83 | ; CHECK-NEXT: --> (64 * (%val /u 16)) U: [0,-63) S: [-2147483648,2147483585) |
| 84 | ; CHECK-NEXT: Determining loop execution counts for: @shifty_biggerShr_lshrexact |
| 85 | ; |
| 86 | %tmp1 = lshr exact i32 %val, 4 |
| 87 | %tmp2 = shl i32 %tmp1, 6 |
| 88 | ret i32 %tmp2 |
| 89 | } |
| 90 | |
| 91 | ; Or, further folded into mask variant. |
| 92 | |
| 93 | define i32 @masky_biggerLshr(i32 %val) { |
| 94 | ; CHECK-LABEL: 'masky_biggerLshr' |
| 95 | ; CHECK-NEXT: Classifying expressions for: @masky_biggerLshr |
| 96 | ; CHECK-NEXT: %tmp1 = lshr i32 %val, 2 |
| 97 | ; CHECK-NEXT: --> (%val /u 4) U: [0,1073741824) S: [0,1073741824) |
| 98 | ; CHECK-NEXT: %tmp2 = and i32 %tmp1, -16 |
| Tim Shen | a064622 | 2018-07-13 23:58:46 +0000 | [diff] [blame] | 99 | ; CHECK-NEXT: --> (16 * (%val /u 64))<nuw><nsw> U: [0,1073741809) S: [0,1073741809) |
| Roman Lebedev | 42a1ff1 | 2018-06-20 07:54:11 +0000 | [diff] [blame] | 100 | ; CHECK-NEXT: Determining loop execution counts for: @masky_biggerLshr |
| 101 | ; |
| 102 | %tmp1 = lshr i32 %val, 2 |
| 103 | %tmp2 = and i32 %tmp1, -16 |
| 104 | ret i32 %tmp2 |
| 105 | } |
| 106 | |
| 107 | define i32 @masky_biggerLshr_lshrexact(i32 %val) { |
| 108 | ; CHECK-LABEL: 'masky_biggerLshr_lshrexact' |
| 109 | ; CHECK-NEXT: Classifying expressions for: @masky_biggerLshr_lshrexact |
| 110 | ; CHECK-NEXT: %tmp1 = lshr exact i32 %val, 2 |
| 111 | ; CHECK-NEXT: --> (%val /u 4) U: [0,1073741824) S: [0,1073741824) |
| 112 | ; CHECK-NEXT: Determining loop execution counts for: @masky_biggerLshr_lshrexact |
| 113 | ; |
| 114 | %tmp1 = lshr exact i32 %val, 2 |
| 115 | ret i32 %tmp1 |
| 116 | } |
| 117 | |
| 118 | define i32 @masky_biggerShr(i32 %val) { |
| 119 | ; CHECK-LABEL: 'masky_biggerShr' |
| 120 | ; CHECK-NEXT: Classifying expressions for: @masky_biggerShr |
| 121 | ; CHECK-NEXT: %tmp1 = shl i32 %val, 2 |
| 122 | ; CHECK-NEXT: --> (4 * %val) U: [0,-3) S: [-2147483648,2147483645) |
| 123 | ; CHECK-NEXT: %tmp2 = and i32 %tmp1, -64 |
| Tim Shen | a064622 | 2018-07-13 23:58:46 +0000 | [diff] [blame] | 124 | ; CHECK-NEXT: --> (64 * (zext i26 (trunc i32 (%val /u 16) to i26) to i32))<nuw> U: [0,-63) S: [0,-63) |
| Roman Lebedev | 42a1ff1 | 2018-06-20 07:54:11 +0000 | [diff] [blame] | 125 | ; CHECK-NEXT: Determining loop execution counts for: @masky_biggerShr |
| 126 | ; |
| 127 | %tmp1 = shl i32 %val, 2 |
| 128 | %tmp2 = and i32 %tmp1, -64 |
| 129 | ret i32 %tmp2 |
| 130 | } |
| 131 | |
| 132 | define i32 @masky_biggerShr_lshrexact(i32 %val) { |
| 133 | ; CHECK-LABEL: 'masky_biggerShr_lshrexact' |
| 134 | ; CHECK-NEXT: Classifying expressions for: @masky_biggerShr_lshrexact |
| 135 | ; CHECK-NEXT: %tmp1 = shl i32 %val, 2 |
| 136 | ; CHECK-NEXT: --> (4 * %val) U: [0,-3) S: [-2147483648,2147483645) |
| 137 | ; CHECK-NEXT: Determining loop execution counts for: @masky_biggerShr_lshrexact |
| 138 | ; |
| 139 | %tmp1 = shl i32 %val, 2 |
| 140 | ret i32 %tmp1 |
| 141 | } |