blob: abf9b3ecefa72f4655e36f389550bc611d81ef46 [file] [log] [blame]
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +00001; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
3
4; Mostly overlaps with fmed3.ll to stress specific cases of
5; isKnownNeverSNaN.
6
7define float @v_test_known_not_snan_fabs_input_fmed3_r_i_i_f32(float %a) #0 {
8; GCN-LABEL: v_test_known_not_snan_fabs_input_fmed3_r_i_i_f32:
9; GCN: ; %bb.0:
10; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
11; GCN-NEXT: v_rcp_f32_e32 v0, v0
12; GCN-NEXT: v_med3_f32 v0, |v0|, 2.0, 4.0
13; GCN-NEXT: s_setpc_b64 s[30:31]
14 %a.nnan.add = fdiv nnan float 1.0, %a
15 %known.not.snan = call float @llvm.fabs.f32(float %a.nnan.add)
16 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
17 %med = call float @llvm.minnum.f32(float %max, float 4.0)
18 ret float %med
19}
20
21define float @v_test_known_not_snan_fneg_input_fmed3_r_i_i_f32(float %a) #0 {
22; GCN-LABEL: v_test_known_not_snan_fneg_input_fmed3_r_i_i_f32:
23; GCN: ; %bb.0:
24; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
25; GCN-NEXT: v_rcp_f32_e64 v0, -v0
26; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
27; GCN-NEXT: s_setpc_b64 s[30:31]
28 %a.nnan.add = fdiv nnan float 1.0, %a
29 %known.not.snan = fsub float -0.0, %a.nnan.add
30 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
31 %med = call float @llvm.minnum.f32(float %max, float 4.0)
32 ret float %med
33}
34
35define float @v_test_known_not_snan_fpext_input_fmed3_r_i_i_f32(half %a) #0 {
36; GCN-LABEL: v_test_known_not_snan_fpext_input_fmed3_r_i_i_f32:
37; GCN: ; %bb.0:
38; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
39; GCN-NEXT: v_add_f16_e32 v0, 1.0, v0
40; GCN-NEXT: v_cvt_f32_f16_e32 v0, v0
41; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
42; GCN-NEXT: s_setpc_b64 s[30:31]
43 %a.nnan.add = fadd nnan half %a, 1.0
44 %known.not.snan = fpext half %a.nnan.add to float
45 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
46 %med = call float @llvm.minnum.f32(float %max, float 4.0)
47 ret float %med
48}
49
50define float @v_test_known_not_snan_fptrunc_input_fmed3_r_i_i_f32(double %a) #0 {
51; GCN-LABEL: v_test_known_not_snan_fptrunc_input_fmed3_r_i_i_f32:
52; GCN: ; %bb.0:
53; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
54; GCN-NEXT: v_add_f64 v[0:1], v[0:1], 1.0
55; GCN-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
56; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
57; GCN-NEXT: s_setpc_b64 s[30:31]
58 %a.nnan.add = fadd nnan double %a, 1.0
59 %known.not.snan = fptrunc double %a.nnan.add to float
60 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
61 %med = call float @llvm.minnum.f32(float %max, float 4.0)
62 ret float %med
63}
64
65define float @v_test_known_not_snan_copysign_input_fmed3_r_i_i_f32(float %a, float %sign) #0 {
66; GCN-LABEL: v_test_known_not_snan_copysign_input_fmed3_r_i_i_f32:
67; GCN: ; %bb.0:
68; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
69; GCN-NEXT: v_rcp_f32_e32 v0, v0
70; GCN-NEXT: s_brev_b32 s6, -2
71; GCN-NEXT: v_bfi_b32 v0, s6, v0, v1
72; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
73; GCN-NEXT: s_setpc_b64 s[30:31]
74 %a.nnan.add = fdiv nnan float 1.0, %a
75 %known.not.snan = call float @llvm.copysign.f32(float %a.nnan.add, float %sign)
76 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
77 %med = call float @llvm.minnum.f32(float %max, float 4.0)
78 ret float %med
79}
80
81; Canonicalize always quiets, so nothing is necessary.
82define float @v_test_known_canonicalize_input_fmed3_r_i_i_f32(float %a) #0 {
83; GCN-LABEL: v_test_known_canonicalize_input_fmed3_r_i_i_f32:
84; GCN: ; %bb.0:
85; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
86; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
87; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
88; GCN-NEXT: s_setpc_b64 s[30:31]
89 %known.not.snan = call float @llvm.canonicalize.f32(float %a)
90 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
91 %med = call float @llvm.minnum.f32(float %max, float 4.0)
92 ret float %med
93}
94
95define float @v_test_known_not_snan_minnum_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
96; GCN-LABEL: v_test_known_not_snan_minnum_input_fmed3_r_i_i_f32:
97; GCN: ; %bb.0:
98; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
99; GCN-NEXT: v_rcp_f32_e32 v0, v0
100; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
101; GCN-NEXT: v_min_f32_e32 v0, v0, v1
Matt Arsenault687ec752018-10-22 16:27:27 +0000102; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000103; GCN-NEXT: s_setpc_b64 s[30:31]
104 %a.nnan.add = fdiv nnan float 1.0, %a
105 %b.nnan.add = fadd nnan float %b, 1.0
106 %known.not.snan = call float @llvm.minnum.f32(float %a.nnan.add, float %b.nnan.add)
107 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
108 %med = call float @llvm.minnum.f32(float %max, float 4.0)
109 ret float %med
110}
111
Matt Arsenault687ec752018-10-22 16:27:27 +0000112define float @v_test_known_not_minnum_maybe_nan_src0_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
113; GCN-LABEL: v_test_known_not_minnum_maybe_nan_src0_input_fmed3_r_i_i_f32:
114; GCN: ; %bb.0:
115; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
116; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
117; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
118; GCN-NEXT: v_min_f32_e32 v0, v0, v1
119; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
120; GCN-NEXT: s_setpc_b64 s[30:31]
121 %b.nsnan = fadd float %b, 1.0
122 %known.not.snan = call float @llvm.minnum.f32(float %a, float %b.nsnan)
123 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
124 %med = call float @llvm.minnum.f32(float %max, float 4.0)
125 ret float %med
126}
127
128define float @v_test_known_not_minnum_maybe_nan_src1_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
129; GCN-LABEL: v_test_known_not_minnum_maybe_nan_src1_input_fmed3_r_i_i_f32:
130; GCN: ; %bb.0:
131; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
132; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0
133; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
134; GCN-NEXT: v_min_f32_e32 v0, v0, v1
135; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
136; GCN-NEXT: s_setpc_b64 s[30:31]
137 %a.nsnan = fadd float %a, 1.0
138 %known.not.snan = call float @llvm.minnum.f32(float %a.nsnan, float %b)
139 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
140 %med = call float @llvm.minnum.f32(float %max, float 4.0)
141 ret float %med
142}
143
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000144define float @v_minnum_possible_nan_lhs_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
145; GCN-LABEL: v_minnum_possible_nan_lhs_input_fmed3_r_i_i_f32:
146; GCN: ; %bb.0:
147; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
148; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
Matt Arsenault687ec752018-10-22 16:27:27 +0000149; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000150; GCN-NEXT: v_min_f32_e32 v0, v0, v1
Matt Arsenault687ec752018-10-22 16:27:27 +0000151; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000152; GCN-NEXT: s_setpc_b64 s[30:31]
153 %b.nnan.add = fadd nnan float %b, 1.0
154 %known.not.snan = call float @llvm.minnum.f32(float %a, float %b.nnan.add)
155 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
156 %med = call float @llvm.minnum.f32(float %max, float 4.0)
157 ret float %med
158}
159
160define float @v_minnum_possible_nan_rhs_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
161; GCN-LABEL: v_minnum_possible_nan_rhs_input_fmed3_r_i_i_f32:
162; GCN: ; %bb.0:
163; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
164; GCN-NEXT: v_rcp_f32_e32 v0, v0
Matt Arsenault687ec752018-10-22 16:27:27 +0000165; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000166; GCN-NEXT: v_min_f32_e32 v0, v0, v1
Matt Arsenault687ec752018-10-22 16:27:27 +0000167; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000168; GCN-NEXT: s_setpc_b64 s[30:31]
169 %a.nnan.add = fdiv nnan float 1.0, %a
170 %known.not.snan = call float @llvm.minnum.f32(float %a.nnan.add, float %b)
171 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
172 %med = call float @llvm.minnum.f32(float %max, float 4.0)
173 ret float %med
174}
175
176define float @v_test_known_not_snan_maxnum_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
177; GCN-LABEL: v_test_known_not_snan_maxnum_input_fmed3_r_i_i_f32:
178; GCN: ; %bb.0:
179; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
180; GCN-NEXT: v_rcp_f32_e32 v0, v0
181; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
Matt Arsenault687ec752018-10-22 16:27:27 +0000182; GCN-NEXT: v_max_f32_e32 v0, v0, v1
183; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000184; GCN-NEXT: s_setpc_b64 s[30:31]
185 %a.nnan.add = fdiv nnan float 1.0, %a
186 %b.nnan.add = fadd nnan float %b, 1.0
187 %known.not.snan = call float @llvm.maxnum.f32(float %a.nnan.add, float %b.nnan.add)
188 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
189 %med = call float @llvm.minnum.f32(float %max, float 4.0)
190 ret float %med
191}
192
193define float @v_maxnum_possible_nan_lhs_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
194; GCN-LABEL: v_maxnum_possible_nan_lhs_input_fmed3_r_i_i_f32:
195; GCN: ; %bb.0:
196; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
197; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
Matt Arsenault687ec752018-10-22 16:27:27 +0000198; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
199; GCN-NEXT: v_max_f32_e32 v0, v0, v1
200; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000201; GCN-NEXT: s_setpc_b64 s[30:31]
202 %b.nnan.add = fadd nnan float %b, 1.0
203 %known.not.snan = call float @llvm.maxnum.f32(float %a, float %b.nnan.add)
204 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
205 %med = call float @llvm.minnum.f32(float %max, float 4.0)
206 ret float %med
207}
208
209define float @v_maxnum_possible_nan_rhs_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
210; GCN-LABEL: v_maxnum_possible_nan_rhs_input_fmed3_r_i_i_f32:
211; GCN: ; %bb.0:
212; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
213; GCN-NEXT: v_rcp_f32_e32 v0, v0
Matt Arsenault687ec752018-10-22 16:27:27 +0000214; GCN-NEXT: v_mul_f32_e32 v1, 1.0, v1
215; GCN-NEXT: v_max_f32_e32 v0, v0, v1
216; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000217; GCN-NEXT: s_setpc_b64 s[30:31]
218 %a.nnan.add = fdiv nnan float 1.0, %a
219 %known.not.snan = call float @llvm.maxnum.f32(float %a.nnan.add, float %b)
220 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
221 %med = call float @llvm.minnum.f32(float %max, float 4.0)
222 ret float %med
223}
224
225define float @v_test_known_not_snan_select_input_fmed3_r_i_i_f32(float %a, float %b, i32 %c) #0 {
226; GCN-LABEL: v_test_known_not_snan_select_input_fmed3_r_i_i_f32:
227; GCN: ; %bb.0:
228; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
229; GCN-NEXT: v_rcp_f32_e32 v0, v0
230; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
231; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
232; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
233; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
234; GCN-NEXT: s_setpc_b64 s[30:31]
235 %a.nnan.add = fdiv nnan float 1.0, %a
236 %b.nnan.add = fadd nnan float %b, 1.0
237 %cmp = icmp eq i32 %c, 0
238 %known.not.snan = select i1 %cmp, float %a.nnan.add, float %b.nnan.add
239 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
240 %med = call float @llvm.minnum.f32(float %max, float 4.0)
241 ret float %med
242}
243
244define float @v_select_possible_nan_lhs_input_fmed3_r_i_i_f32(float %a, float %b, i32 %c) #0 {
245; GCN-LABEL: v_select_possible_nan_lhs_input_fmed3_r_i_i_f32:
246; GCN: ; %bb.0:
247; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
248; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1
249; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
250; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
Matt Arsenault687ec752018-10-22 16:27:27 +0000251; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
252; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000253; GCN-NEXT: s_setpc_b64 s[30:31]
254 %b.nnan.add = fadd nnan float %b, 1.0
255 %cmp = icmp eq i32 %c, 0
256 %known.not.snan = select i1 %cmp, float %a, float %b.nnan.add
257 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
258 %med = call float @llvm.minnum.f32(float %max, float 4.0)
259 ret float %med
260}
261
262define float @v_select_possible_nan_rhs_input_fmed3_r_i_i_f32(float %a, float %b, i32 %c) #0 {
263; GCN-LABEL: v_select_possible_nan_rhs_input_fmed3_r_i_i_f32:
264; GCN: ; %bb.0:
265; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
266; GCN-NEXT: v_rcp_f32_e32 v0, v0
267; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
268; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
Matt Arsenault687ec752018-10-22 16:27:27 +0000269; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
270; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000271; GCN-NEXT: s_setpc_b64 s[30:31]
272 %a.nnan.add = fdiv nnan float 1.0, %a
273 %cmp = icmp eq i32 %c, 0
274 %known.not.snan = select i1 %cmp, float %a.nnan.add, float %b
275 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
276 %med = call float @llvm.minnum.f32(float %max, float 4.0)
277 ret float %med
278}
279
280define float @v_test_known_not_snan_fadd_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
281; GCN-LABEL: v_test_known_not_snan_fadd_input_fmed3_r_i_i_f32:
282; GCN: ; %bb.0:
283; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
284; GCN-NEXT: v_add_f32_e32 v0, v0, v1
285; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
286; GCN-NEXT: s_setpc_b64 s[30:31]
287 %known.not.snan = fadd float %a, %b
288 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
289 %med = call float @llvm.minnum.f32(float %max, float 4.0)
290 ret float %med
291}
292
293define float @v_test_known_not_snan_fsub_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
294; GCN-LABEL: v_test_known_not_snan_fsub_input_fmed3_r_i_i_f32:
295; GCN: ; %bb.0:
296; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
297; GCN-NEXT: v_sub_f32_e32 v0, v0, v1
298; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
299; GCN-NEXT: s_setpc_b64 s[30:31]
300 %known.not.snan = fsub float %a, %b
301 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
302 %med = call float @llvm.minnum.f32(float %max, float 4.0)
303 ret float %med
304}
305
306define float @v_test_known_not_snan_fmul_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
307; GCN-LABEL: v_test_known_not_snan_fmul_input_fmed3_r_i_i_f32:
308; GCN: ; %bb.0:
309; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
310; GCN-NEXT: v_mul_f32_e32 v0, v0, v1
311; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
312; GCN-NEXT: s_setpc_b64 s[30:31]
313 %known.not.snan = fmul float %a, %b
314 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
315 %med = call float @llvm.minnum.f32(float %max, float 4.0)
316 ret float %med
317}
318
319define float @v_test_known_not_snan_uint_to_fp_input_fmed3_r_i_i_f32(i32 %a) #0 {
320; GCN-LABEL: v_test_known_not_snan_uint_to_fp_input_fmed3_r_i_i_f32:
321; GCN: ; %bb.0:
322; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
323; GCN-NEXT: v_cvt_f32_u32_e32 v0, v0
324; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
325; GCN-NEXT: s_setpc_b64 s[30:31]
326 %known.not.snan = uitofp i32 %a to float
327 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
328 %med = call float @llvm.minnum.f32(float %max, float 4.0)
329 ret float %med
330}
331
332define float @v_test_known_not_snan_sint_to_fp_input_fmed3_r_i_i_f32(i32 %a) #0 {
333; GCN-LABEL: v_test_known_not_snan_sint_to_fp_input_fmed3_r_i_i_f32:
334; GCN: ; %bb.0:
335; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
336; GCN-NEXT: v_cvt_f32_i32_e32 v0, v0
337; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
338; GCN-NEXT: s_setpc_b64 s[30:31]
339 %known.not.snan = sitofp i32 %a to float
340 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
341 %med = call float @llvm.minnum.f32(float %max, float 4.0)
342 ret float %med
343}
344
345define float @v_test_known_not_snan_fma_input_fmed3_r_i_i_f32(float %a, float %b, float %c) #0 {
346; GCN-LABEL: v_test_known_not_snan_fma_input_fmed3_r_i_i_f32:
347; GCN: ; %bb.0:
348; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
349; GCN-NEXT: v_fma_f32 v0, v0, v1, v2
350; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
351; GCN-NEXT: s_setpc_b64 s[30:31]
352 %known.not.snan = call float @llvm.fma.f32(float %a, float %b, float %c)
353 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
354 %med = call float @llvm.minnum.f32(float %max, float 4.0)
355 ret float %med
356}
357
358define float @v_test_known_not_snan_fmad_input_fmed3_r_i_i_f32(float %a, float %b, float %c) #0 {
359; GCN-LABEL: v_test_known_not_snan_fmad_input_fmed3_r_i_i_f32:
360; GCN: ; %bb.0:
361; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
362; GCN-NEXT: v_mac_f32_e32 v2, v0, v1
363; GCN-NEXT: v_med3_f32 v0, v2, 2.0, 4.0
364; GCN-NEXT: s_setpc_b64 s[30:31]
365 %known.not.snan = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
366 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
367 %med = call float @llvm.minnum.f32(float %max, float 4.0)
368 ret float %med
369}
370
371
372define float @v_test_known_not_snan_sin_input_fmed3_r_i_i_f32(float %a) #0 {
373; GCN-LABEL: v_test_known_not_snan_sin_input_fmed3_r_i_i_f32:
374; GCN: ; %bb.0:
375; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
376; GCN-NEXT: v_mul_f32_e32 v0, 0.15915494, v0
377; GCN-NEXT: v_fract_f32_e32 v0, v0
378; GCN-NEXT: v_sin_f32_e32 v0, v0
379; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
380; GCN-NEXT: s_setpc_b64 s[30:31]
381 %known.not.snan = call float @llvm.sin.f32(float %a)
382 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
383 %med = call float @llvm.minnum.f32(float %max, float 4.0)
384 ret float %med
385}
386
387define float @v_test_known_not_snan_cos_input_fmed3_r_i_i_f32(float %a) #0 {
388; GCN-LABEL: v_test_known_not_snan_cos_input_fmed3_r_i_i_f32:
389; GCN: ; %bb.0:
390; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
391; GCN-NEXT: v_mul_f32_e32 v0, 0.15915494, v0
392; GCN-NEXT: v_fract_f32_e32 v0, v0
393; GCN-NEXT: v_cos_f32_e32 v0, v0
394; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
395; GCN-NEXT: s_setpc_b64 s[30:31]
396 %known.not.snan = call float @llvm.cos.f32(float %a)
397 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
398 %med = call float @llvm.minnum.f32(float %max, float 4.0)
399 ret float %med
400}
401
402define float @v_test_known_not_snan_exp2_input_fmed3_r_i_i_f32(float %a) #0 {
403; GCN-LABEL: v_test_known_not_snan_exp2_input_fmed3_r_i_i_f32:
404; GCN: ; %bb.0:
405; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
406; GCN-NEXT: v_exp_f32_e32 v0, v0
407; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
408; GCN-NEXT: s_setpc_b64 s[30:31]
409 %known.not.snan = call float @llvm.exp2.f32(float %a)
410 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
411 %med = call float @llvm.minnum.f32(float %max, float 4.0)
412 ret float %med
413}
414
415define float @v_test_known_not_snan_trunc_input_fmed3_r_i_i_f32(float %a) #0 {
416; GCN-LABEL: v_test_known_not_snan_trunc_input_fmed3_r_i_i_f32:
417; GCN: ; %bb.0:
418; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
419; GCN-NEXT: v_trunc_f32_e32 v0, v0
420; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
421; GCN-NEXT: s_setpc_b64 s[30:31]
422 %known.not.snan = call float @llvm.trunc.f32(float %a)
423 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
424 %med = call float @llvm.minnum.f32(float %max, float 4.0)
425 ret float %med
426}
427
428define float @v_test_known_not_snan_floor_input_fmed3_r_i_i_f32(float %a) #0 {
429; GCN-LABEL: v_test_known_not_snan_floor_input_fmed3_r_i_i_f32:
430; GCN: ; %bb.0:
431; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
432; GCN-NEXT: v_floor_f32_e32 v0, v0
433; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
434; GCN-NEXT: s_setpc_b64 s[30:31]
435 %known.not.snan = call float @llvm.floor.f32(float %a)
436 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
437 %med = call float @llvm.minnum.f32(float %max, float 4.0)
438 ret float %med
439}
440
441define float @v_test_known_not_snan_ceil_input_fmed3_r_i_i_f32(float %a) #0 {
442; GCN-LABEL: v_test_known_not_snan_ceil_input_fmed3_r_i_i_f32:
443; GCN: ; %bb.0:
444; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
445; GCN-NEXT: v_floor_f32_e32 v0, v0
446; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
447; GCN-NEXT: s_setpc_b64 s[30:31]
448 %known.not.snan = call float @llvm.floor.f32(float %a)
449 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
450 %med = call float @llvm.minnum.f32(float %max, float 4.0)
451 ret float %med
452}
453
454define float @v_test_known_not_snan_round_input_fmed3_r_i_i_f32(float %a) #0 {
455; GCN-LABEL: v_test_known_not_snan_round_input_fmed3_r_i_i_f32:
456; GCN: ; %bb.0:
457; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
458; GCN-NEXT: s_brev_b32 s6, -2
459; GCN-NEXT: v_trunc_f32_e32 v2, v0
460; GCN-NEXT: v_bfi_b32 v1, s6, 1.0, v0
461; GCN-NEXT: v_sub_f32_e32 v0, v0, v2
462; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v0|, 0.5
463; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
464; GCN-NEXT: v_add_f32_e32 v0, v2, v0
465; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
466; GCN-NEXT: s_setpc_b64 s[30:31]
467 %known.not.snan = call float @llvm.round.f32(float %a)
468 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
469 %med = call float @llvm.minnum.f32(float %max, float 4.0)
470 ret float %med
471}
472
473define float @v_test_known_not_snan_rint_input_fmed3_r_i_i_f32(float %a) #0 {
474; GCN-LABEL: v_test_known_not_snan_rint_input_fmed3_r_i_i_f32:
475; GCN: ; %bb.0:
476; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
477; GCN-NEXT: v_rndne_f32_e32 v0, v0
478; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
479; GCN-NEXT: s_setpc_b64 s[30:31]
480 %known.not.snan = call float @llvm.rint.f32(float %a)
481 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
482 %med = call float @llvm.minnum.f32(float %max, float 4.0)
483 ret float %med
484}
485
486define float @v_test_known_not_snan_nearbyint_input_fmed3_r_i_i_f32(float %a) #0 {
487; GCN-LABEL: v_test_known_not_snan_nearbyint_input_fmed3_r_i_i_f32:
488; GCN: ; %bb.0:
489; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
490; GCN-NEXT: v_rndne_f32_e32 v0, v0
491; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
492; GCN-NEXT: s_setpc_b64 s[30:31]
493 %known.not.snan = call float @llvm.nearbyint.f32(float %a)
494 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
495 %med = call float @llvm.minnum.f32(float %max, float 4.0)
496 ret float %med
497}
498
499define float @v_test_known_not_snan_fmul_legacy_input_fmed3_r_i_i_f32(float %a, float %b) #0 {
500; GCN-LABEL: v_test_known_not_snan_fmul_legacy_input_fmed3_r_i_i_f32:
501; GCN: ; %bb.0:
502; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
503; GCN-NEXT: v_mul_legacy_f32_e32 v0, v0, v1
504; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
505; GCN-NEXT: s_setpc_b64 s[30:31]
506 %known.not.snan = call float @llvm.amdgcn.fmul.legacy(float %a, float %b)
507 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
508 %med = call float @llvm.minnum.f32(float %max, float 4.0)
509 ret float %med
510}
511
512define float @v_test_known_not_snan_ldexp_input_fmed3_r_i_i_f32(float %a, i32 %b) #0 {
513; GCN-LABEL: v_test_known_not_snan_ldexp_input_fmed3_r_i_i_f32:
514; GCN: ; %bb.0:
515; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
516; GCN-NEXT: v_ldexp_f32 v0, v0, v1
517; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
518; GCN-NEXT: s_setpc_b64 s[30:31]
519 %known.not.snan = call float @llvm.amdgcn.ldexp.f32(float %a, i32 %b)
520 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
521 %med = call float @llvm.minnum.f32(float %max, float 4.0)
522 ret float %med
523}
524
525define float @v_test_known_not_snan_fmed3_input_fmed3_r_i_i_f32(float %a, float %b, float %c) #0 {
526; GCN-LABEL: v_test_known_not_snan_fmed3_input_fmed3_r_i_i_f32:
527; GCN: ; %bb.0:
528; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
529; GCN-NEXT: v_med3_f32 v0, v0, v1, v2
Matt Arsenault687ec752018-10-22 16:27:27 +0000530; GCN-NEXT: v_mul_f32_e32 v0, 1.0, v0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000531; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
532; GCN-NEXT: s_setpc_b64 s[30:31]
533 %known.not.snan = call float @llvm.amdgcn.fmed3.f32(float %a, float %b, float %c)
534 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
535 %med = call float @llvm.minnum.f32(float %max, float 4.0)
536 ret float %med
537}
538
539define float @v_test_known_not_snan_fmin3_input_fmed3_r_i_i_f32(float %a, float %b, float %c) #0 {
540; GCN-LABEL: v_test_known_not_snan_fmin3_input_fmed3_r_i_i_f32:
541; GCN: ; %bb.0:
542; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
543; GCN-NEXT: v_min3_f32 v0, v0, v1, v2
Matt Arsenault687ec752018-10-22 16:27:27 +0000544; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000545; GCN-NEXT: s_setpc_b64 s[30:31]
546 %min0 = call float @llvm.minnum.f32(float %a, float %b)
547 %known.not.snan = call float @llvm.minnum.f32(float %min0, float %c)
548 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
549 %med = call float @llvm.minnum.f32(float %max, float 4.0)
550 ret float %med
551}
552
553define float @v_test_known_not_snan_cvt_ubyte0_input_fmed3_r_i_i_f32(i8 %char) #0 {
554; GCN-LABEL: v_test_known_not_snan_cvt_ubyte0_input_fmed3_r_i_i_f32:
555; GCN: ; %bb.0:
556; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
557; GCN-NEXT: v_cvt_f32_ubyte0_e32 v0, v0
558; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
559; GCN-NEXT: s_setpc_b64 s[30:31]
560 %cvt = uitofp i8 %char to float
561 %max = call float @llvm.maxnum.f32(float %cvt, float 2.0)
562 %med = call float @llvm.minnum.f32(float %max, float 4.0)
563 ret float %med
564}
565
566define float @v_test_not_known_frexp_mant_input_fmed3_r_i_i_f32(float %arg) #0 {
567; GCN-LABEL: v_test_not_known_frexp_mant_input_fmed3_r_i_i_f32:
568; GCN: ; %bb.0:
569; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
570; GCN-NEXT: v_frexp_mant_f32_e32 v0, v0
Matt Arsenaultd49ab0b2018-08-06 21:58:11 +0000571; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000572; GCN-NEXT: s_setpc_b64 s[30:31]
573 %known.not.snan = call float @llvm.amdgcn.frexp.mant.f32(float %arg)
574 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
575 %med = call float @llvm.minnum.f32(float %max, float 4.0)
576 ret float %med
577}
578
579define float @v_test_known_not_frexp_mant_input_fmed3_r_i_i_f32(float %arg) #0 {
580; GCN-LABEL: v_test_known_not_frexp_mant_input_fmed3_r_i_i_f32:
581; GCN: ; %bb.0:
582; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
583; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0
584; GCN-NEXT: v_frexp_mant_f32_e32 v0, v0
585; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
586; GCN-NEXT: s_setpc_b64 s[30:31]
587 %add = fadd float %arg, 1.0
588 %known.not.snan = call float @llvm.amdgcn.frexp.mant.f32(float %add)
589 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
590 %med = call float @llvm.minnum.f32(float %max, float 4.0)
591 ret float %med
592}
593
Matt Arsenaultd49ab0b2018-08-06 21:58:11 +0000594define float @v_test_known_not_snan_rcp_input_fmed3_r_i_i_f32(float %a) #0 {
595; GCN-LABEL: v_test_known_not_snan_rcp_input_fmed3_r_i_i_f32:
596; GCN: ; %bb.0:
597; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
598; GCN-NEXT: v_rcp_f32_e32 v0, v0
599; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
600; GCN-NEXT: s_setpc_b64 s[30:31]
601 %known.not.snan = call float @llvm.amdgcn.rcp.f32(float %a)
602 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
603 %med = call float @llvm.minnum.f32(float %max, float 4.0)
604 ret float %med
605}
606define float @v_test_known_not_snan_rsq_input_fmed3_r_i_i_f32(float %a) #0 {
607; GCN-LABEL: v_test_known_not_snan_rsq_input_fmed3_r_i_i_f32:
608; GCN: ; %bb.0:
609; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
610; GCN-NEXT: v_rsq_f32_e32 v0, v0
611; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
612; GCN-NEXT: s_setpc_b64 s[30:31]
613 %known.not.snan = call float @llvm.amdgcn.rsq.f32(float %a)
614 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
615 %med = call float @llvm.minnum.f32(float %max, float 4.0)
616 ret float %med
617}
618
619define float @v_test_known_not_snan_fract_input_fmed3_r_i_i_f32(float %a) #0 {
620; GCN-LABEL: v_test_known_not_snan_fract_input_fmed3_r_i_i_f32:
621; GCN: ; %bb.0:
622; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
623; GCN-NEXT: v_fract_f32_e32 v0, v0
624; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
625; GCN-NEXT: s_setpc_b64 s[30:31]
626 %known.not.snan = call float @llvm.amdgcn.fract.f32(float %a)
627 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
628 %med = call float @llvm.minnum.f32(float %max, float 4.0)
629 ret float %med
630}
631
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000632define float @v_test_known_not_snan_cubeid_input_fmed3_r_i_i_f32(float %a, float %b, float %c) #0 {
633; GCN-LABEL: v_test_known_not_snan_cubeid_input_fmed3_r_i_i_f32:
634; GCN: ; %bb.0:
635; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
636; GCN-NEXT: v_cubeid_f32 v0, v0, v1, v2
637; GCN-NEXT: v_med3_f32 v0, v0, 2.0, 4.0
638; GCN-NEXT: s_setpc_b64 s[30:31]
639 %known.not.snan = call float @llvm.amdgcn.cubeid(float %a, float %b, float %c)
640 %max = call float @llvm.maxnum.f32(float %known.not.snan, float 2.0)
641 %med = call float @llvm.minnum.f32(float %max, float 4.0)
642 ret float %med
643}
644
645declare float @llvm.fabs.f32(float) #1
646declare float @llvm.sin.f32(float) #1
647declare float @llvm.cos.f32(float) #1
648declare float @llvm.exp2.f32(float) #1
649declare float @llvm.trunc.f32(float) #1
650declare float @llvm.floor.f32(float) #1
651declare float @llvm.ceil.f32(float) #1
652declare float @llvm.round.f32(float) #1
653declare float @llvm.rint.f32(float) #1
654declare float @llvm.nearbyint.f32(float) #1
655declare float @llvm.canonicalize.f32(float) #1
656declare float @llvm.minnum.f32(float, float) #1
657declare float @llvm.maxnum.f32(float, float) #1
658declare float @llvm.copysign.f32(float, float) #1
659declare float @llvm.fma.f32(float, float, float) #1
660declare float @llvm.fmuladd.f32(float, float, float) #1
661declare float @llvm.amdgcn.ldexp.f32(float, i32) #1
662declare float @llvm.amdgcn.fmul.legacy(float, float) #1
663declare float @llvm.amdgcn.fmed3.f32(float, float, float) #1
664declare float @llvm.amdgcn.frexp.mant.f32(float) #1
Matt Arsenaultd49ab0b2018-08-06 21:58:11 +0000665declare float @llvm.amdgcn.rcp.f32(float) #1
666declare float @llvm.amdgcn.rsq.f32(float) #1
667declare float @llvm.amdgcn.fract.f32(float) #1
Matt Arsenaultc3dc8e62018-08-03 18:27:52 +0000668declare float @llvm.amdgcn.cubeid(float, float, float) #0
669
670attributes #0 = { nounwind }
671attributes #1 = { nounwind readnone speculatable }