| Sjoerd Meijer | ecc7dcb | 2018-11-30 08:14:28 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=thumbv8 %s -o - | FileCheck %s --check-prefixes=CHECK,T2 |
| 2 | ; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefixes=CHECK,T2 |
| 3 | ; RUN: llc -mtriple=thumbv8m.base %s -o - | FileCheck %s --check-prefixes=CHECK,T1 |
| 4 | ; RUN: llc -mtriple=thumbv7em %s -o - | FileCheck %s --check-prefixes=CHECK,T2 |
| 5 | ; RUN: llc -mtriple=thumbv6m %s -o - | FileCheck %s --check-prefixes=V6M |
| 6 | |
| 7 | ; Armv6m targets don't have a sdiv instruction, so sdiv should not appear at |
| 8 | ; all in the output: |
| 9 | |
| 10 | ; V6M: .file {{.*}} |
| 11 | ; V6M-NOT: sdiv |
| 12 | ; V6M-NOT: idiv |
| 13 | |
| 14 | ; Test sdiv i16 |
| 15 | define dso_local signext i16 @f0(i16 signext %F) local_unnamed_addr #0 { |
| 16 | ; CHECK-LABEL: f0 |
| 17 | ; CHECK: movs r1, #2 |
| 18 | ; CHECK-NEXT: sdiv r0, r0, r1 |
| 19 | ; CHECK-NEXT: sxth r0, r0 |
| 20 | ; CHECK-NEXT: bx lr |
| 21 | |
| 22 | entry: |
| 23 | %0 = sdiv i16 %F, 2 |
| 24 | ret i16 %0 |
| 25 | } |
| 26 | |
| 27 | ; Same as above, but now with i32 |
| 28 | define dso_local i32 @f1(i32 %F) local_unnamed_addr #0 { |
| 29 | ; CHECK-LABEL: f1 |
| 30 | ; CHECK: movs r1, #4 |
| 31 | ; CHECK-NEXT: sdiv r0, r0, r1 |
| 32 | ; CHECK-NEXT: bx lr |
| 33 | |
| 34 | entry: |
| 35 | %div = sdiv i32 %F, 4 |
| 36 | ret i32 %div |
| 37 | } |
| 38 | |
| 39 | ; The immediate is not a power of 2, so we expect a sdiv. |
| 40 | define dso_local i32 @f2(i32 %F) local_unnamed_addr #0 { |
| 41 | ; CHECK-LABEL: f2 |
| 42 | ; CHECK: movs r1, #5 |
| 43 | ; CHECK-NEXT: sdiv r0, r0, r1 |
| 44 | ; CHECK-NEXT: bx lr |
| 45 | |
| 46 | entry: |
| 47 | %div = sdiv i32 %F, 5 |
| 48 | ret i32 %div |
| 49 | } |
| 50 | |
| 51 | ; Try a larger power of 2 immediate: immediates larger than |
| 52 | ; 128 don't give any code size savings. |
| 53 | define dso_local i32 @f3(i32 %F) local_unnamed_addr #0 { |
| 54 | ; CHECK-LABEL: f3 |
| 55 | ; CHECK-NOT: sdiv |
| 56 | entry: |
| 57 | %div = sdiv i32 %F, 256 |
| 58 | ret i32 %div |
| 59 | } |
| 60 | |
| 61 | attributes #0 = { minsize norecurse nounwind optsize readnone } |
| 62 | |
| 63 | |
| 64 | ; These functions don't have the minsize attribute set, so should not lower |
| 65 | ; the sdiv to sdiv, but to the faster instruction sequence. |
| 66 | |
| 67 | define dso_local signext i16 @f4(i16 signext %F) { |
| 68 | ; T2-LABEL: f4 |
| 69 | ; T2: uxth r1, r0 |
| 70 | ; T2-NEXT: add.w r0, r0, r1, lsr #15 |
| 71 | ; T2-NEXT: sxth r0, r0 |
| 72 | ; T2-NEXT: asrs r0, r0, #1 |
| 73 | ; T2-NEXT: bx lr |
| 74 | |
| 75 | ; T1-LABEL: f4 |
| 76 | ; T1: uxth r1, r0 |
| 77 | ; T1-NEXT: lsrs r1, r1, #15 |
| 78 | ; T1-NEXT: adds r0, r0, r1 |
| 79 | ; T1-NEXT: sxth r0, r0 |
| 80 | ; T1-NEXT: asrs r0, r0, #1 |
| 81 | ; T1-NEXT: bx lr |
| 82 | |
| 83 | entry: |
| 84 | %0 = sdiv i16 %F, 2 |
| 85 | ret i16 %0 |
| 86 | } |
| 87 | |
| 88 | define dso_local i32 @f5(i32 %F) { |
| 89 | ; T2-LABEL: f5 |
| 90 | ; T2: asrs r1, r0, #31 |
| 91 | ; T2-NEXT: add.w r0, r0, r1, lsr #30 |
| 92 | ; T2-NEXT: asrs r0, r0, #2 |
| 93 | ; T2-NEXT: bx lr |
| 94 | |
| 95 | ; T1-LABEL: f5 |
| 96 | ; T1: asrs r1, r0, #31 |
| 97 | ; T1-NEXT: lsrs r1, r1, #30 |
| 98 | ; T1-NEXT: adds r0, r0, r1 |
| 99 | ; T1-NEXT: asrs r0, r0, #2 |
| 100 | ; T1-NEXT: bx lr |
| 101 | |
| 102 | entry: |
| 103 | %div = sdiv i32 %F, 4 |
| 104 | ret i32 %div |
| 105 | } |