| Krzysztof Parzyszek | 046090d | 2018-03-12 14:01:28 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon < %s | FileCheck %s |
| 2 | |
| 3 | ; Test that when we order instructions in a packet we check for |
| 4 | ; order dependences so that the source of an order dependence |
| 5 | ; appears before the destination. |
| 6 | |
| 7 | ; CHECK: loop0(.LBB0_[[LOOP:.]], |
| 8 | ; CHECK: .LBB0_[[LOOP]]: |
| 9 | ; CHECK: = memw |
| 10 | ; CHECK: = memw |
| 11 | ; CHECK: memw({{.*}}) = |
| 12 | ; CHECK: = memw |
| 13 | ; CHECK: = memw |
| 14 | ; CHECK: endloop0 |
| 15 | |
| 16 | @g0 = external hidden unnamed_addr constant [19 x i8], align 1 |
| 17 | |
| 18 | ; Function Attrs: nounwind optsize |
| 19 | declare i32 @f0(i8* nocapture readonly, ...) #0 |
| 20 | |
| 21 | ; Function Attrs: nounwind optsize |
| 22 | declare void @f1(i32*, i32*, i32* nocapture readnone) #0 |
| 23 | |
| 24 | ; Function Attrs: argmemonly nounwind |
| 25 | declare i8* @llvm.hexagon.circ.stw(i8*, i32, i32, i32) #1 |
| 26 | |
| 27 | ; Function Attrs: nounwind optsize |
| 28 | define void @f2(i32* %a0, i32* %a1, i32* %a2) #0 { |
| 29 | b0: |
| 30 | %v0 = alloca i32, align 4 |
| 31 | call void @f1(i32* %a2, i32* %a0, i32* %v0) #2 |
| 32 | %v1 = bitcast i32* %a1 to i8* |
| 33 | br label %b1 |
| 34 | |
| 35 | b1: ; preds = %b1, %b0 |
| 36 | %v2 = phi i32 [ 0, %b0 ], [ %v13, %b1 ] |
| 37 | %v3 = phi i32* [ %a2, %b0 ], [ %v16, %b1 ] |
| 38 | %v4 = phi i32 [ 0, %b0 ], [ %v14, %b1 ] |
| 39 | %v5 = load i32, i32* %a1, align 4, !tbaa !0 |
| 40 | %v6 = add nsw i32 %v2, %v5 |
| 41 | %v7 = load i32, i32* %v3, align 4, !tbaa !0 |
| 42 | %v8 = tail call i8* @llvm.hexagon.circ.stw(i8* %v1, i32 %v7, i32 150995968, i32 4) #3 |
| 43 | %v9 = bitcast i8* %v8 to i32* |
| 44 | %v10 = load i32, i32* %v3, align 4, !tbaa !0 |
| 45 | %v11 = add nsw i32 %v6, %v10 |
| 46 | %v12 = load i32, i32* %v9, align 4, !tbaa !0 |
| 47 | %v13 = add nsw i32 %v11, %v12 |
| 48 | %v14 = add nsw i32 %v4, 1 |
| 49 | %v15 = icmp eq i32 %v14, 2 |
| 50 | %v16 = getelementptr i32, i32* %v3, i32 1 |
| 51 | br i1 %v15, label %b2, label %b1 |
| 52 | |
| 53 | b2: ; preds = %b1 |
| 54 | %v17 = tail call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @g0, i32 0, i32 0), i32 %v13) #4 |
| 55 | ret void |
| 56 | } |
| 57 | |
| 58 | attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" } |
| 59 | attributes #1 = { argmemonly nounwind } |
| 60 | attributes #2 = { optsize } |
| 61 | attributes #3 = { nounwind } |
| 62 | attributes #4 = { nounwind optsize } |
| 63 | |
| 64 | !0 = !{!1, !1, i64 0} |
| 65 | !1 = !{!"int", !2, i64 0} |
| 66 | !2 = !{!"omnipotent char", !3, i64 0} |
| 67 | !3 = !{!"Simple C/C++ TBAA"} |