blob: c0812977e3a11b2fe6fae7b9581ff4ff2deb15a2 [file] [log] [blame]
Aleksandar Beserminji6c5dfcb2019-01-28 14:59:30 +00001; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32
2; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+abs2008,+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32FP64
3; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+abs2008,+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MM
4; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+abs2008,+micromips,+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MMFP64
5; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MMR6
Stefan Maksimovic98749e02018-01-23 10:09:39 +00006
7define float @abs_s(float %a) {
Aleksandar Beserminji6c5dfcb2019-01-28 14:59:30 +00008; MIPS32: {{(ori|ins)}}
9; MIPS32-NOT: abs.s
Stefan Maksimovic98749e02018-01-23 10:09:39 +000010; MIPS32FP64: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S
11; MM: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM
12; MMFP64: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM
13; MMR6: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM
14 %ret = call float @llvm.fabs.f32(float %a)
15 ret float %ret
16}
17
18define double @abs_d(double %a) {
Aleksandar Beserminji6c5dfcb2019-01-28 14:59:30 +000019; MIPS32: {{(ori|ins|dsll)}}
20; MIPS32-NOT: abs.d
Stefan Maksimovic98749e02018-01-23 10:09:39 +000021; MIPS32FP64: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64
22; MM: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D32_MM
23; MMFP64: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64_MM
24; MMR6: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64_MM
25 %ret = call double @llvm.fabs.f64(double %a)
26 ret double %ret
27}
28
29declare float @llvm.fabs.f32(float %a)
30declare double @llvm.fabs.f64(double %a)