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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / llvm / test / CodeGen / SystemZ / int-ssub-06.ll
blob: 5783c2bc838aec8efb5b6b54bfb872dae0ac49f3 [file] [log] [blame]
Ulrich Weigandc3ec80f2018-04-30 17:54:28 +0000[diff] [blame]1; Test 32-bit subtraction in which the second operand is constant.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
5
6declare i32 @foo()
7
8; Check subtractions of 1.
9define zeroext i1 @f1(i32 %dummy, i32 %a, i32 *%res) {
10; CHECK-LABEL: f1:
11; CHECK: ahi %r3, -1
12; CHECK-DAG: st %r3, 0(%r4)
13; CHECK-DAG: ipm [[REG:%r[0-5]]]
14; CHECK-DAG: afi [[REG]], 1342177280
15; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
16; CHECK: br %r14
17 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)
18 %val = extractvalue {i32, i1} %t, 0
19 %obit = extractvalue {i32, i1} %t, 1
20 store i32 %val, i32 *%res
21 ret i1 %obit
22}
23
24; Check the high end of the AHI range.
25define zeroext i1 @f2(i32 %dummy, i32 %a, i32 *%res) {
26; CHECK-LABEL: f2:
27; CHECK: ahi %r3, -32768
28; CHECK-DAG: st %r3, 0(%r4)
29; CHECK-DAG: ipm [[REG:%r[0-5]]]
30; CHECK-DAG: afi [[REG]], 1342177280
31; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
32; CHECK: br %r14
33 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 32768)
34 %val = extractvalue {i32, i1} %t, 0
35 %obit = extractvalue {i32, i1} %t, 1
36 store i32 %val, i32 *%res
37 ret i1 %obit
38}
39
40; Check the next value up, which must use AFI instead.
41define zeroext i1 @f3(i32 %dummy, i32 %a, i32 *%res) {
42; CHECK-LABEL: f3:
43; CHECK: afi %r3, -32769
44; CHECK-DAG: st %r3, 0(%r4)
45; CHECK-DAG: ipm [[REG:%r[0-5]]]
46; CHECK-DAG: afi [[REG]], 1342177280
47; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
48; CHECK: br %r14
49 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 32769)
50 %val = extractvalue {i32, i1} %t, 0
51 %obit = extractvalue {i32, i1} %t, 1
52 store i32 %val, i32 *%res
53 ret i1 %obit
54}
55
56; Check the high end of the signed 32-bit range.
57define zeroext i1 @f4(i32 %dummy, i32 %a, i32 *%res) {
58; CHECK-LABEL: f4:
59; CHECK: afi %r3, -2147483647
60; CHECK-DAG: st %r3, 0(%r4)
61; CHECK-DAG: ipm [[REG:%r[0-5]]]
62; CHECK-DAG: afi [[REG]], 1342177280
63; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
64; CHECK: br %r14
65 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483647)
66 %val = extractvalue {i32, i1} %t, 0
67 %obit = extractvalue {i32, i1} %t, 1
68 store i32 %val, i32 *%res
69 ret i1 %obit
70}
71
72; Check the next value up, which is treated as a negative value
73; and must use a register.
74define zeroext i1 @f5(i32 %dummy, i32 %a, i32 *%res) {
75; CHECK-LABEL: f5:
76; CHECK: llilh [[REG1:%r[0-5]]], 32768
77; CHECK: sr %r3, [[REG1]]
78; CHECK-DAG: st %r3, 0(%r4)
79; CHECK-DAG: ipm [[REG:%r[0-5]]]
80; CHECK-DAG: afi [[REG]], 1342177280
81; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
82; CHECK: br %r14
83 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483648)
84 %val = extractvalue {i32, i1} %t, 0
85 %obit = extractvalue {i32, i1} %t, 1
86 store i32 %val, i32 *%res
87 ret i1 %obit
88}
89
90; Check the next value up, which is treated as a negative value,
91; and can use AFI again.
92define zeroext i1 @f6(i32 %dummy, i32 %a, i32 *%res) {
93; CHECK-LABEL: f6:
94; CHECK: afi %r3, 2147483647
95; CHECK-DAG: st %r3, 0(%r4)
96; CHECK-DAG: ipm [[REG:%r[0-5]]]
97; CHECK-DAG: afi [[REG]], 1342177280
98; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
99; CHECK: br %r14
100 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 2147483649)
101 %val = extractvalue {i32, i1} %t, 0
102 %obit = extractvalue {i32, i1} %t, 1
103 store i32 %val, i32 *%res
104 ret i1 %obit
105}
106
107; Check the high end of the negative AHI range.
108define zeroext i1 @f7(i32 %dummy, i32 %a, i32 *%res) {
109; CHECK-LABEL: f7:
110; CHECK: ahi %r3, 1
111; CHECK-DAG: st %r3, 0(%r4)
112; CHECK-DAG: ipm [[REG:%r[0-5]]]
113; CHECK-DAG: afi [[REG]], 1342177280
114; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
115; CHECK: br %r14
116 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -1)
117 %val = extractvalue {i32, i1} %t, 0
118 %obit = extractvalue {i32, i1} %t, 1
119 store i32 %val, i32 *%res
120 ret i1 %obit
121}
122
123; Check the low end of the AHI range.
124define zeroext i1 @f8(i32 %dummy, i32 %a, i32 *%res) {
125; CHECK-LABEL: f8:
126; CHECK: ahi %r3, 32767
127; CHECK-DAG: st %r3, 0(%r4)
128; CHECK-DAG: ipm [[REG:%r[0-5]]]
129; CHECK-DAG: afi [[REG]], 1342177280
130; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
131; CHECK: br %r14
132 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -32767)
133 %val = extractvalue {i32, i1} %t, 0
134 %obit = extractvalue {i32, i1} %t, 1
135 store i32 %val, i32 *%res
136 ret i1 %obit
137}
138
139; Check the next value down, which must use AFI instead.
140define zeroext i1 @f9(i32 %dummy, i32 %a, i32 *%res) {
141; CHECK-LABEL: f9:
142; CHECK: afi %r3, 32768
143; CHECK-DAG: st %r3, 0(%r4)
144; CHECK-DAG: ipm [[REG:%r[0-5]]]
145; CHECK-DAG: afi [[REG]], 1342177280
146; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
147; CHECK: br %r14
148 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -32768)
149 %val = extractvalue {i32, i1} %t, 0
150 %obit = extractvalue {i32, i1} %t, 1
151 store i32 %val, i32 *%res
152 ret i1 %obit
153}
154
155; Check the low end of the signed 32-bit range.
156define zeroext i1 @f10(i32 %dummy, i32 %a, i32 *%res) {
157; CHECK-LABEL: f10:
158; CHECK: afi %r3, 2147483647
159; CHECK-DAG: st %r3, 0(%r4)
160; CHECK-DAG: ipm [[REG:%r[0-5]]]
161; CHECK-DAG: afi [[REG]], 1342177280
162; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
163; CHECK: br %r14
164 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483647)
165 %val = extractvalue {i32, i1} %t, 0
166 %obit = extractvalue {i32, i1} %t, 1
167 store i32 %val, i32 *%res
168 ret i1 %obit
169}
170
171; Check the next value down, which must use a register.
172define zeroext i1 @f11(i32 %dummy, i32 %a, i32 *%res) {
173; CHECK-LABEL: f11:
174; CHECK: llilh [[REG1:%r[0-5]]], 32768
175; CHECK: sr %r3, [[REG1]]
176; CHECK-DAG: st %r3, 0(%r4)
177; CHECK-DAG: ipm [[REG:%r[0-5]]]
178; CHECK-DAG: afi [[REG]], 1342177280
179; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
180; CHECK: br %r14
181 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483648)
182 %val = extractvalue {i32, i1} %t, 0
183 %obit = extractvalue {i32, i1} %t, 1
184 store i32 %val, i32 *%res
185 ret i1 %obit
186}
187
188; Check the next value down, which is treated as a positive value.
189define zeroext i1 @f12(i32 %dummy, i32 %a, i32 *%res) {
190; CHECK-LABEL: f12:
191; CHECK: afi %r3, -2147483647
192; CHECK-DAG: st %r3, 0(%r4)
193; CHECK-DAG: ipm [[REG:%r[0-5]]]
194; CHECK-DAG: afi [[REG]], 1342177280
195; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 33
196; CHECK: br %r14
197 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 -2147483649)
198 %val = extractvalue {i32, i1} %t, 0
199 %obit = extractvalue {i32, i1} %t, 1
200 store i32 %val, i32 *%res
201 ret i1 %obit
202}
203
204; Check using the overflow result for a branch.
205define void @f13(i32 %dummy, i32 %a, i32 *%res) {
206; CHECK-LABEL: f13:
207; CHECK: ahi %r3, -1
208; CHECK: st %r3, 0(%r4)
209; CHECK: {{jgo foo@PLT|bnor %r14}}
210; CHECK: {{br %r14|jg foo@PLT}}
211 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)
212 %val = extractvalue {i32, i1} %t, 0
213 %obit = extractvalue {i32, i1} %t, 1
214 store i32 %val, i32 *%res
215 br i1 %obit, label %call, label %exit
216
217call:
218 tail call i32 @foo()
219 br label %exit
220
221exit:
222 ret void
223}
224
225; ... and the same with the inverted direction.
226define void @f14(i32 %dummy, i32 %a, i32 *%res) {
227; CHECK-LABEL: f14:
228; CHECK: ahi %r3, -1
229; CHECK: st %r3, 0(%r4)
230; CHECK: {{jgno foo@PLT|bor %r14}}
231; CHECK: {{br %r14|jg foo@PLT}}
232 %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 1)
233 %val = extractvalue {i32, i1} %t, 0
234 %obit = extractvalue {i32, i1} %t, 1
235 store i32 %val, i32 *%res
236 br i1 %obit, label %exit, label %call
237
238call:
239 tail call i32 @foo()
240 br label %exit
241
242exit:
243 ret void
244}
245
246
247declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
248