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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / llvm / test / CodeGen / X86 / buildvec-extract.ll
blob: d1546677a69b2adc67e5db4c554ca219c62165e8 [file] [log] [blame]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=ANY,SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ANY,SSE,SSE41
4; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=ANY,AVX
5
6define <2 x i64> @extract0_i32_zext_insert0_i64_undef(<4 x i32> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]7; SSE2-LABEL: extract0_i32_zext_insert0_i64_undef:
8; SSE2: # %bb.0:
9; SSE2-NEXT: xorps %xmm1, %xmm1
10; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
11; SSE2-NEXT: retq
12;
13; SSE41-LABEL: extract0_i32_zext_insert0_i64_undef:
14; SSE41: # %bb.0:
15; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
16; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]17;
18; AVX-LABEL: extract0_i32_zext_insert0_i64_undef:
19; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]20; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]21; AVX-NEXT: retq
22 %e = extractelement <4 x i32> %x, i32 0
23 %z = zext i32 %e to i64
24 %r = insertelement <2 x i64> undef, i64 %z, i32 0
25 ret <2 x i64> %r
26}
27
28define <2 x i64> @extract0_i32_zext_insert0_i64_zero(<4 x i32> %x) {
29; SSE-LABEL: extract0_i32_zext_insert0_i64_zero:
30; SSE: # %bb.0:
31; SSE-NEXT: movd %xmm0, %eax
32; SSE-NEXT: movq %rax, %xmm0
33; SSE-NEXT: retq
34;
35; AVX-LABEL: extract0_i32_zext_insert0_i64_zero:
36; AVX: # %bb.0:
37; AVX-NEXT: vmovd %xmm0, %eax
38; AVX-NEXT: vmovq %rax, %xmm0
39; AVX-NEXT: retq
40 %e = extractelement <4 x i32> %x, i32 0
41 %z = zext i32 %e to i64
42 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
43 ret <2 x i64> %r
44}
45
46define <2 x i64> @extract1_i32_zext_insert0_i64_undef(<4 x i32> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]47; SSE-LABEL: extract1_i32_zext_insert0_i64_undef:
48; SSE: # %bb.0:
49; SSE-NEXT: psrlq $32, %xmm0
50; SSE-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]51;
52; AVX-LABEL: extract1_i32_zext_insert0_i64_undef:
53; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]54; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]55; AVX-NEXT: retq
56 %e = extractelement <4 x i32> %x, i32 1
57 %z = zext i32 %e to i64
58 %r = insertelement <2 x i64> undef, i64 %z, i32 0
59 ret <2 x i64> %r
60}
61
62define <2 x i64> @extract1_i32_zext_insert0_i64_zero(<4 x i32> %x) {
63; SSE2-LABEL: extract1_i32_zext_insert0_i64_zero:
64; SSE2: # %bb.0:
65; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
66; SSE2-NEXT: movd %xmm0, %eax
67; SSE2-NEXT: movq %rax, %xmm0
68; SSE2-NEXT: retq
69;
70; SSE41-LABEL: extract1_i32_zext_insert0_i64_zero:
71; SSE41: # %bb.0:
72; SSE41-NEXT: extractps $1, %xmm0, %eax
73; SSE41-NEXT: movq %rax, %xmm0
74; SSE41-NEXT: retq
75;
76; AVX-LABEL: extract1_i32_zext_insert0_i64_zero:
77; AVX: # %bb.0:
78; AVX-NEXT: vextractps $1, %xmm0, %eax
79; AVX-NEXT: vmovq %rax, %xmm0
80; AVX-NEXT: retq
81 %e = extractelement <4 x i32> %x, i32 1
82 %z = zext i32 %e to i64
83 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
84 ret <2 x i64> %r
85}
86
87define <2 x i64> @extract2_i32_zext_insert0_i64_undef(<4 x i32> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]88; SSE-LABEL: extract2_i32_zext_insert0_i64_undef:
89; SSE: # %bb.0:
90; SSE-NEXT: xorps %xmm1, %xmm1
91; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
92; SSE-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]93;
94; AVX-LABEL: extract2_i32_zext_insert0_i64_undef:
95; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]96; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
97; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]98; AVX-NEXT: retq
99 %e = extractelement <4 x i32> %x, i32 2
100 %z = zext i32 %e to i64
101 %r = insertelement <2 x i64> undef, i64 %z, i32 0
102 ret <2 x i64> %r
103}
104
105define <2 x i64> @extract2_i32_zext_insert0_i64_zero(<4 x i32> %x) {
106; SSE2-LABEL: extract2_i32_zext_insert0_i64_zero:
107; SSE2: # %bb.0:
108; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
109; SSE2-NEXT: movd %xmm0, %eax
110; SSE2-NEXT: movq %rax, %xmm0
111; SSE2-NEXT: retq
112;
113; SSE41-LABEL: extract2_i32_zext_insert0_i64_zero:
114; SSE41: # %bb.0:
115; SSE41-NEXT: extractps $2, %xmm0, %eax
116; SSE41-NEXT: movq %rax, %xmm0
117; SSE41-NEXT: retq
118;
119; AVX-LABEL: extract2_i32_zext_insert0_i64_zero:
120; AVX: # %bb.0:
121; AVX-NEXT: vextractps $2, %xmm0, %eax
122; AVX-NEXT: vmovq %rax, %xmm0
123; AVX-NEXT: retq
124 %e = extractelement <4 x i32> %x, i32 2
125 %z = zext i32 %e to i64
126 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
127 ret <2 x i64> %r
128}
129
130define <2 x i64> @extract3_i32_zext_insert0_i64_undef(<4 x i32> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]131; SSE-LABEL: extract3_i32_zext_insert0_i64_undef:
132; SSE: # %bb.0:
133; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
134; SSE-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]135;
136; AVX-LABEL: extract3_i32_zext_insert0_i64_undef:
137; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]138; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]139; AVX-NEXT: retq
140 %e = extractelement <4 x i32> %x, i32 3
141 %z = zext i32 %e to i64
142 %r = insertelement <2 x i64> undef, i64 %z, i32 0
143 ret <2 x i64> %r
144}
145
146define <2 x i64> @extract3_i32_zext_insert0_i64_zero(<4 x i32> %x) {
147; SSE2-LABEL: extract3_i32_zext_insert0_i64_zero:
148; SSE2: # %bb.0:
149; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
150; SSE2-NEXT: movd %xmm0, %eax
151; SSE2-NEXT: movq %rax, %xmm0
152; SSE2-NEXT: retq
153;
154; SSE41-LABEL: extract3_i32_zext_insert0_i64_zero:
155; SSE41: # %bb.0:
156; SSE41-NEXT: extractps $3, %xmm0, %eax
157; SSE41-NEXT: movq %rax, %xmm0
158; SSE41-NEXT: retq
159;
160; AVX-LABEL: extract3_i32_zext_insert0_i64_zero:
161; AVX: # %bb.0:
162; AVX-NEXT: vextractps $3, %xmm0, %eax
163; AVX-NEXT: vmovq %rax, %xmm0
164; AVX-NEXT: retq
165 %e = extractelement <4 x i32> %x, i32 3
166 %z = zext i32 %e to i64
167 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
168 ret <2 x i64> %r
169}
170
171define <2 x i64> @extract0_i32_zext_insert1_i64_undef(<4 x i32> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]172; SSE2-LABEL: extract0_i32_zext_insert1_i64_undef:
173; SSE2: # %bb.0:
174; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
175; SSE2-NEXT: pxor %xmm1, %xmm1
176; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
177; SSE2-NEXT: retq
178;
179; SSE41-LABEL: extract0_i32_zext_insert1_i64_undef:
180; SSE41: # %bb.0:
181; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
182; SSE41-NEXT: pxor %xmm0, %xmm0
183; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
184; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]185;
186; AVX-LABEL: extract0_i32_zext_insert1_i64_undef:
187; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]188; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
189; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
190; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]191; AVX-NEXT: retq
192 %e = extractelement <4 x i32> %x, i32 0
193 %z = zext i32 %e to i64
194 %r = insertelement <2 x i64> undef, i64 %z, i32 1
195 ret <2 x i64> %r
196}
197
198define <2 x i64> @extract0_i32_zext_insert1_i64_zero(<4 x i32> %x) {
199; SSE-LABEL: extract0_i32_zext_insert1_i64_zero:
200; SSE: # %bb.0:
201; SSE-NEXT: movd %xmm0, %eax
202; SSE-NEXT: movq %rax, %xmm0
203; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
204; SSE-NEXT: retq
205;
206; AVX-LABEL: extract0_i32_zext_insert1_i64_zero:
207; AVX: # %bb.0:
208; AVX-NEXT: vmovd %xmm0, %eax
209; AVX-NEXT: vmovq %rax, %xmm0
210; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
211; AVX-NEXT: retq
212 %e = extractelement <4 x i32> %x, i32 0
213 %z = zext i32 %e to i64
214 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
215 ret <2 x i64> %r
216}
217
218define <2 x i64> @extract1_i32_zext_insert1_i64_undef(<4 x i32> %x) {
219; SSE2-LABEL: extract1_i32_zext_insert1_i64_undef:
220; SSE2: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]221; SSE2-NEXT: xorps %xmm1, %xmm1
222; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]223; SSE2-NEXT: retq
224;
225; SSE41-LABEL: extract1_i32_zext_insert1_i64_undef:
226; SSE41: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]227; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]228; SSE41-NEXT: retq
229;
230; AVX-LABEL: extract1_i32_zext_insert1_i64_undef:
231; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]232; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]233; AVX-NEXT: retq
234 %e = extractelement <4 x i32> %x, i32 1
235 %z = zext i32 %e to i64
236 %r = insertelement <2 x i64> undef, i64 %z, i32 1
237 ret <2 x i64> %r
238}
239
240define <2 x i64> @extract1_i32_zext_insert1_i64_zero(<4 x i32> %x) {
241; SSE2-LABEL: extract1_i32_zext_insert1_i64_zero:
242; SSE2: # %bb.0:
243; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
244; SSE2-NEXT: movd %xmm0, %eax
245; SSE2-NEXT: movq %rax, %xmm0
246; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
247; SSE2-NEXT: retq
248;
249; SSE41-LABEL: extract1_i32_zext_insert1_i64_zero:
250; SSE41: # %bb.0:
251; SSE41-NEXT: extractps $1, %xmm0, %eax
252; SSE41-NEXT: movq %rax, %xmm0
253; SSE41-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
254; SSE41-NEXT: retq
255;
256; AVX-LABEL: extract1_i32_zext_insert1_i64_zero:
257; AVX: # %bb.0:
258; AVX-NEXT: vextractps $1, %xmm0, %eax
259; AVX-NEXT: vmovq %rax, %xmm0
260; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
261; AVX-NEXT: retq
262 %e = extractelement <4 x i32> %x, i32 1
263 %z = zext i32 %e to i64
264 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
265 ret <2 x i64> %r
266}
267
268define <2 x i64> @extract2_i32_zext_insert1_i64_undef(<4 x i32> %x) {
269; SSE2-LABEL: extract2_i32_zext_insert1_i64_undef:
270; SSE2: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]271; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]272; SSE2-NEXT: retq
273;
274; SSE41-LABEL: extract2_i32_zext_insert1_i64_undef:
275; SSE41: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]276; SSE41-NEXT: xorps %xmm1, %xmm1
277; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]278; SSE41-NEXT: retq
279;
280; AVX-LABEL: extract2_i32_zext_insert1_i64_undef:
281; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]282; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
283; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]284; AVX-NEXT: retq
285 %e = extractelement <4 x i32> %x, i32 2
286 %z = zext i32 %e to i64
287 %r = insertelement <2 x i64> undef, i64 %z, i32 1
288 ret <2 x i64> %r
289}
290
291define <2 x i64> @extract2_i32_zext_insert1_i64_zero(<4 x i32> %x) {
292; SSE2-LABEL: extract2_i32_zext_insert1_i64_zero:
293; SSE2: # %bb.0:
294; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
295; SSE2-NEXT: movd %xmm0, %eax
296; SSE2-NEXT: movq %rax, %xmm0
297; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
298; SSE2-NEXT: retq
299;
300; SSE41-LABEL: extract2_i32_zext_insert1_i64_zero:
301; SSE41: # %bb.0:
302; SSE41-NEXT: extractps $2, %xmm0, %eax
303; SSE41-NEXT: movq %rax, %xmm0
304; SSE41-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
305; SSE41-NEXT: retq
306;
307; AVX-LABEL: extract2_i32_zext_insert1_i64_zero:
308; AVX: # %bb.0:
309; AVX-NEXT: vextractps $2, %xmm0, %eax
310; AVX-NEXT: vmovq %rax, %xmm0
311; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
312; AVX-NEXT: retq
313 %e = extractelement <4 x i32> %x, i32 2
314 %z = zext i32 %e to i64
315 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
316 ret <2 x i64> %r
317}
318
319define <2 x i64> @extract3_i32_zext_insert1_i64_undef(<4 x i32> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]320; SSE-LABEL: extract3_i32_zext_insert1_i64_undef:
321; SSE: # %bb.0:
322; SSE-NEXT: psrlq $32, %xmm0
323; SSE-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]324;
325; AVX-LABEL: extract3_i32_zext_insert1_i64_undef:
326; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]327; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]328; AVX-NEXT: retq
329 %e = extractelement <4 x i32> %x, i32 3
330 %z = zext i32 %e to i64
331 %r = insertelement <2 x i64> undef, i64 %z, i32 1
332 ret <2 x i64> %r
333}
334
335define <2 x i64> @extract3_i32_zext_insert1_i64_zero(<4 x i32> %x) {
336; SSE2-LABEL: extract3_i32_zext_insert1_i64_zero:
337; SSE2: # %bb.0:
338; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
339; SSE2-NEXT: movd %xmm0, %eax
340; SSE2-NEXT: movq %rax, %xmm0
341; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
342; SSE2-NEXT: retq
343;
344; SSE41-LABEL: extract3_i32_zext_insert1_i64_zero:
345; SSE41: # %bb.0:
346; SSE41-NEXT: extractps $3, %xmm0, %eax
347; SSE41-NEXT: movq %rax, %xmm0
348; SSE41-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
349; SSE41-NEXT: retq
350;
351; AVX-LABEL: extract3_i32_zext_insert1_i64_zero:
352; AVX: # %bb.0:
353; AVX-NEXT: vextractps $3, %xmm0, %eax
354; AVX-NEXT: vmovq %rax, %xmm0
355; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
356; AVX-NEXT: retq
357 %e = extractelement <4 x i32> %x, i32 3
358 %z = zext i32 %e to i64
359 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
360 ret <2 x i64> %r
361}
362
363define <2 x i64> @extract0_i16_zext_insert0_i64_undef(<8 x i16> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]364; SSE2-LABEL: extract0_i16_zext_insert0_i64_undef:
365; SSE2: # %bb.0:
366; SSE2-NEXT: pxor %xmm1, %xmm1
367; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
368; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
369; SSE2-NEXT: retq
370;
371; SSE41-LABEL: extract0_i16_zext_insert0_i64_undef:
372; SSE41: # %bb.0:
373; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
374; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]375;
376; AVX-LABEL: extract0_i16_zext_insert0_i64_undef:
377; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]378; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]379; AVX-NEXT: retq
380 %e = extractelement <8 x i16> %x, i32 0
381 %z = zext i16 %e to i64
382 %r = insertelement <2 x i64> undef, i64 %z, i32 0
383 ret <2 x i64> %r
384}
385
386define <2 x i64> @extract0_i16_zext_insert0_i64_zero(<8 x i16> %x) {
387; SSE-LABEL: extract0_i16_zext_insert0_i64_zero:
388; SSE: # %bb.0:
389; SSE-NEXT: pextrw $0, %xmm0, %eax
390; SSE-NEXT: movq %rax, %xmm0
391; SSE-NEXT: retq
392;
393; AVX-LABEL: extract0_i16_zext_insert0_i64_zero:
394; AVX: # %bb.0:
395; AVX-NEXT: vpextrw $0, %xmm0, %eax
396; AVX-NEXT: vmovq %rax, %xmm0
397; AVX-NEXT: retq
398 %e = extractelement <8 x i16> %x, i32 0
399 %z = zext i16 %e to i64
400 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
401 ret <2 x i64> %r
402}
403
404define <2 x i64> @extract1_i16_zext_insert0_i64_undef(<8 x i16> %x) {
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]405; SSE-LABEL: extract1_i16_zext_insert0_i64_undef:
406; SSE: # %bb.0:
407; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
408; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
409; SSE-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]410;
411; AVX-LABEL: extract1_i16_zext_insert0_i64_undef:
412; AVX: # %bb.0:
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]413; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
414; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]415; AVX-NEXT: retq
416 %e = extractelement <8 x i16> %x, i32 1
417 %z = zext i16 %e to i64
418 %r = insertelement <2 x i64> undef, i64 %z, i32 0
419 ret <2 x i64> %r
420}
421
422define <2 x i64> @extract1_i16_zext_insert0_i64_zero(<8 x i16> %x) {
423; SSE-LABEL: extract1_i16_zext_insert0_i64_zero:
424; SSE: # %bb.0:
425; SSE-NEXT: pextrw $1, %xmm0, %eax
426; SSE-NEXT: movq %rax, %xmm0
427; SSE-NEXT: retq
428;
429; AVX-LABEL: extract1_i16_zext_insert0_i64_zero:
430; AVX: # %bb.0:
431; AVX-NEXT: vpextrw $1, %xmm0, %eax
432; AVX-NEXT: vmovq %rax, %xmm0
433; AVX-NEXT: retq
434 %e = extractelement <8 x i16> %x, i32 1
435 %z = zext i16 %e to i64
436 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
437 ret <2 x i64> %r
438}
439
440define <2 x i64> @extract2_i16_zext_insert0_i64_undef(<8 x i16> %x) {
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]441; SSE-LABEL: extract2_i16_zext_insert0_i64_undef:
442; SSE: # %bb.0:
443; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
444; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
445; SSE-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]446;
447; AVX-LABEL: extract2_i16_zext_insert0_i64_undef:
448; AVX: # %bb.0:
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]449; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
450; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]451; AVX-NEXT: retq
452 %e = extractelement <8 x i16> %x, i32 2
453 %z = zext i16 %e to i64
454 %r = insertelement <2 x i64> undef, i64 %z, i32 0
455 ret <2 x i64> %r
456}
457
458define <2 x i64> @extract2_i16_zext_insert0_i64_zero(<8 x i16> %x) {
459; SSE-LABEL: extract2_i16_zext_insert0_i64_zero:
460; SSE: # %bb.0:
461; SSE-NEXT: pextrw $2, %xmm0, %eax
462; SSE-NEXT: movq %rax, %xmm0
463; SSE-NEXT: retq
464;
465; AVX-LABEL: extract2_i16_zext_insert0_i64_zero:
466; AVX: # %bb.0:
467; AVX-NEXT: vpextrw $2, %xmm0, %eax
468; AVX-NEXT: vmovq %rax, %xmm0
469; AVX-NEXT: retq
470 %e = extractelement <8 x i16> %x, i32 2
471 %z = zext i16 %e to i64
472 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
473 ret <2 x i64> %r
474}
475
476define <2 x i64> @extract3_i16_zext_insert0_i64_undef(<8 x i16> %x) {
477; SSE-LABEL: extract3_i16_zext_insert0_i64_undef:
478; SSE: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]479; SSE-NEXT: psrlq $48, %xmm0
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]480; SSE-NEXT: retq
481;
482; AVX-LABEL: extract3_i16_zext_insert0_i64_undef:
483; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]484; AVX-NEXT: vpsrlq $48, %xmm0, %xmm0
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]485; AVX-NEXT: retq
486 %e = extractelement <8 x i16> %x, i32 3
487 %z = zext i16 %e to i64
488 %r = insertelement <2 x i64> undef, i64 %z, i32 0
489 ret <2 x i64> %r
490}
491
492define <2 x i64> @extract3_i16_zext_insert0_i64_zero(<8 x i16> %x) {
493; SSE-LABEL: extract3_i16_zext_insert0_i64_zero:
494; SSE: # %bb.0:
495; SSE-NEXT: pextrw $3, %xmm0, %eax
496; SSE-NEXT: movq %rax, %xmm0
497; SSE-NEXT: retq
498;
499; AVX-LABEL: extract3_i16_zext_insert0_i64_zero:
500; AVX: # %bb.0:
501; AVX-NEXT: vpextrw $3, %xmm0, %eax
502; AVX-NEXT: vmovq %rax, %xmm0
503; AVX-NEXT: retq
504 %e = extractelement <8 x i16> %x, i32 3
505 %z = zext i16 %e to i64
506 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
507 ret <2 x i64> %r
508}
509
510define <2 x i64> @extract0_i16_zext_insert1_i64_undef(<8 x i16> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]511; SSE2-LABEL: extract0_i16_zext_insert1_i64_undef:
512; SSE2: # %bb.0:
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]513; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1]
514; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
515; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]516; SSE2-NEXT: retq
517;
518; SSE41-LABEL: extract0_i16_zext_insert1_i64_undef:
519; SSE41: # %bb.0:
520; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
521; SSE41-NEXT: pxor %xmm0, %xmm0
522; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4],xmm0[5,6,7]
523; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]524;
525; AVX-LABEL: extract0_i16_zext_insert1_i64_undef:
526; AVX: # %bb.0:
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]527; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]528; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
529; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]530; AVX-NEXT: retq
531 %e = extractelement <8 x i16> %x, i32 0
532 %z = zext i16 %e to i64
533 %r = insertelement <2 x i64> undef, i64 %z, i32 1
534 ret <2 x i64> %r
535}
536
537define <2 x i64> @extract0_i16_zext_insert1_i64_zero(<8 x i16> %x) {
538; SSE-LABEL: extract0_i16_zext_insert1_i64_zero:
539; SSE: # %bb.0:
540; SSE-NEXT: pextrw $0, %xmm0, %eax
541; SSE-NEXT: movq %rax, %xmm0
542; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
543; SSE-NEXT: retq
544;
545; AVX-LABEL: extract0_i16_zext_insert1_i64_zero:
546; AVX: # %bb.0:
547; AVX-NEXT: vpextrw $0, %xmm0, %eax
548; AVX-NEXT: vmovq %rax, %xmm0
549; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
550; AVX-NEXT: retq
551 %e = extractelement <8 x i16> %x, i32 0
552 %z = zext i16 %e to i64
553 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
554 ret <2 x i64> %r
555}
556
557define <2 x i64> @extract1_i16_zext_insert1_i64_undef(<8 x i16> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]558; SSE2-LABEL: extract1_i16_zext_insert1_i64_undef:
559; SSE2: # %bb.0:
560; SSE2-NEXT: pxor %xmm1, %xmm1
561; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
562; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
563; SSE2-NEXT: retq
564;
565; SSE41-LABEL: extract1_i16_zext_insert1_i64_undef:
566; SSE41: # %bb.0:
567; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
568; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]569;
570; AVX-LABEL: extract1_i16_zext_insert1_i64_undef:
571; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]572; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]573; AVX-NEXT: retq
574 %e = extractelement <8 x i16> %x, i32 1
575 %z = zext i16 %e to i64
576 %r = insertelement <2 x i64> undef, i64 %z, i32 1
577 ret <2 x i64> %r
578}
579
580define <2 x i64> @extract1_i16_zext_insert1_i64_zero(<8 x i16> %x) {
581; SSE-LABEL: extract1_i16_zext_insert1_i64_zero:
582; SSE: # %bb.0:
583; SSE-NEXT: pextrw $1, %xmm0, %eax
584; SSE-NEXT: movq %rax, %xmm0
585; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
586; SSE-NEXT: retq
587;
588; AVX-LABEL: extract1_i16_zext_insert1_i64_zero:
589; AVX: # %bb.0:
590; AVX-NEXT: vpextrw $1, %xmm0, %eax
591; AVX-NEXT: vmovq %rax, %xmm0
592; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
593; AVX-NEXT: retq
594 %e = extractelement <8 x i16> %x, i32 1
595 %z = zext i16 %e to i64
596 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
597 ret <2 x i64> %r
598}
599
600define <2 x i64> @extract2_i16_zext_insert1_i64_undef(<8 x i16> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]601; SSE2-LABEL: extract2_i16_zext_insert1_i64_undef:
602; SSE2: # %bb.0:
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]603; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
604; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
605; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]606; SSE2-NEXT: retq
607;
608; SSE41-LABEL: extract2_i16_zext_insert1_i64_undef:
609; SSE41: # %bb.0:
610; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero
611; SSE41-NEXT: pxor %xmm0, %xmm0
612; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4],xmm0[5,6,7]
613; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]614;
615; AVX-LABEL: extract2_i16_zext_insert1_i64_undef:
616; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]617; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
618; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
619; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]620; AVX-NEXT: retq
621 %e = extractelement <8 x i16> %x, i32 2
622 %z = zext i16 %e to i64
623 %r = insertelement <2 x i64> undef, i64 %z, i32 1
624 ret <2 x i64> %r
625}
626
627define <2 x i64> @extract2_i16_zext_insert1_i64_zero(<8 x i16> %x) {
628; SSE-LABEL: extract2_i16_zext_insert1_i64_zero:
629; SSE: # %bb.0:
630; SSE-NEXT: pextrw $2, %xmm0, %eax
631; SSE-NEXT: movq %rax, %xmm0
632; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
633; SSE-NEXT: retq
634;
635; AVX-LABEL: extract2_i16_zext_insert1_i64_zero:
636; AVX: # %bb.0:
637; AVX-NEXT: vpextrw $2, %xmm0, %eax
638; AVX-NEXT: vmovq %rax, %xmm0
639; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
640; AVX-NEXT: retq
641 %e = extractelement <8 x i16> %x, i32 2
642 %z = zext i16 %e to i64
643 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
644 ret <2 x i64> %r
645}
646
647define <2 x i64> @extract3_i16_zext_insert1_i64_undef(<8 x i16> %x) {
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]648; SSE2-LABEL: extract3_i16_zext_insert1_i64_undef:
649; SSE2: # %bb.0:
Simon Pilgrim85184012019-02-01 16:02:12 +0000[diff] [blame]650; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
651; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
652; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]653; SSE2-NEXT: retq
654;
655; SSE41-LABEL: extract3_i16_zext_insert1_i64_undef:
656; SSE41: # %bb.0:
657; SSE41-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
658; SSE41-NEXT: pxor %xmm1, %xmm1
659; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
660; SSE41-NEXT: retq
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]661;
662; AVX-LABEL: extract3_i16_zext_insert1_i64_undef:
663; AVX: # %bb.0:
Sanjay Patelfad5bda2019-01-15 16:11:05 +0000[diff] [blame]664; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
665; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
666; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
Sanjay Patel4e71ff22019-01-03 17:55:32 +0000[diff] [blame]667; AVX-NEXT: retq
668 %e = extractelement <8 x i16> %x, i32 3
669 %z = zext i16 %e to i64
670 %r = insertelement <2 x i64> undef, i64 %z, i32 1
671 ret <2 x i64> %r
672}
673
674define <2 x i64> @extract3_i16_zext_insert1_i64_zero(<8 x i16> %x) {
675; SSE-LABEL: extract3_i16_zext_insert1_i64_zero:
676; SSE: # %bb.0:
677; SSE-NEXT: pextrw $3, %xmm0, %eax
678; SSE-NEXT: movq %rax, %xmm0
679; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
680; SSE-NEXT: retq
681;
682; AVX-LABEL: extract3_i16_zext_insert1_i64_zero:
683; AVX: # %bb.0:
684; AVX-NEXT: vpextrw $3, %xmm0, %eax
685; AVX-NEXT: vmovq %rax, %xmm0
686; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
687; AVX-NEXT: retq
688 %e = extractelement <8 x i16> %x, i32 3
689 %z = zext i16 %e to i64
690 %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
691 ret <2 x i64> %r
692}
693