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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / llvm / test / CodeGen / X86 / pr40529.ll
blob: f4bfb7089ad0734a401dc8a977f2eb531ed269c6 [file] [log] [blame]
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Craig Topper1c7ee202019-02-06 19:50:59 +0000[diff] [blame]2; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]3
4define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {
5; CHECK-LABEL: rem_pio2l_min:
6; CHECK: # %bb.0: # %entry
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]7; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
8; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
9; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
10; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
Craig Topper1c7ee202019-02-06 19:50:59 +0000[diff] [blame]11; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]12; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
13; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
14; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
15; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
16; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
17; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]18; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
Craig Topper1c7ee202019-02-06 19:50:59 +0000[diff] [blame]19; CHECK-NEXT: flds {{.*}}(%rip)
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]20; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
21; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F
22; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
Craig Topper1c7ee202019-02-06 19:50:59 +0000[diff] [blame]23; CHECK-NEXT: fmul %st, %st(1)
Craig Topper31259c52019-02-05 04:48:23 +0000[diff] [blame]24; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
25; CHECK-NEXT: fxch %st(1)
26; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
27; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
28; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
29; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
30; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
31; CHECK-NEXT: fmulp %st, %st(1)
32; CHECK-NEXT: retq
33entry:
34 %conv = fptosi x86_fp80 %z to i32
35 %conv1 = sitofp i32 %conv to x86_fp80
36 %sub = fsub x86_fp80 %z, %conv1
37 %mul = fmul x86_fp80 %sub, 0xK40178000000000000000
38 %conv2 = fptosi x86_fp80 %mul to i32
39 %conv3 = sitofp i32 %conv2 to x86_fp80
40 %sub4 = fsub x86_fp80 %mul, %conv3
41 %mul5 = fmul x86_fp80 %sub4, 0xK40178000000000000000
42 ret x86_fp80 %mul5
43}