Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 1 | ; RUN: opt < %s -instcombine -S | FileCheck %s |
| 2 | ; ModuleID = 'test/Transforms/InstCombine/add4.ll' |
| 3 | source_filename = "test/Transforms/InstCombine/add4.ll" |
| 4 | |
| 5 | define i64 @match_unsigned(i64 %x) { |
| 6 | ; CHECK-LABEL: @match_unsigned( |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 7 | ; CHECK-NEXT: bb: |
| 8 | ; CHECK-NEXT: [[UREM:%.*]] = urem i64 [[X:%.*]], 19136 |
| 9 | ; CHECK-NEXT: ret i64 [[UREM]] |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 10 | ; |
| 11 | bb: |
| 12 | %tmp = urem i64 %x, 299 |
| 13 | %tmp1 = udiv i64 %x, 299 |
| 14 | %tmp2 = urem i64 %tmp1, 64 |
| 15 | %tmp3 = mul i64 %tmp2, 299 |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 16 | %tmp4 = add i64 %tmp, %tmp3 |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 17 | ret i64 %tmp4 |
| 18 | } |
| 19 | |
| 20 | define i64 @match_andAsRem_lshrAsDiv_shlAsMul(i64 %x) { |
| 21 | ; CHECK-LABEL: @match_andAsRem_lshrAsDiv_shlAsMul( |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 22 | ; CHECK-NEXT: bb: |
| 23 | ; CHECK-NEXT: [[UREM:%.*]] = urem i64 [[X:%.*]], 576 |
| 24 | ; CHECK-NEXT: ret i64 [[UREM]] |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 25 | ; |
| 26 | bb: |
| 27 | %tmp = and i64 %x, 63 |
| 28 | %tmp1 = lshr i64 %x, 6 |
| 29 | %tmp2 = urem i64 %tmp1, 9 |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 30 | %tmp3 = shl i64 %tmp2, 6 |
| 31 | %tmp4 = add i64 %tmp, %tmp3 |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 32 | ret i64 %tmp4 |
| 33 | } |
| 34 | |
| 35 | define i64 @match_signed(i64 %x) { |
| 36 | ; CHECK-LABEL: @match_signed( |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 37 | ; CHECK-NEXT: bb: |
| 38 | ; CHECK-NEXT: [[SREM1:%.*]] = srem i64 [[X:%.*]], 172224 |
| 39 | ; CHECK-NEXT: ret i64 [[SREM1]] |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 40 | ; |
| 41 | bb: |
| 42 | %tmp = srem i64 %x, 299 |
| 43 | %tmp1 = sdiv i64 %x, 299 |
| 44 | %tmp2 = srem i64 %tmp1, 64 |
| 45 | %tmp3 = sdiv i64 %x, 19136 |
| 46 | %tmp4 = srem i64 %tmp3, 9 |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 47 | %tmp5 = mul i64 %tmp2, 299 |
| 48 | %tmp6 = add i64 %tmp, %tmp5 |
| 49 | %tmp7 = mul i64 %tmp4, 19136 |
| 50 | %tmp8 = add i64 %tmp6, %tmp7 |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 51 | ret i64 %tmp8 |
| 52 | } |
| 53 | |
| 54 | define i64 @not_match_inconsistent_signs(i64 %x) { |
| 55 | ; CHECK-LABEL: @not_match_inconsistent_signs( |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 56 | ; CHECK: [[TMP:%.*]] = add |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 57 | ; CHECK-NEXT: ret i64 [[TMP]] |
| 58 | ; |
| 59 | bb: |
| 60 | %tmp = urem i64 %x, 299 |
| 61 | %tmp1 = sdiv i64 %x, 299 |
| 62 | %tmp2 = urem i64 %tmp1, 64 |
| 63 | %tmp3 = mul i64 %tmp2, 299 |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 64 | %tmp4 = add i64 %tmp, %tmp3 |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 65 | ret i64 %tmp4 |
| 66 | } |
| 67 | |
| 68 | define i64 @not_match_inconsistent_values(i64 %x) { |
| 69 | ; CHECK-LABEL: @not_match_inconsistent_values( |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 70 | ; CHECK: [[TMP:%.*]] = add |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 71 | ; CHECK-NEXT: ret i64 [[TMP]] |
| 72 | ; |
| 73 | bb: |
| 74 | %tmp = urem i64 %x, 299 |
| 75 | %tmp1 = udiv i64 %x, 29 |
| 76 | %tmp2 = urem i64 %tmp1, 64 |
| 77 | %tmp3 = mul i64 %tmp2, 299 |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 78 | %tmp4 = add i64 %tmp, %tmp3 |
Sanjoy Das | 0e643db | 2018-04-26 20:52:27 +0000 | [diff] [blame] | 79 | ret i64 %tmp4 |
| 80 | } |
Sanjoy Das | 6f1937b | 2018-04-26 20:52:28 +0000 | [diff] [blame] | 81 | |
| 82 | define i32 @not_match_overflow(i32 %x) { |
| 83 | ; CHECK-LABEL: @not_match_overflow( |
| 84 | ; CHECK: [[TMP:%.*]] = add |
| 85 | ; CHECK-NEXT: ret i32 [[TMP]] |
| 86 | ; |
| 87 | bb: |
| 88 | %tmp = urem i32 %x, 299 |
| 89 | %tmp1 = udiv i32 %x,299 |
| 90 | %tmp2 = urem i32 %tmp1, 147483647 |
| 91 | %tmp3 = mul i32 %tmp2, 299 |
| 92 | %tmp4 = add i32 %tmp, %tmp3 |
| 93 | ret i32 %tmp4 |
| 94 | } |