Blame - clang/lib/Headers/avx512vlintrin.h - toolchain/llvm-project

blob: 622385ae77f7c0e744bd04b9e658830c441d8986 [file] [log] [blame]

Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	1	/*===---- avx512vlintrin.h - AVX512VL intrinsics ---------------------------===
				2	*
				3	* Permission is hereby granted, free of charge, to any person obtaining a copy
				4	* of this software and associated documentation files (the "Software"), to deal
				5	* in the Software without restriction, including without limitation the rights
				6	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
				7	* copies of the Software, and to permit persons to whom the Software is
				8	* furnished to do so, subject to the following conditions:
				9	*
				10	* The above copyright notice and this permission notice shall be included in
				11	* all copies or substantial portions of the Software.
				12	*
				13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
				14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
				15	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
				16	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
				17	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
				18	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
				19	* THE SOFTWARE.
				20	*
				21	*===-----------------------------------------------------------------------===
				22	*/
				23
				24	#ifndef __IMMINTRIN_H
				25	#error "Never use <avx512vlintrin.h> directly; include <immintrin.h> instead."
				26	#endif
				27
				28	#ifndef __AVX512VLINTRIN_H
				29	#define __AVX512VLINTRIN_H
				30
Eric Christopher	4d185168	2015-06-17 07:09:20 +0000	[diff] [blame]	31	/* Define the default attributes for the functions in this file. */
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	32	#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl")))
Eric Christopher	4d185168	2015-06-17 07:09:20 +0000	[diff] [blame]	33
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	34	/* Integer compare */
				35
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	36	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	37	_mm_cmpeq_epi32_mask(__m128i __a, __m128i __b) {
				38	return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,
				39	(__mmask8)-1);
				40	}
				41
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	42	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	43	_mm_mask_cmpeq_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				44	return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,
				45	__u);
				46	}
				47
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	48	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	49	_mm_cmpeq_epu32_mask(__m128i __a, __m128i __b) {
				50	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,
				51	(__mmask8)-1);
				52	}
				53
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	54	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	55	_mm_mask_cmpeq_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				56	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,
				57	__u);
				58	}
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	59
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	60	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	61	_mm256_cmpeq_epi32_mask(__m256i __a, __m256i __b) {
				62	return (__mmask8)__builtin_ia32_pcmpeqd256_mask((__v8si)__a, (__v8si)__b,
				63	(__mmask8)-1);
				64	}
				65
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	66	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	67	_mm256_mask_cmpeq_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				68	return (__mmask8)__builtin_ia32_pcmpeqd256_mask((__v8si)__a, (__v8si)__b,
				69	__u);
				70	}
				71
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	72	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	73	_mm256_cmpeq_epu32_mask(__m256i __a, __m256i __b) {
				74	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 0,
				75	(__mmask8)-1);
				76	}
				77
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	78	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	79	_mm256_mask_cmpeq_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				80	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 0,
				81	__u);
				82	}
				83
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	84	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	85	_mm_cmpeq_epi64_mask(__m128i __a, __m128i __b) {
				86	return (__mmask8)__builtin_ia32_pcmpeqq128_mask((__v2di)__a, (__v2di)__b,
				87	(__mmask8)-1);
				88	}
				89
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	90	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	91	_mm_mask_cmpeq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				92	return (__mmask8)__builtin_ia32_pcmpeqq128_mask((__v2di)__a, (__v2di)__b,
				93	__u);
				94	}
				95
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	96	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	97	_mm_cmpeq_epu64_mask(__m128i __a, __m128i __b) {
				98	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 0,
				99	(__mmask8)-1);
				100	}
				101
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	102	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	103	_mm_mask_cmpeq_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				104	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 0,
				105	__u);
				106	}
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	107
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	108	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	109	_mm256_cmpeq_epi64_mask(__m256i __a, __m256i __b) {
				110	return (__mmask8)__builtin_ia32_pcmpeqq256_mask((__v4di)__a, (__v4di)__b,
				111	(__mmask8)-1);
				112	}
				113
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	114	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	115	_mm256_mask_cmpeq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				116	return (__mmask8)__builtin_ia32_pcmpeqq256_mask((__v4di)__a, (__v4di)__b,
				117	__u);
				118	}
				119
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	120	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	121	_mm256_cmpeq_epu64_mask(__m256i __a, __m256i __b) {
				122	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 0,
				123	(__mmask8)-1);
				124	}
				125
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	126	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	127	_mm256_mask_cmpeq_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				128	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 0,
				129	__u);
				130	}
				131
				132
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	133	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	134	_mm_cmpge_epi32_mask(__m128i __a, __m128i __b) {
				135	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,
				136	(__mmask8)-1);
				137	}
				138
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	139	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	140	_mm_mask_cmpge_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				141	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,
				142	__u);
				143	}
				144
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	145	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	146	_mm_cmpge_epu32_mask(__m128i __a, __m128i __b) {
				147	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,
				148	(__mmask8)-1);
				149	}
				150
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	151	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	152	_mm_mask_cmpge_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				153	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,
				154	__u);
				155	}
				156
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	157	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	158	_mm256_cmpge_epi32_mask(__m256i __a, __m256i __b) {
				159	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 5,
				160	(__mmask8)-1);
				161	}
				162
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	163	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	164	_mm256_mask_cmpge_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				165	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 5,
				166	__u);
				167	}
				168
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	169	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	170	_mm256_cmpge_epu32_mask(__m256i __a, __m256i __b) {
				171	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 5,
				172	(__mmask8)-1);
				173	}
				174
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	175	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	176	_mm256_mask_cmpge_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				177	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 5,
				178	__u);
				179	}
				180
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	181	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	182	_mm_cmpge_epi64_mask(__m128i __a, __m128i __b) {
				183	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 5,
				184	(__mmask8)-1);
				185	}
				186
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	187	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	188	_mm_mask_cmpge_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				189	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 5,
				190	__u);
				191	}
				192
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	193	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	194	_mm_cmpge_epu64_mask(__m128i __a, __m128i __b) {
				195	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 5,
				196	(__mmask8)-1);
				197	}
				198
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	199	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	200	_mm_mask_cmpge_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				201	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 5,
				202	__u);
				203	}
				204
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	205	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	206	_mm256_cmpge_epi64_mask(__m256i __a, __m256i __b) {
				207	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 5,
				208	(__mmask8)-1);
				209	}
				210
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	211	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	212	_mm256_mask_cmpge_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				213	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 5,
				214	__u);
				215	}
				216
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	217	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	218	_mm256_cmpge_epu64_mask(__m256i __a, __m256i __b) {
				219	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 5,
				220	(__mmask8)-1);
				221	}
				222
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	223	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	224	_mm256_mask_cmpge_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				225	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 5,
				226	__u);
				227	}
				228
				229
				230
				231
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	232	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	233	_mm_cmpgt_epi32_mask(__m128i __a, __m128i __b) {
				234	return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,
				235	(__mmask8)-1);
				236	}
				237
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	238	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	239	_mm_mask_cmpgt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				240	return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,
				241	__u);
				242	}
				243
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	244	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	245	_mm_cmpgt_epu32_mask(__m128i __a, __m128i __b) {
				246	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,
				247	(__mmask8)-1);
				248	}
				249
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	250	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	251	_mm_mask_cmpgt_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				252	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,
				253	__u);
				254	}
				255
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	256	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	257	_mm256_cmpgt_epi32_mask(__m256i __a, __m256i __b) {
				258	return (__mmask8)__builtin_ia32_pcmpgtd256_mask((__v8si)__a, (__v8si)__b,
				259	(__mmask8)-1);
				260	}
				261
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	262	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	263	_mm256_mask_cmpgt_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				264	return (__mmask8)__builtin_ia32_pcmpgtd256_mask((__v8si)__a, (__v8si)__b,
				265	__u);
				266	}
				267
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	268	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	269	_mm256_cmpgt_epu32_mask(__m256i __a, __m256i __b) {
				270	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 6,
				271	(__mmask8)-1);
				272	}
				273
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	274	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	275	_mm256_mask_cmpgt_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				276	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 6,
				277	__u);
				278	}
				279
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	280	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	281	_mm_cmpgt_epi64_mask(__m128i __a, __m128i __b) {
				282	return (__mmask8)__builtin_ia32_pcmpgtq128_mask((__v2di)__a, (__v2di)__b,
				283	(__mmask8)-1);
				284	}
				285
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	286	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	287	_mm_mask_cmpgt_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				288	return (__mmask8)__builtin_ia32_pcmpgtq128_mask((__v2di)__a, (__v2di)__b,
				289	__u);
				290	}
				291
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	292	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	293	_mm_cmpgt_epu64_mask(__m128i __a, __m128i __b) {
				294	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 6,
				295	(__mmask8)-1);
				296	}
				297
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	298	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	299	_mm_mask_cmpgt_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				300	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 6,
				301	__u);
				302	}
				303
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	304	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	305	_mm256_cmpgt_epi64_mask(__m256i __a, __m256i __b) {
				306	return (__mmask8)__builtin_ia32_pcmpgtq256_mask((__v4di)__a, (__v4di)__b,
				307	(__mmask8)-1);
				308	}
				309
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	310	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	311	_mm256_mask_cmpgt_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				312	return (__mmask8)__builtin_ia32_pcmpgtq256_mask((__v4di)__a, (__v4di)__b,
				313	__u);
				314	}
				315
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	316	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	317	_mm256_cmpgt_epu64_mask(__m256i __a, __m256i __b) {
				318	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 6,
				319	(__mmask8)-1);
				320	}
				321
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	322	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	323	_mm256_mask_cmpgt_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				324	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 6,
				325	__u);
				326	}
				327
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	328	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	329	_mm_cmple_epi32_mask(__m128i __a, __m128i __b) {
				330	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,
				331	(__mmask8)-1);
				332	}
				333
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	334	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	335	_mm_mask_cmple_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				336	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,
				337	__u);
				338	}
				339
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	340	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	341	_mm_cmple_epu32_mask(__m128i __a, __m128i __b) {
				342	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,
				343	(__mmask8)-1);
				344	}
				345
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	346	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	347	_mm_mask_cmple_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				348	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,
				349	__u);
				350	}
				351
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	352	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	353	_mm256_cmple_epi32_mask(__m256i __a, __m256i __b) {
				354	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 2,
				355	(__mmask8)-1);
				356	}
				357
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	358	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	359	_mm256_mask_cmple_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				360	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 2,
				361	__u);
				362	}
				363
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	364	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	365	_mm256_cmple_epu32_mask(__m256i __a, __m256i __b) {
				366	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 2,
				367	(__mmask8)-1);
				368	}
				369
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	370	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	371	_mm256_mask_cmple_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				372	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 2,
				373	__u);
				374	}
				375
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	376	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	377	_mm_cmple_epi64_mask(__m128i __a, __m128i __b) {
				378	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 2,
				379	(__mmask8)-1);
				380	}
				381
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	382	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	383	_mm_mask_cmple_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				384	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 2,
				385	__u);
				386	}
				387
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	388	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	389	_mm_cmple_epu64_mask(__m128i __a, __m128i __b) {
				390	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 2,
				391	(__mmask8)-1);
				392	}
				393
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	394	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	395	_mm_mask_cmple_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				396	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 2,
				397	__u);
				398	}
				399
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	400	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	401	_mm256_cmple_epi64_mask(__m256i __a, __m256i __b) {
				402	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 2,
				403	(__mmask8)-1);
				404	}
				405
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	406	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	407	_mm256_mask_cmple_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				408	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 2,
				409	__u);
				410	}
				411
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	412	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	413	_mm256_cmple_epu64_mask(__m256i __a, __m256i __b) {
				414	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 2,
				415	(__mmask8)-1);
				416	}
				417
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	418	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	419	_mm256_mask_cmple_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				420	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 2,
				421	__u);
				422	}
				423
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	424	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	425	_mm_cmplt_epi32_mask(__m128i __a, __m128i __b) {
				426	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,
				427	(__mmask8)-1);
				428	}
				429
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	430	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	431	_mm_mask_cmplt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				432	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,
				433	__u);
				434	}
				435
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	436	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	437	_mm_cmplt_epu32_mask(__m128i __a, __m128i __b) {
				438	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,
				439	(__mmask8)-1);
				440	}
				441
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	442	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	443	_mm_mask_cmplt_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				444	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,
				445	__u);
				446	}
				447
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	448	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	449	_mm256_cmplt_epi32_mask(__m256i __a, __m256i __b) {
				450	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 1,
				451	(__mmask8)-1);
				452	}
				453
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	454	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	455	_mm256_mask_cmplt_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				456	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 1,
				457	__u);
				458	}
				459
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	460	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	461	_mm256_cmplt_epu32_mask(__m256i __a, __m256i __b) {
				462	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 1,
				463	(__mmask8)-1);
				464	}
				465
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	466	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	467	_mm256_mask_cmplt_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				468	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 1,
				469	__u);
				470	}
				471
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	472	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	473	_mm_cmplt_epi64_mask(__m128i __a, __m128i __b) {
				474	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 1,
				475	(__mmask8)-1);
				476	}
				477
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	478	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	479	_mm_mask_cmplt_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				480	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 1,
				481	__u);
				482	}
				483
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	484	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	485	_mm_cmplt_epu64_mask(__m128i __a, __m128i __b) {
				486	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 1,
				487	(__mmask8)-1);
				488	}
				489
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	490	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	491	_mm_mask_cmplt_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				492	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 1,
				493	__u);
				494	}
				495
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	496	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	497	_mm256_cmplt_epi64_mask(__m256i __a, __m256i __b) {
				498	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 1,
				499	(__mmask8)-1);
				500	}
				501
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	502	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	503	_mm256_mask_cmplt_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				504	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 1,
				505	__u);
				506	}
				507
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	508	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	509	_mm256_cmplt_epu64_mask(__m256i __a, __m256i __b) {
				510	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 1,
				511	(__mmask8)-1);
				512	}
				513
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	514	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	515	_mm256_mask_cmplt_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				516	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 1,
				517	__u);
				518	}
				519
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	520	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	521	_mm_cmpneq_epi32_mask(__m128i __a, __m128i __b) {
				522	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,
				523	(__mmask8)-1);
				524	}
				525
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	526	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	527	_mm_mask_cmpneq_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				528	return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,
				529	__u);
				530	}
				531
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	532	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	533	_mm_cmpneq_epu32_mask(__m128i __a, __m128i __b) {
				534	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,
				535	(__mmask8)-1);
				536	}
				537
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	538	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	539	_mm_mask_cmpneq_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				540	return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,
				541	__u);
				542	}
				543
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	544	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	545	_mm256_cmpneq_epi32_mask(__m256i __a, __m256i __b) {
				546	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 4,
				547	(__mmask8)-1);
				548	}
				549
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	550	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	551	_mm256_mask_cmpneq_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				552	return (__mmask8)__builtin_ia32_cmpd256_mask((__v8si)__a, (__v8si)__b, 4,
				553	__u);
				554	}
				555
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	556	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	557	_mm256_cmpneq_epu32_mask(__m256i __a, __m256i __b) {
				558	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 4,
				559	(__mmask8)-1);
				560	}
				561
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	562	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	563	_mm256_mask_cmpneq_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				564	return (__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)__a, (__v8si)__b, 4,
				565	__u);
				566	}
				567
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	568	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	569	_mm_cmpneq_epi64_mask(__m128i __a, __m128i __b) {
				570	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 4,
				571	(__mmask8)-1);
				572	}
				573
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	574	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	575	_mm_mask_cmpneq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				576	return (__mmask8)__builtin_ia32_cmpq128_mask((__v2di)__a, (__v2di)__b, 4,
				577	__u);
				578	}
				579
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	580	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	581	_mm_cmpneq_epu64_mask(__m128i __a, __m128i __b) {
				582	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 4,
				583	(__mmask8)-1);
				584	}
				585
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	586	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	587	_mm_mask_cmpneq_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
				588	return (__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)__a, (__v2di)__b, 4,
				589	__u);
				590	}
				591
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	592	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	593	_mm256_cmpneq_epi64_mask(__m256i __a, __m256i __b) {
				594	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 4,
				595	(__mmask8)-1);
				596	}
				597
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	598	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	599	_mm256_mask_cmpneq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				600	return (__mmask8)__builtin_ia32_cmpq256_mask((__v4di)__a, (__v4di)__b, 4,
				601	__u);
				602	}
				603
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	604	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	605	_mm256_cmpneq_epu64_mask(__m256i __a, __m256i __b) {
				606	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 4,
				607	(__mmask8)-1);
				608	}
				609
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	610	static __inline__ __mmask8 __DEFAULT_FN_ATTRS
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	611	_mm256_mask_cmpneq_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) {
				612	return (__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)__a, (__v4di)__b, 4,
				613	__u);
				614	}
				615
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	616	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	617	_mm256_mask_add_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
				618	__m256i __B)
				619	{
				620	return (__m256i) __builtin_ia32_paddd256_mask ((__v8si) __A,
				621	(__v8si) __B,
				622	(__v8si) __W,
				623	(__mmask8) __U);
				624	}
				625
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	626	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	627	_mm256_maskz_add_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
				628	{
				629	return (__m256i) __builtin_ia32_paddd256_mask ((__v8si) __A,
				630	(__v8si) __B,
				631	(__v8si)
				632	_mm256_setzero_si256 (),
				633	(__mmask8) __U);
				634	}
				635
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	636	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	637	_mm256_mask_add_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
				638	__m256i __B)
				639	{
				640	return (__m256i) __builtin_ia32_paddq256_mask ((__v4di) __A,
				641	(__v4di) __B,
				642	(__v4di) __W,
				643	(__mmask8) __U);
				644	}
				645
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	646	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	647	_mm256_maskz_add_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
				648	{
				649	return (__m256i) __builtin_ia32_paddq256_mask ((__v4di) __A,
				650	(__v4di) __B,
				651	(__v4di)
				652	_mm256_setzero_si256 (),
				653	(__mmask8) __U);
				654	}
				655
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	656	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	657	_mm256_mask_sub_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
				658	__m256i __B)
				659	{
				660	return (__m256i) __builtin_ia32_psubd256_mask ((__v8si) __A,
				661	(__v8si) __B,
				662	(__v8si) __W,
				663	(__mmask8) __U);
				664	}
				665
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	666	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	667	_mm256_maskz_sub_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
				668	{
				669	return (__m256i) __builtin_ia32_psubd256_mask ((__v8si) __A,
				670	(__v8si) __B,
				671	(__v8si)
				672	_mm256_setzero_si256 (),
				673	(__mmask8) __U);
				674	}
				675
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	676	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	677	_mm256_mask_sub_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
				678	__m256i __B)
				679	{
				680	return (__m256i) __builtin_ia32_psubq256_mask ((__v4di) __A,
				681	(__v4di) __B,
				682	(__v4di) __W,
				683	(__mmask8) __U);
				684	}
				685
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	686	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	687	_mm256_maskz_sub_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
				688	{
				689	return (__m256i) __builtin_ia32_psubq256_mask ((__v4di) __A,
				690	(__v4di) __B,
				691	(__v4di)
				692	_mm256_setzero_si256 (),
				693	(__mmask8) __U);
				694	}
				695
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	696	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	697	_mm_mask_add_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
				698	__m128i __B)
				699	{
				700	return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,
				701	(__v4si) __B,
				702	(__v4si) __W,
				703	(__mmask8) __U);
				704	}
				705
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	706	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	707	_mm_maskz_add_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
				708	{
				709	return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,
				710	(__v4si) __B,
				711	(__v4si)
				712	_mm_setzero_si128 (),
				713	(__mmask8) __U);
				714	}
				715
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	716	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	717	_mm_mask_add_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
				718	__m128i __B)
				719	{
				720	return (__m128i) __builtin_ia32_paddq128_mask ((__v2di) __A,
				721	(__v2di) __B,
				722	(__v2di) __W,
				723	(__mmask8) __U);
				724	}
				725
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	726	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	727	_mm_maskz_add_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
				728	{
				729	return (__m128i) __builtin_ia32_paddq128_mask ((__v2di) __A,
				730	(__v2di) __B,
				731	(__v2di)
				732	_mm_setzero_si128 (),
				733	(__mmask8) __U);
				734	}
				735
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	736	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	737	_mm_mask_sub_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
				738	__m128i __B)
				739	{
				740	return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,
				741	(__v4si) __B,
				742	(__v4si) __W,
				743	(__mmask8) __U);
				744	}
				745
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	746	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	747	_mm_maskz_sub_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
				748	{
				749	return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,
				750	(__v4si) __B,
				751	(__v4si)
				752	_mm_setzero_si128 (),
				753	(__mmask8) __U);
				754	}
				755
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	756	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	757	_mm_mask_sub_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
				758	__m128i __B)
				759	{
				760	return (__m128i) __builtin_ia32_psubq128_mask ((__v2di) __A,
				761	(__v2di) __B,
				762	(__v2di) __W,
				763	(__mmask8) __U);
				764	}
				765
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	766	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	767	_mm_maskz_sub_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
				768	{
				769	return (__m128i) __builtin_ia32_psubq128_mask ((__v2di) __A,
				770	(__v2di) __B,
				771	(__v2di)
				772	_mm_setzero_si128 (),
				773	(__mmask8) __U);
				774	}
				775
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	776	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	777	_mm256_mask_mul_epi32 (__m256i __W, __mmask8 __M, __m256i __X,
				778	__m256i __Y)
				779	{
				780	return (__m256i) __builtin_ia32_pmuldq256_mask ((__v8si) __X,
				781	(__v8si) __Y,
				782	(__v4di) __W, __M);
				783	}
				784
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	785	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	786	_mm256_maskz_mul_epi32 (__mmask8 __M, __m256i __X, __m256i __Y)
				787	{
				788	return (__m256i) __builtin_ia32_pmuldq256_mask ((__v8si) __X,
				789	(__v8si) __Y,
				790	(__v4di)
				791	_mm256_setzero_si256 (),
				792	__M);
				793	}
				794
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	795	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	796	_mm_mask_mul_epi32 (__m128i __W, __mmask8 __M, __m128i __X,
				797	__m128i __Y)
				798	{
				799	return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,
				800	(__v4si) __Y,
				801	(__v2di) __W, __M);
				802	}
				803
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	804	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	805	_mm_maskz_mul_epi32 (__mmask8 __M, __m128i __X, __m128i __Y)
				806	{
				807	return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,
				808	(__v4si) __Y,
				809	(__v2di)
				810	_mm_setzero_si128 (),
				811	__M);
				812	}
				813
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	814	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	815	_mm256_mask_mul_epu32 (__m256i __W, __mmask8 __M, __m256i __X,
				816	__m256i __Y)
				817	{
				818	return (__m256i) __builtin_ia32_pmuludq256_mask ((__v8si) __X,
				819	(__v8si) __Y,
				820	(__v4di) __W, __M);
				821	}
				822
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	823	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	824	_mm256_maskz_mul_epu32 (__mmask8 __M, __m256i __X, __m256i __Y)
				825	{
				826	return (__m256i) __builtin_ia32_pmuludq256_mask ((__v8si) __X,
				827	(__v8si) __Y,
				828	(__v4di)
				829	_mm256_setzero_si256 (),
				830	__M);
				831	}
				832
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	833	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	834	_mm_mask_mul_epu32 (__m128i __W, __mmask8 __M, __m128i __X,
				835	__m128i __Y)
				836	{
				837	return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,
				838	(__v4si) __Y,
				839	(__v2di) __W, __M);
				840	}
				841
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	842	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	843	_mm_maskz_mul_epu32 (__mmask8 __M, __m128i __X, __m128i __Y)
				844	{
				845	return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,
				846	(__v4si) __Y,
				847	(__v2di)
				848	_mm_setzero_si128 (),
				849	__M);
				850	}
				851
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	852	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	853	_mm256_maskz_mullo_epi32 (__mmask8 __M, __m256i __A, __m256i __B)
				854	{
				855	return (__m256i) __builtin_ia32_pmulld256_mask ((__v8si) __A,
				856	(__v8si) __B,
				857	(__v8si)
				858	_mm256_setzero_si256 (),
				859	__M);
				860	}
				861
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	862	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	863	_mm256_mask_mullo_epi32 (__m256i __W, __mmask8 __M, __m256i __A,
				864	__m256i __B)
				865	{
				866	return (__m256i) __builtin_ia32_pmulld256_mask ((__v8si) __A,
				867	(__v8si) __B,
				868	(__v8si) __W, __M);
				869	}
				870
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	871	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	872	_mm_maskz_mullo_epi32 (__mmask8 __M, __m128i __A, __m128i __B)
				873	{
				874	return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,
				875	(__v4si) __B,
				876	(__v4si)
				877	_mm_setzero_si128 (),
				878	__M);
				879	}
				880
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	881	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	882	_mm_mask_mullo_epi32 (__m128i __W, __mmask16 __M, __m128i __A,
				883	__m128i __B)
				884	{
				885	return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,
				886	(__v4si) __B,
				887	(__v4si) __W, __M);
				888	}
				889
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	890	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	891	_mm256_mask_and_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
				892	__m256i __B)
				893	{
				894	return (__m256i) __builtin_ia32_pandd256_mask ((__v8si) __A,
				895	(__v8si) __B,
				896	(__v8si) __W,
				897	(__mmask8) __U);
				898	}
				899
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	900	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	901	_mm256_maskz_and_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
				902	{
				903	return (__m256i) __builtin_ia32_pandd256_mask ((__v8si) __A,
				904	(__v8si) __B,
				905	(__v8si)
				906	_mm256_setzero_si256 (),
				907	(__mmask8) __U);
				908	}
				909
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	910	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	911	_mm_mask_and_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
				912	{
				913	return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,
				914	(__v4si) __B,
				915	(__v4si) __W,
				916	(__mmask8) __U);
				917	}
				918
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	919	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	920	_mm_maskz_and_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
				921	{
				922	return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,
				923	(__v4si) __B,
				924	(__v4si)
				925	_mm_setzero_si128 (),
				926	(__mmask8) __U);
				927	}
				928
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	929	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	930	_mm256_mask_andnot_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
				931	__m256i __B)
				932	{
				933	return (__m256i) __builtin_ia32_pandnd256_mask ((__v8si) __A,
				934	(__v8si) __B,
				935	(__v8si) __W,
				936	(__mmask8) __U);
				937	}
				938
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	939	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	940	_mm256_maskz_andnot_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
				941	{
				942	return (__m256i) __builtin_ia32_pandnd256_mask ((__v8si) __A,
				943	(__v8si) __B,
				944	(__v8si)
				945	_mm256_setzero_si256 (),
				946	(__mmask8) __U);
				947	}
				948
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	949	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	950	_mm_mask_andnot_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
				951	__m128i __B)
				952	{
				953	return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,
				954	(__v4si) __B,
				955	(__v4si) __W,
				956	(__mmask8) __U);
				957	}
				958
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	959	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	960	_mm_maskz_andnot_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
				961	{
				962	return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,
				963	(__v4si) __B,
				964	(__v4si)
				965	_mm_setzero_si128 (),
				966	(__mmask8) __U);
				967	}
				968
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	969	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	970	_mm256_mask_or_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
				971	__m256i __B)
				972	{
				973	return (__m256i) __builtin_ia32_pord256_mask ((__v8si) __A,
				974	(__v8si) __B,
				975	(__v8si) __W,
				976	(__mmask8) __U);
				977	}
				978
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	979	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	980	_mm256_maskz_or_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
				981	{
				982	return (__m256i) __builtin_ia32_pord256_mask ((__v8si) __A,
				983	(__v8si) __B,
				984	(__v8si)
				985	_mm256_setzero_si256 (),
				986	(__mmask8) __U);
				987	}
				988
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	989	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	990	_mm_mask_or_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
				991	{
				992	return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,
				993	(__v4si) __B,
				994	(__v4si) __W,
				995	(__mmask8) __U);
				996	}
				997
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	998	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	999	_mm_maskz_or_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
				1000	{
				1001	return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,
				1002	(__v4si) __B,
				1003	(__v4si)
				1004	_mm_setzero_si128 (),
				1005	(__mmask8) __U);
				1006	}
				1007
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1008	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1009	_mm256_mask_xor_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
				1010	__m256i __B)
				1011	{
				1012	return (__m256i) __builtin_ia32_pxord256_mask ((__v8si) __A,
				1013	(__v8si) __B,
				1014	(__v8si) __W,
				1015	(__mmask8) __U);
				1016	}
				1017
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1018	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1019	_mm256_maskz_xor_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
				1020	{
				1021	return (__m256i) __builtin_ia32_pxord256_mask ((__v8si) __A,
				1022	(__v8si) __B,
				1023	(__v8si)
				1024	_mm256_setzero_si256 (),
				1025	(__mmask8) __U);
				1026	}
				1027
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1028	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1029	_mm_mask_xor_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
				1030	__m128i __B)
				1031	{
				1032	return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,
				1033	(__v4si) __B,
				1034	(__v4si) __W,
				1035	(__mmask8) __U);
				1036	}
				1037
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1038	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1039	_mm_maskz_xor_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
				1040	{
				1041	return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,
				1042	(__v4si) __B,
				1043	(__v4si)
				1044	_mm_setzero_si128 (),
				1045	(__mmask8) __U);
				1046	}
				1047
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1048	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1049	_mm256_mask_and_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
				1050	__m256i __B)
				1051	{
				1052	return (__m256i) __builtin_ia32_pandq256_mask ((__v4di) __A,
				1053	(__v4di) __B,
				1054	(__v4di) __W, __U);
				1055	}
				1056
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1057	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1058	_mm256_maskz_and_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
				1059	{
				1060	return (__m256i) __builtin_ia32_pandq256_mask ((__v4di) __A,
				1061	(__v4di) __B,
				1062	(__v4di)
				1063	_mm256_setzero_pd (),
				1064	__U);
				1065	}
				1066
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1067	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1068	_mm_mask_and_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
				1069	__m128i __B)
				1070	{
				1071	return (__m128i) __builtin_ia32_pandq128_mask ((__v2di) __A,
				1072	(__v2di) __B,
				1073	(__v2di) __W, __U);
				1074	}
				1075
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1076	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1077	_mm_maskz_and_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
				1078	{
				1079	return (__m128i) __builtin_ia32_pandq128_mask ((__v2di) __A,
				1080	(__v2di) __B,
				1081	(__v2di)
				1082	_mm_setzero_pd (),
				1083	__U);
				1084	}
				1085
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1086	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1087	_mm256_mask_andnot_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
				1088	__m256i __B)
				1089	{
				1090	return (__m256i) __builtin_ia32_pandnq256_mask ((__v4di) __A,
				1091	(__v4di) __B,
				1092	(__v4di) __W, __U);
				1093	}
				1094
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1095	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1096	_mm256_maskz_andnot_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
				1097	{
				1098	return (__m256i) __builtin_ia32_pandnq256_mask ((__v4di) __A,
				1099	(__v4di) __B,
				1100	(__v4di)
				1101	_mm256_setzero_pd (),
				1102	__U);
				1103	}
				1104
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1105	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1106	_mm_mask_andnot_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
				1107	__m128i __B)
				1108	{
				1109	return (__m128i) __builtin_ia32_pandnq128_mask ((__v2di) __A,
				1110	(__v2di) __B,
				1111	(__v2di) __W, __U);
				1112	}
				1113
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1114	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1115	_mm_maskz_andnot_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
				1116	{
				1117	return (__m128i) __builtin_ia32_pandnq128_mask ((__v2di) __A,
				1118	(__v2di) __B,
				1119	(__v2di)
				1120	_mm_setzero_pd (),
				1121	__U);
				1122	}
				1123
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1124	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1125	_mm256_mask_or_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
				1126	__m256i __B)
				1127	{
				1128	return (__m256i) __builtin_ia32_porq256_mask ((__v4di) __A,
				1129	(__v4di) __B,
				1130	(__v4di) __W,
				1131	(__mmask8) __U);
				1132	}
				1133
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1134	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1135	_mm256_maskz_or_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
				1136	{
				1137	return (__m256i) __builtin_ia32_porq256_mask ((__v4di) __A,
				1138	(__v4di) __B,
				1139	(__v4di)
				1140	_mm256_setzero_si256 (),
				1141	(__mmask8) __U);
				1142	}
				1143
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1144	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1145	_mm_mask_or_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
				1146	{
				1147	return (__m128i) __builtin_ia32_porq128_mask ((__v2di) __A,
				1148	(__v2di) __B,
				1149	(__v2di) __W,
				1150	(__mmask8) __U);
				1151	}
				1152
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1153	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1154	_mm_maskz_or_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
				1155	{
				1156	return (__m128i) __builtin_ia32_porq128_mask ((__v2di) __A,
				1157	(__v2di) __B,
				1158	(__v2di)
				1159	_mm_setzero_si128 (),
				1160	(__mmask8) __U);
				1161	}
				1162
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1163	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1164	_mm256_mask_xor_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
				1165	__m256i __B)
				1166	{
				1167	return (__m256i) __builtin_ia32_pxorq256_mask ((__v4di) __A,
				1168	(__v4di) __B,
				1169	(__v4di) __W,
				1170	(__mmask8) __U);
				1171	}
				1172
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1173	static __inline__ __m256i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1174	_mm256_maskz_xor_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
				1175	{
				1176	return (__m256i) __builtin_ia32_pxorq256_mask ((__v4di) __A,
				1177	(__v4di) __B,
				1178	(__v4di)
				1179	_mm256_setzero_si256 (),
				1180	(__mmask8) __U);
				1181	}
				1182
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1183	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1184	_mm_mask_xor_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
				1185	__m128i __B)
				1186	{
				1187	return (__m128i) __builtin_ia32_pxorq128_mask ((__v2di) __A,
				1188	(__v2di) __B,
				1189	(__v2di) __W,
				1190	(__mmask8) __U);
				1191	}
				1192
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1193	static __inline__ __m128i __DEFAULT_FN_ATTRS
Elena Demikhovsky	35dc8c0	2015-04-28 13:28:01 +0000	[diff] [blame]	1194	_mm_maskz_xor_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
				1195	{
				1196	return (__m128i) __builtin_ia32_pxorq128_mask ((__v2di) __A,
				1197	(__v2di) __B,
				1198	(__v2di)
				1199	_mm_setzero_si128 (),
				1200	(__mmask8) __U);
				1201	}
				1202
Craig Topper	2f25a5a	2015-01-26 08:11:49 +0000	[diff] [blame]	1203	#define _mm_cmp_epi32_mask(a, b, p) __extension__ ({ \
				1204	(__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
				1205	(__v4si)(__m128i)(b), \
				1206	(p), (__mmask8)-1); })
				1207
				1208	#define _mm_mask_cmp_epi32_mask(m, a, b, p) __extension__ ({ \
				1209	(__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
				1210	(__v4si)(__m128i)(b), \
				1211	(p), (__mmask8)(m)); })
				1212
				1213	#define _mm_cmp_epu32_mask(a, b, p) __extension__ ({ \
				1214	(__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
				1215	(__v4si)(__m128i)(b), \
				1216	(p), (__mmask8)-1); })
				1217
				1218	#define _mm_mask_cmp_epu32_mask(m, a, b, p) __extension__ ({ \
				1219	(__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
				1220	(__v4si)(__m128i)(b), \
				1221	(p), (__mmask8)(m)); })
				1222
				1223	#define _mm256_cmp_epi32_mask(a, b, p) __extension__ ({ \
				1224	(__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \
				1225	(__v8si)(__m256i)(b), \
				1226	(p), (__mmask8)-1); })
				1227
				1228	#define _mm256_mask_cmp_epi32_mask(m, a, b, p) __extension__ ({ \
				1229	(__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \
				1230	(__v8si)(__m256i)(b), \
				1231	(p), (__mmask8)(m)); })
				1232
				1233	#define _mm256_cmp_epu32_mask(a, b, p) __extension__ ({ \
				1234	(__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \
				1235	(__v8si)(__m256i)(b), \
				1236	(p), (__mmask8)-1); })
				1237
				1238	#define _mm256_mask_cmp_epu32_mask(m, a, b, p) __extension__ ({ \
				1239	(__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \
				1240	(__v8si)(__m256i)(b), \
				1241	(p), (__mmask8)(m)); })
				1242
				1243	#define _mm_cmp_epi64_mask(a, b, p) __extension__ ({ \
				1244	(__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \
				1245	(__v2di)(__m128i)(b), \
				1246	(p), (__mmask8)-1); })
				1247
				1248	#define _mm_mask_cmp_epi64_mask(m, a, b, p) __extension__ ({ \
				1249	(__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \
				1250	(__v2di)(__m128i)(b), \
				1251	(p), (__mmask8)(m)); })
				1252
				1253	#define _mm_cmp_epu64_mask(a, b, p) __extension__ ({ \
				1254	(__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \
				1255	(__v2di)(__m128i)(b), \
				1256	(p), (__mmask8)-1); })
				1257
				1258	#define _mm_mask_cmp_epu64_mask(m, a, b, p) __extension__ ({ \
				1259	(__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \
				1260	(__v2di)(__m128i)(b), \
				1261	(p), (__mmask8)(m)); })
				1262
				1263	#define _mm256_cmp_epi64_mask(a, b, p) __extension__ ({ \
				1264	(__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \
				1265	(__v4di)(__m256i)(b), \
				1266	(p), (__mmask8)-1); })
				1267
				1268	#define _mm256_mask_cmp_epi64_mask(m, a, b, p) __extension__ ({ \
				1269	(__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \
				1270	(__v4di)(__m256i)(b), \
				1271	(p), (__mmask8)(m)); })
				1272
				1273	#define _mm256_cmp_epu64_mask(a, b, p) __extension__ ({ \
				1274	(__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \
				1275	(__v4di)(__m256i)(b), \
				1276	(p), (__mmask8)-1); })
				1277
				1278	#define _mm256_mask_cmp_epu64_mask(m, a, b, p) __extension__ ({ \
				1279	(__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \
				1280	(__v4di)(__m256i)(b), \
				1281	(p), (__mmask8)(m)); })
				1282
Elena Demikhovsky	bd5c8b9	2015-05-07 11:26:36 +0000	[diff] [blame]	1283	#define _mm256_cmp_ps_mask(a, b, p) __extension__ ({ \
				1284	(__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \
				1285	(__v8sf)(__m256)(b), \
				1286	(p), (__mmask8)-1); })
				1287
				1288	#define _mm256_mask_cmp_ps_mask(m, a, b, p) __extension__ ({ \
				1289	(__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \
				1290	(__v8sf)(__m256)(b), \
				1291	(p), (__mmask8)(m)); })
				1292
				1293	#define _mm256_cmp_pd_mask(a, b, p) __extension__ ({ \
				1294	(__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256)(a), \
				1295	(__v4df)(__m256)(b), \
				1296	(p), (__mmask8)-1); })
				1297
				1298	#define _mm256_mask_cmp_pd_mask(m, a, b, p) __extension__ ({ \
				1299	(__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256)(a), \
				1300	(__v4df)(__m256)(b), \
				1301	(p), (__mmask8)(m)); })
				1302
				1303	#define _mm128_cmp_ps_mask(a, b, p) __extension__ ({ \
				1304	(__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
				1305	(__v4sf)(__m128)(b), \
				1306	(p), (__mmask8)-1); })
				1307
				1308	#define _mm128_mask_cmp_ps_mask(m, a, b, p) __extension__ ({ \
				1309	(__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
				1310	(__v4sf)(__m128)(b), \
				1311	(p), (__mmask8)(m)); })
				1312
				1313	#define _mm128_cmp_pd_mask(a, b, p) __extension__ ({ \
				1314	(__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128)(a), \
				1315	(__v2df)(__m128)(b), \
				1316	(p), (__mmask8)-1); })
				1317
				1318	#define _mm128_mask_cmp_pd_mask(m, a, b, p) __extension__ ({ \
				1319	(__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128)(a), \
				1320	(__v2df)(__m128)(b), \
				1321	(p), (__mmask8)(m)); })
Eric Christopher	4d185168	2015-06-17 07:09:20 +0000	[diff] [blame]	1322
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1323	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1324	_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
				1325	{
				1326	return (__m128d) __builtin_ia32_vfmaddpd128_mask ((__v2df) __A,
				1327	(__v2df) __B,
				1328	(__v2df) __C,
				1329	(__mmask8) __U);
				1330	}
				1331
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1332	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1333	_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
				1334	{
				1335	return (__m128d) __builtin_ia32_vfmaddpd128_mask3 ((__v2df) __A,
				1336	(__v2df) __B,
				1337	(__v2df) __C,
				1338	(__mmask8) __U);
				1339	}
				1340
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1341	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1342	_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
				1343	{
				1344	return (__m128d) __builtin_ia32_vfmaddpd128_maskz ((__v2df) __A,
				1345	(__v2df) __B,
				1346	(__v2df) __C,
				1347	(__mmask8) __U);
				1348	}
				1349
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1350	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1351	_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
				1352	{
				1353	return (__m128d) __builtin_ia32_vfmaddpd128_mask ((__v2df) __A,
				1354	(__v2df) __B,
				1355	-(__v2df) __C,
				1356	(__mmask8) __U);
				1357	}
				1358
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1359	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1360	_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
				1361	{
				1362	return (__m128d) __builtin_ia32_vfmaddpd128_maskz ((__v2df) __A,
				1363	(__v2df) __B,
				1364	-(__v2df) __C,
				1365	(__mmask8) __U);
				1366	}
				1367
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1368	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1369	_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
				1370	{
				1371	return (__m128d) __builtin_ia32_vfmaddpd128_mask3 (-(__v2df) __A,
				1372	(__v2df) __B,
				1373	(__v2df) __C,
				1374	(__mmask8) __U);
				1375	}
				1376
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1377	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1378	_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
				1379	{
				1380	return (__m128d) __builtin_ia32_vfmaddpd128_maskz (-(__v2df) __A,
				1381	(__v2df) __B,
				1382	(__v2df) __C,
				1383	(__mmask8) __U);
				1384	}
				1385
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1386	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1387	_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
				1388	{
				1389	return (__m128d) __builtin_ia32_vfmaddpd128_maskz (-(__v2df) __A,
				1390	(__v2df) __B,
				1391	-(__v2df) __C,
				1392	(__mmask8) __U);
				1393	}
				1394
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1395	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1396	_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
				1397	{
				1398	return (__m256d) __builtin_ia32_vfmaddpd256_mask ((__v4df) __A,
				1399	(__v4df) __B,
				1400	(__v4df) __C,
				1401	(__mmask8) __U);
				1402	}
				1403
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1404	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1405	_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
				1406	{
				1407	return (__m256d) __builtin_ia32_vfmaddpd256_mask3 ((__v4df) __A,
				1408	(__v4df) __B,
				1409	(__v4df) __C,
				1410	(__mmask8) __U);
				1411	}
				1412
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1413	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1414	_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
				1415	{
				1416	return (__m256d) __builtin_ia32_vfmaddpd256_maskz ((__v4df) __A,
				1417	(__v4df) __B,
				1418	(__v4df) __C,
				1419	(__mmask8) __U);
				1420	}
				1421
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1422	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1423	_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
				1424	{
				1425	return (__m256d) __builtin_ia32_vfmaddpd256_mask ((__v4df) __A,
				1426	(__v4df) __B,
				1427	-(__v4df) __C,
				1428	(__mmask8) __U);
				1429	}
				1430
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1431	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1432	_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
				1433	{
				1434	return (__m256d) __builtin_ia32_vfmaddpd256_maskz ((__v4df) __A,
				1435	(__v4df) __B,
				1436	-(__v4df) __C,
				1437	(__mmask8) __U);
				1438	}
				1439
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1440	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1441	_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
				1442	{
				1443	return (__m256d) __builtin_ia32_vfmaddpd256_mask3 (-(__v4df) __A,
				1444	(__v4df) __B,
				1445	(__v4df) __C,
				1446	(__mmask8) __U);
				1447	}
				1448
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1449	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1450	_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
				1451	{
				1452	return (__m256d) __builtin_ia32_vfmaddpd256_maskz (-(__v4df) __A,
				1453	(__v4df) __B,
				1454	(__v4df) __C,
				1455	(__mmask8) __U);
				1456	}
				1457
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1458	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1459	_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
				1460	{
				1461	return (__m256d) __builtin_ia32_vfmaddpd256_maskz (-(__v4df) __A,
				1462	(__v4df) __B,
				1463	-(__v4df) __C,
				1464	(__mmask8) __U);
				1465	}
				1466
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1467	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1468	_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
				1469	{
				1470	return (__m128) __builtin_ia32_vfmaddps128_mask ((__v4sf) __A,
				1471	(__v4sf) __B,
				1472	(__v4sf) __C,
				1473	(__mmask8) __U);
				1474	}
				1475
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1476	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1477	_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
				1478	{
				1479	return (__m128) __builtin_ia32_vfmaddps128_mask3 ((__v4sf) __A,
				1480	(__v4sf) __B,
				1481	(__v4sf) __C,
				1482	(__mmask8) __U);
				1483	}
				1484
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1485	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1486	_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
				1487	{
				1488	return (__m128) __builtin_ia32_vfmaddps128_maskz ((__v4sf) __A,
				1489	(__v4sf) __B,
				1490	(__v4sf) __C,
				1491	(__mmask8) __U);
				1492	}
				1493
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1494	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1495	_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
				1496	{
				1497	return (__m128) __builtin_ia32_vfmaddps128_mask ((__v4sf) __A,
				1498	(__v4sf) __B,
				1499	-(__v4sf) __C,
				1500	(__mmask8) __U);
				1501	}
				1502
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1503	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1504	_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
				1505	{
				1506	return (__m128) __builtin_ia32_vfmaddps128_maskz ((__v4sf) __A,
				1507	(__v4sf) __B,
				1508	-(__v4sf) __C,
				1509	(__mmask8) __U);
				1510	}
				1511
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1512	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1513	_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
				1514	{
				1515	return (__m128) __builtin_ia32_vfmaddps128_mask3 (-(__v4sf) __A,
				1516	(__v4sf) __B,
				1517	(__v4sf) __C,
				1518	(__mmask8) __U);
				1519	}
				1520
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1521	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1522	_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
				1523	{
				1524	return (__m128) __builtin_ia32_vfmaddps128_maskz (-(__v4sf) __A,
				1525	(__v4sf) __B,
				1526	(__v4sf) __C,
				1527	(__mmask8) __U);
				1528	}
				1529
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1530	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1531	_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
				1532	{
				1533	return (__m128) __builtin_ia32_vfmaddps128_maskz (-(__v4sf) __A,
				1534	(__v4sf) __B,
				1535	-(__v4sf) __C,
				1536	(__mmask8) __U);
				1537	}
				1538
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1539	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1540	_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
				1541	{
				1542	return (__m256) __builtin_ia32_vfmaddps256_mask ((__v8sf) __A,
				1543	(__v8sf) __B,
				1544	(__v8sf) __C,
				1545	(__mmask8) __U);
				1546	}
				1547
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1548	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1549	_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
				1550	{
				1551	return (__m256) __builtin_ia32_vfmaddps256_mask3 ((__v8sf) __A,
				1552	(__v8sf) __B,
				1553	(__v8sf) __C,
				1554	(__mmask8) __U);
				1555	}
				1556
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1557	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1558	_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
				1559	{
				1560	return (__m256) __builtin_ia32_vfmaddps256_maskz ((__v8sf) __A,
				1561	(__v8sf) __B,
				1562	(__v8sf) __C,
				1563	(__mmask8) __U);
				1564	}
				1565
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1566	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1567	_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
				1568	{
				1569	return (__m256) __builtin_ia32_vfmaddps256_mask ((__v8sf) __A,
				1570	(__v8sf) __B,
				1571	-(__v8sf) __C,
				1572	(__mmask8) __U);
				1573	}
				1574
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1575	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1576	_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
				1577	{
				1578	return (__m256) __builtin_ia32_vfmaddps256_maskz ((__v8sf) __A,
				1579	(__v8sf) __B,
				1580	-(__v8sf) __C,
				1581	(__mmask8) __U);
				1582	}
				1583
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1584	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1585	_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
				1586	{
				1587	return (__m256) __builtin_ia32_vfmaddps256_mask3 (-(__v8sf) __A,
				1588	(__v8sf) __B,
				1589	(__v8sf) __C,
				1590	(__mmask8) __U);
				1591	}
				1592
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1593	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1594	_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
				1595	{
				1596	return (__m256) __builtin_ia32_vfmaddps256_maskz (-(__v8sf) __A,
				1597	(__v8sf) __B,
				1598	(__v8sf) __C,
				1599	(__mmask8) __U);
				1600	}
				1601
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1602	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1603	_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
				1604	{
				1605	return (__m256) __builtin_ia32_vfmaddps256_maskz (-(__v8sf) __A,
				1606	(__v8sf) __B,
				1607	-(__v8sf) __C,
				1608	(__mmask8) __U);
				1609	}
				1610
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1611	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1612	_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
				1613	{
				1614	return (__m128d) __builtin_ia32_vfmaddsubpd128_mask ((__v2df) __A,
				1615	(__v2df) __B,
				1616	(__v2df) __C,
				1617	(__mmask8) __U);
				1618	}
				1619
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1620	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1621	_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
				1622	{
				1623	return (__m128d) __builtin_ia32_vfmaddsubpd128_mask3 ((__v2df) __A,
				1624	(__v2df) __B,
				1625	(__v2df) __C,
				1626	(__mmask8)
				1627	__U);
				1628	}
				1629
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1630	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1631	_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
				1632	{
				1633	return (__m128d) __builtin_ia32_vfmaddsubpd128_maskz ((__v2df) __A,
				1634	(__v2df) __B,
				1635	(__v2df) __C,
				1636	(__mmask8)
				1637	__U);
				1638	}
				1639
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1640	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1641	_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
				1642	{
				1643	return (__m128d) __builtin_ia32_vfmaddsubpd128_mask ((__v2df) __A,
				1644	(__v2df) __B,
				1645	-(__v2df) __C,
				1646	(__mmask8) __U);
				1647	}
				1648
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1649	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1650	_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)
				1651	{
				1652	return (__m128d) __builtin_ia32_vfmaddsubpd128_maskz ((__v2df) __A,
				1653	(__v2df) __B,
				1654	-(__v2df) __C,
				1655	(__mmask8)
				1656	__U);
				1657	}
				1658
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1659	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1660	_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
				1661	{
				1662	return (__m256d) __builtin_ia32_vfmaddsubpd256_mask ((__v4df) __A,
				1663	(__v4df) __B,
				1664	(__v4df) __C,
				1665	(__mmask8) __U);
				1666	}
				1667
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1668	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1669	_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
				1670	{
				1671	return (__m256d) __builtin_ia32_vfmaddsubpd256_mask3 ((__v4df) __A,
				1672	(__v4df) __B,
				1673	(__v4df) __C,
				1674	(__mmask8)
				1675	__U);
				1676	}
				1677
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1678	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1679	_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
				1680	{
				1681	return (__m256d) __builtin_ia32_vfmaddsubpd256_maskz ((__v4df) __A,
				1682	(__v4df) __B,
				1683	(__v4df) __C,
				1684	(__mmask8)
				1685	__U);
				1686	}
				1687
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1688	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1689	_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
				1690	{
				1691	return (__m256d) __builtin_ia32_vfmaddsubpd256_mask ((__v4df) __A,
				1692	(__v4df) __B,
				1693	-(__v4df) __C,
				1694	(__mmask8) __U);
				1695	}
				1696
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1697	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1698	_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)
				1699	{
				1700	return (__m256d) __builtin_ia32_vfmaddsubpd256_maskz ((__v4df) __A,
				1701	(__v4df) __B,
				1702	-(__v4df) __C,
				1703	(__mmask8)
				1704	__U);
				1705	}
				1706
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1707	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1708	_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
				1709	{
				1710	return (__m128) __builtin_ia32_vfmaddsubps128_mask ((__v4sf) __A,
				1711	(__v4sf) __B,
				1712	(__v4sf) __C,
				1713	(__mmask8) __U);
				1714	}
				1715
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1716	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1717	_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
				1718	{
				1719	return (__m128) __builtin_ia32_vfmaddsubps128_mask3 ((__v4sf) __A,
				1720	(__v4sf) __B,
				1721	(__v4sf) __C,
				1722	(__mmask8) __U);
				1723	}
				1724
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1725	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1726	_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
				1727	{
				1728	return (__m128) __builtin_ia32_vfmaddsubps128_maskz ((__v4sf) __A,
				1729	(__v4sf) __B,
				1730	(__v4sf) __C,
				1731	(__mmask8) __U);
				1732	}
				1733
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1734	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1735	_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
				1736	{
				1737	return (__m128) __builtin_ia32_vfmaddsubps128_mask ((__v4sf) __A,
				1738	(__v4sf) __B,
				1739	-(__v4sf) __C,
				1740	(__mmask8) __U);
				1741	}
				1742
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1743	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1744	_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)
				1745	{
				1746	return (__m128) __builtin_ia32_vfmaddsubps128_maskz ((__v4sf) __A,
				1747	(__v4sf) __B,
				1748	-(__v4sf) __C,
				1749	(__mmask8) __U);
				1750	}
				1751
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1752	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1753	_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B,
				1754	__m256 __C)
				1755	{
				1756	return (__m256) __builtin_ia32_vfmaddsubps256_mask ((__v8sf) __A,
				1757	(__v8sf) __B,
				1758	(__v8sf) __C,
				1759	(__mmask8) __U);
				1760	}
				1761
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1762	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1763	_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
				1764	{
				1765	return (__m256) __builtin_ia32_vfmaddsubps256_mask3 ((__v8sf) __A,
				1766	(__v8sf) __B,
				1767	(__v8sf) __C,
				1768	(__mmask8) __U);
				1769	}
				1770
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1771	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1772	_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
				1773	{
				1774	return (__m256) __builtin_ia32_vfmaddsubps256_maskz ((__v8sf) __A,
				1775	(__v8sf) __B,
				1776	(__v8sf) __C,
				1777	(__mmask8) __U);
				1778	}
				1779
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1780	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1781	_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
				1782	{
				1783	return (__m256) __builtin_ia32_vfmaddsubps256_mask ((__v8sf) __A,
				1784	(__v8sf) __B,
				1785	-(__v8sf) __C,
				1786	(__mmask8) __U);
				1787	}
				1788
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1789	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1790	_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
				1791	{
				1792	return (__m256) __builtin_ia32_vfmaddsubps256_maskz ((__v8sf) __A,
				1793	(__v8sf) __B,
				1794	-(__v8sf) __C,
				1795	(__mmask8) __U);
				1796	}
				1797
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1798	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1799	_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
				1800	{
				1801	return (__m128d) __builtin_ia32_vfmsubpd128_mask3 ((__v2df) __A,
				1802	(__v2df) __B,
				1803	(__v2df) __C,
				1804	(__mmask8) __U);
				1805	}
				1806
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1807	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1808	_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
				1809	{
				1810	return (__m256d) __builtin_ia32_vfmsubpd256_mask3 ((__v4df) __A,
				1811	(__v4df) __B,
				1812	(__v4df) __C,
				1813	(__mmask8) __U);
				1814	}
				1815
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1816	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1817	_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
				1818	{
				1819	return (__m128) __builtin_ia32_vfmsubps128_mask3 ((__v4sf) __A,
				1820	(__v4sf) __B,
				1821	(__v4sf) __C,
				1822	(__mmask8) __U);
				1823	}
				1824
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1825	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1826	_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
				1827	{
				1828	return (__m256) __builtin_ia32_vfmsubps256_mask3 ((__v8sf) __A,
				1829	(__v8sf) __B,
				1830	(__v8sf) __C,
				1831	(__mmask8) __U);
				1832	}
				1833
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1834	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1835	_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
				1836	{
				1837	return (__m128d) __builtin_ia32_vfmsubaddpd128_mask3 ((__v2df) __A,
				1838	(__v2df) __B,
				1839	(__v2df) __C,
				1840	(__mmask8)
				1841	__U);
				1842	}
				1843
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1844	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1845	_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
				1846	{
				1847	return (__m256d) __builtin_ia32_vfmsubaddpd256_mask3 ((__v4df) __A,
				1848	(__v4df) __B,
				1849	(__v4df) __C,
				1850	(__mmask8)
				1851	__U);
				1852	}
				1853
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1854	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1855	_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
				1856	{
				1857	return (__m128) __builtin_ia32_vfmsubaddps128_mask3 ((__v4sf) __A,
				1858	(__v4sf) __B,
				1859	(__v4sf) __C,
				1860	(__mmask8) __U);
				1861	}
				1862
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1863	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1864	_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
				1865	{
				1866	return (__m256) __builtin_ia32_vfmsubaddps256_mask3 ((__v8sf) __A,
				1867	(__v8sf) __B,
				1868	(__v8sf) __C,
				1869	(__mmask8) __U);
				1870	}
				1871
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1872	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1873	_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
				1874	{
				1875	return (__m128d) __builtin_ia32_vfnmaddpd128_mask ((__v2df) __A,
				1876	(__v2df) __B,
				1877	(__v2df) __C,
				1878	(__mmask8) __U);
				1879	}
				1880
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1881	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1882	_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
				1883	{
				1884	return (__m256d) __builtin_ia32_vfnmaddpd256_mask ((__v4df) __A,
				1885	(__v4df) __B,
				1886	(__v4df) __C,
				1887	(__mmask8) __U);
				1888	}
				1889
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1890	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1891	_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
				1892	{
				1893	return (__m128) __builtin_ia32_vfnmaddps128_mask ((__v4sf) __A,
				1894	(__v4sf) __B,
				1895	(__v4sf) __C,
				1896	(__mmask8) __U);
				1897	}
				1898
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1899	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1900	_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
				1901	{
				1902	return (__m256) __builtin_ia32_vfnmaddps256_mask ((__v8sf) __A,
				1903	(__v8sf) __B,
				1904	(__v8sf) __C,
				1905	(__mmask8) __U);
				1906	}
				1907
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1908	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1909	_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
				1910	{
				1911	return (__m128d) __builtin_ia32_vfnmsubpd128_mask ((__v2df) __A,
				1912	(__v2df) __B,
				1913	(__v2df) __C,
				1914	(__mmask8) __U);
				1915	}
				1916
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1917	static __inline__ __m128d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1918	_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
				1919	{
				1920	return (__m128d) __builtin_ia32_vfnmsubpd128_mask3 ((__v2df) __A,
				1921	(__v2df) __B,
				1922	(__v2df) __C,
				1923	(__mmask8) __U);
				1924	}
				1925
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1926	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1927	_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
				1928	{
				1929	return (__m256d) __builtin_ia32_vfnmsubpd256_mask ((__v4df) __A,
				1930	(__v4df) __B,
				1931	(__v4df) __C,
				1932	(__mmask8) __U);
				1933	}
				1934
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1935	static __inline__ __m256d __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1936	_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
				1937	{
				1938	return (__m256d) __builtin_ia32_vfnmsubpd256_mask3 ((__v4df) __A,
				1939	(__v4df) __B,
				1940	(__v4df) __C,
				1941	(__mmask8) __U);
				1942	}
				1943
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1944	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1945	_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
				1946	{
				1947	return (__m128) __builtin_ia32_vfnmsubps128_mask ((__v4sf) __A,
				1948	(__v4sf) __B,
				1949	(__v4sf) __C,
				1950	(__mmask8) __U);
				1951	}
				1952
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1953	static __inline__ __m128 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1954	_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
				1955	{
				1956	return (__m128) __builtin_ia32_vfnmsubps128_mask3 ((__v4sf) __A,
				1957	(__v4sf) __B,
				1958	(__v4sf) __C,
				1959	(__mmask8) __U);
				1960	}
				1961
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1962	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1963	_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
				1964	{
				1965	return (__m256) __builtin_ia32_vfnmsubps256_mask ((__v8sf) __A,
				1966	(__v8sf) __B,
				1967	(__v8sf) __C,
				1968	(__mmask8) __U);
				1969	}
				1970
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	1971	static __inline__ __m256 __DEFAULT_FN_ATTRS
Elena Demikhovsky	c563c2c	2015-06-29 09:20:57 +0000	[diff] [blame]	1972	_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
				1973	{
				1974	return (__m256) __builtin_ia32_vfnmsubps256_mask3 ((__v8sf) __A,
				1975	(__v8sf) __B,
				1976	(__v8sf) __C,
				1977	(__mmask8) __U);
				1978	}
				1979
Asaf Badouh	74da387	2015-07-28 08:26:14 +0000	[diff] [blame]	1980	static __inline__ __m128d __DEFAULT_FN_ATTRS
				1981	_mm_mask_add_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
				1982	return (__m128d) __builtin_ia32_addpd128_mask ((__v2df) __A,
				1983	(__v2df) __B,
				1984	(__v2df) __W,
				1985	(__mmask8) __U);
				1986	}
				1987
				1988	static __inline__ __m128d __DEFAULT_FN_ATTRS
				1989	_mm_maskz_add_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				1990	return (__m128d) __builtin_ia32_addpd128_mask ((__v2df) __A,
				1991	(__v2df) __B,
				1992	(__v2df)
				1993	_mm_setzero_pd (),
				1994	(__mmask8) __U);
				1995	}
				1996
				1997	static __inline__ __m256d __DEFAULT_FN_ATTRS
				1998	_mm256_mask_add_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
				1999	return (__m256d) __builtin_ia32_addpd256_mask ((__v4df) __A,
				2000	(__v4df) __B,
				2001	(__v4df) __W,
				2002	(__mmask8) __U);
				2003	}
				2004
				2005	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2006	_mm256_maskz_add_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				2007	return (__m256d) __builtin_ia32_addpd256_mask ((__v4df) __A,
				2008	(__v4df) __B,
				2009	(__v4df)
				2010	_mm256_setzero_pd (),
				2011	(__mmask8) __U);
				2012	}
				2013
				2014	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2015	_mm_mask_add_ps (__m128 __W, __mmask16 __U, __m128 __A, __m128 __B) {
				2016	return (__m128) __builtin_ia32_addps128_mask ((__v4sf) __A,
				2017	(__v4sf) __B,
				2018	(__v4sf) __W,
				2019	(__mmask8) __U);
				2020	}
				2021
				2022	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2023	_mm_maskz_add_ps (__mmask16 __U, __m128 __A, __m128 __B) {
				2024	return (__m128) __builtin_ia32_addps128_mask ((__v4sf) __A,
				2025	(__v4sf) __B,
				2026	(__v4sf)
				2027	_mm_setzero_ps (),
				2028	(__mmask8) __U);
				2029	}
				2030
				2031	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2032	_mm256_mask_add_ps (__m256 __W, __mmask16 __U, __m256 __A, __m256 __B) {
				2033	return (__m256) __builtin_ia32_addps256_mask ((__v8sf) __A,
				2034	(__v8sf) __B,
				2035	(__v8sf) __W,
				2036	(__mmask8) __U);
				2037	}
				2038
				2039	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2040	_mm256_maskz_add_ps (__mmask16 __U, __m256 __A, __m256 __B) {
				2041	return (__m256) __builtin_ia32_addps256_mask ((__v8sf) __A,
				2042	(__v8sf) __B,
				2043	(__v8sf)
				2044	_mm256_setzero_ps (),
				2045	(__mmask8) __U);
				2046	}
				2047
				2048	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2049	_mm_mask_blend_epi32 (__mmask8 __U, __m128i __A, __m128i __W) {
				2050	return (__m128i) __builtin_ia32_blendmd_128_mask ((__v4si) __A,
				2051	(__v4si) __W,
				2052	(__mmask8) __U);
				2053	}
				2054
				2055	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2056	_mm256_mask_blend_epi32 (__mmask8 __U, __m256i __A, __m256i __W) {
				2057	return (__m256i) __builtin_ia32_blendmd_256_mask ((__v8si) __A,
				2058	(__v8si) __W,
				2059	(__mmask8) __U);
				2060	}
				2061
				2062	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2063	_mm_mask_blend_pd (__mmask8 __U, __m128d __A, __m128d __W) {
				2064	return (__m128d) __builtin_ia32_blendmpd_128_mask ((__v2df) __A,
				2065	(__v2df) __W,
				2066	(__mmask8) __U);
				2067	}
				2068
				2069	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2070	_mm256_mask_blend_pd (__mmask8 __U, __m256d __A, __m256d __W) {
				2071	return (__m256d) __builtin_ia32_blendmpd_256_mask ((__v4df) __A,
				2072	(__v4df) __W,
				2073	(__mmask8) __U);
				2074	}
				2075
				2076	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2077	_mm_mask_blend_ps (__mmask8 __U, __m128 __A, __m128 __W) {
				2078	return (__m128) __builtin_ia32_blendmps_128_mask ((__v4sf) __A,
				2079	(__v4sf) __W,
				2080	(__mmask8) __U);
				2081	}
				2082
				2083	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2084	_mm256_mask_blend_ps (__mmask8 __U, __m256 __A, __m256 __W) {
				2085	return (__m256) __builtin_ia32_blendmps_256_mask ((__v8sf) __A,
				2086	(__v8sf) __W,
				2087	(__mmask8) __U);
				2088	}
				2089
				2090	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2091	_mm_mask_blend_epi64 (__mmask8 __U, __m128i __A, __m128i __W) {
				2092	return (__m128i) __builtin_ia32_blendmq_128_mask ((__v2di) __A,
				2093	(__v2di) __W,
				2094	(__mmask8) __U);
				2095	}
				2096
				2097	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2098	_mm256_mask_blend_epi64 (__mmask8 __U, __m256i __A, __m256i __W) {
				2099	return (__m256i) __builtin_ia32_blendmq_256_mask ((__v4di) __A,
				2100	(__v4di) __W,
				2101	(__mmask8) __U);
				2102	}
				2103
				2104	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2105	_mm_mask_compress_pd (__m128d __W, __mmask8 __U, __m128d __A) {
				2106	return (__m128d) __builtin_ia32_compressdf128_mask ((__v2df) __A,
				2107	(__v2df) __W,
				2108	(__mmask8) __U);
				2109	}
				2110
				2111	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2112	_mm_maskz_compress_pd (__mmask8 __U, __m128d __A) {
				2113	return (__m128d) __builtin_ia32_compressdf128_mask ((__v2df) __A,
				2114	(__v2df)
				2115	_mm_setzero_pd (),
				2116	(__mmask8) __U);
				2117	}
				2118
				2119	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2120	_mm256_mask_compress_pd (__m256d __W, __mmask8 __U, __m256d __A) {
				2121	return (__m256d) __builtin_ia32_compressdf256_mask ((__v4df) __A,
				2122	(__v4df) __W,
				2123	(__mmask8) __U);
				2124	}
				2125
				2126	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2127	_mm256_maskz_compress_pd (__mmask8 __U, __m256d __A) {
				2128	return (__m256d) __builtin_ia32_compressdf256_mask ((__v4df) __A,
				2129	(__v4df)
				2130	_mm256_setzero_pd (),
				2131	(__mmask8) __U);
				2132	}
				2133
				2134	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2135	_mm_mask_compress_epi64 (__m128i __W, __mmask8 __U, __m128i __A) {
				2136	return (__m128i) __builtin_ia32_compressdi128_mask ((__v2di) __A,
				2137	(__v2di) __W,
				2138	(__mmask8) __U);
				2139	}
				2140
				2141	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2142	_mm_maskz_compress_epi64 (__mmask8 __U, __m128i __A) {
				2143	return (__m128i) __builtin_ia32_compressdi128_mask ((__v2di) __A,
				2144	(__v2di)
				2145	_mm_setzero_si128 (),
				2146	(__mmask8) __U);
				2147	}
				2148
				2149	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2150	_mm256_mask_compress_epi64 (__m256i __W, __mmask8 __U, __m256i __A) {
				2151	return (__m256i) __builtin_ia32_compressdi256_mask ((__v4di) __A,
				2152	(__v4di) __W,
				2153	(__mmask8) __U);
				2154	}
				2155
				2156	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2157	_mm256_maskz_compress_epi64 (__mmask8 __U, __m256i __A) {
				2158	return (__m256i) __builtin_ia32_compressdi256_mask ((__v4di) __A,
				2159	(__v4di)
				2160	_mm256_setzero_si256 (),
				2161	(__mmask8) __U);
				2162	}
				2163
				2164	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2165	_mm_mask_compress_ps (__m128 __W, __mmask8 __U, __m128 __A) {
				2166	return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A,
				2167	(__v4sf) __W,
				2168	(__mmask8) __U);
				2169	}
				2170
				2171	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2172	_mm_maskz_compress_ps (__mmask8 __U, __m128 __A) {
				2173	return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A,
				2174	(__v4sf)
				2175	_mm_setzero_ps (),
				2176	(__mmask8) __U);
				2177	}
				2178
				2179	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2180	_mm256_mask_compress_ps (__m256 __W, __mmask8 __U, __m256 __A) {
				2181	return (__m256) __builtin_ia32_compresssf256_mask ((__v8sf) __A,
				2182	(__v8sf) __W,
				2183	(__mmask8) __U);
				2184	}
				2185
				2186	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2187	_mm256_maskz_compress_ps (__mmask8 __U, __m256 __A) {
				2188	return (__m256) __builtin_ia32_compresssf256_mask ((__v8sf) __A,
				2189	(__v8sf)
				2190	_mm256_setzero_ps (),
				2191	(__mmask8) __U);
				2192	}
				2193
				2194	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2195	_mm_mask_compress_epi32 (__m128i __W, __mmask8 __U, __m128i __A) {
				2196	return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,
				2197	(__v4si) __W,
				2198	(__mmask8) __U);
				2199	}
				2200
				2201	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2202	_mm_maskz_compress_epi32 (__mmask8 __U, __m128i __A) {
				2203	return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,
				2204	(__v4si)
				2205	_mm_setzero_si128 (),
				2206	(__mmask8) __U);
				2207	}
				2208
				2209	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2210	_mm256_mask_compress_epi32 (__m256i __W, __mmask8 __U, __m256i __A) {
				2211	return (__m256i) __builtin_ia32_compresssi256_mask ((__v8si) __A,
				2212	(__v8si) __W,
				2213	(__mmask8) __U);
				2214	}
				2215
				2216	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2217	_mm256_maskz_compress_epi32 (__mmask8 __U, __m256i __A) {
				2218	return (__m256i) __builtin_ia32_compresssi256_mask ((__v8si) __A,
				2219	(__v8si)
				2220	_mm256_setzero_si256 (),
				2221	(__mmask8) __U);
				2222	}
				2223
				2224	static __inline__ void __DEFAULT_FN_ATTRS
				2225	_mm_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m128d __A) {
				2226	__builtin_ia32_compressstoredf128_mask ((__v2df *) __P,
				2227	(__v2df) __A,
				2228	(__mmask8) __U);
				2229	}
				2230
				2231	static __inline__ void __DEFAULT_FN_ATTRS
				2232	_mm256_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m256d __A) {
				2233	__builtin_ia32_compressstoredf256_mask ((__v4df *) __P,
				2234	(__v4df) __A,
				2235	(__mmask8) __U);
				2236	}
				2237
				2238	static __inline__ void __DEFAULT_FN_ATTRS
				2239	_mm_mask_compressstoreu_epi64 (void *__P, __mmask8 __U, __m128i __A) {
				2240	__builtin_ia32_compressstoredi128_mask ((__v2di *) __P,
				2241	(__v2di) __A,
				2242	(__mmask8) __U);
				2243	}
				2244
				2245	static __inline__ void __DEFAULT_FN_ATTRS
				2246	_mm256_mask_compressstoreu_epi64 (void *__P, __mmask8 __U, __m256i __A) {
				2247	__builtin_ia32_compressstoredi256_mask ((__v4di *) __P,
				2248	(__v4di) __A,
				2249	(__mmask8) __U);
				2250	}
				2251
				2252	static __inline__ void __DEFAULT_FN_ATTRS
				2253	_mm_mask_compressstoreu_ps (void *__P, __mmask8 __U, __m128 __A) {
				2254	__builtin_ia32_compressstoresf128_mask ((__v4sf *) __P,
				2255	(__v4sf) __A,
				2256	(__mmask8) __U);
				2257	}
				2258
				2259	static __inline__ void __DEFAULT_FN_ATTRS
				2260	_mm256_mask_compressstoreu_ps (void *__P, __mmask8 __U, __m256 __A) {
				2261	__builtin_ia32_compressstoresf256_mask ((__v8sf *) __P,
				2262	(__v8sf) __A,
				2263	(__mmask8) __U);
				2264	}
				2265
				2266	static __inline__ void __DEFAULT_FN_ATTRS
				2267	_mm_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m128i __A) {
				2268	__builtin_ia32_compressstoresi128_mask ((__v4si *) __P,
				2269	(__v4si) __A,
				2270	(__mmask8) __U);
				2271	}
				2272
				2273	static __inline__ void __DEFAULT_FN_ATTRS
				2274	_mm256_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m256i __A) {
				2275	__builtin_ia32_compressstoresi256_mask ((__v8si *) __P,
				2276	(__v8si) __A,
				2277	(__mmask8) __U);
				2278	}
				2279
				2280	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2281	_mm_mask_cvtepi32_pd (__m128d __W, __mmask8 __U, __m128i __A) {
				2282	return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A,
				2283	(__v2df) __W,
				2284	(__mmask8) __U);
				2285	}
				2286
				2287	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2288	_mm_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {
				2289	return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A,
				2290	(__v2df)
				2291	_mm_setzero_pd (),
				2292	(__mmask8) __U);
				2293	}
				2294
				2295	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2296	_mm256_mask_cvtepi32_pd (__m256d __W, __mmask8 __U, __m128i __A) {
				2297	return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A,
				2298	(__v4df) __W,
				2299	(__mmask8) __U);
				2300	}
				2301
				2302	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2303	_mm256_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {
				2304	return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A,
				2305	(__v4df)
				2306	_mm256_setzero_pd (),
				2307	(__mmask8) __U);
				2308	}
				2309
				2310	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2311	_mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
				2312	return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A,
				2313	(__v4sf) __W,
				2314	(__mmask8) __U);
				2315	}
				2316
				2317	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2318	_mm_maskz_cvtepi32_ps (__mmask16 __U, __m128i __A) {
				2319	return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A,
				2320	(__v4sf)
				2321	_mm_setzero_ps (),
				2322	(__mmask8) __U);
				2323	}
				2324
				2325	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2326	_mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
				2327	return (__m256) __builtin_ia32_cvtdq2ps256_mask ((__v8si) __A,
				2328	(__v8sf) __W,
				2329	(__mmask8) __U);
				2330	}
				2331
				2332	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2333	_mm256_maskz_cvtepi32_ps (__mmask16 __U, __m256i __A) {
				2334	return (__m256) __builtin_ia32_cvtdq2ps256_mask ((__v8si) __A,
				2335	(__v8sf)
				2336	_mm256_setzero_ps (),
				2337	(__mmask8) __U);
				2338	}
				2339
				2340	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2341	_mm_mask_cvtpd_epi32 (__m128i __W, __mmask8 __U, __m128d __A) {
				2342	return (__m128i) __builtin_ia32_cvtpd2dq128_mask ((__v2df) __A,
				2343	(__v4si) __W,
				2344	(__mmask8) __U);
				2345	}
				2346
				2347	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2348	_mm_maskz_cvtpd_epi32 (__mmask8 __U, __m128d __A) {
				2349	return (__m128i) __builtin_ia32_cvtpd2dq128_mask ((__v2df) __A,
				2350	(__v4si)
				2351	_mm_setzero_si128 (),
				2352	(__mmask8) __U);
				2353	}
				2354
				2355	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2356	_mm256_mask_cvtpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A) {
				2357	return (__m128i) __builtin_ia32_cvtpd2dq256_mask ((__v4df) __A,
				2358	(__v4si) __W,
				2359	(__mmask8) __U);
				2360	}
				2361
				2362	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2363	_mm256_maskz_cvtpd_epi32 (__mmask8 __U, __m256d __A) {
				2364	return (__m128i) __builtin_ia32_cvtpd2dq256_mask ((__v4df) __A,
				2365	(__v4si)
				2366	_mm_setzero_si128 (),
				2367	(__mmask8) __U);
				2368	}
				2369
				2370	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2371	_mm_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m128d __A) {
				2372	return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,
				2373	(__v4sf) __W,
				2374	(__mmask8) __U);
				2375	}
				2376
				2377	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2378	_mm_maskz_cvtpd_ps (__mmask8 __U, __m128d __A) {
				2379	return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,
				2380	(__v4sf)
				2381	_mm_setzero_ps (),
				2382	(__mmask8) __U);
				2383	}
				2384
				2385	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2386	_mm256_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m256d __A) {
				2387	return (__m128) __builtin_ia32_cvtpd2ps256_mask ((__v4df) __A,
				2388	(__v4sf) __W,
				2389	(__mmask8) __U);
				2390	}
				2391
				2392	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2393	_mm256_maskz_cvtpd_ps (__mmask8 __U, __m256d __A) {
				2394	return (__m128) __builtin_ia32_cvtpd2ps256_mask ((__v4df) __A,
				2395	(__v4sf)
				2396	_mm_setzero_ps (),
				2397	(__mmask8) __U);
				2398	}
				2399
				2400	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2401	_mm_cvtpd_epu32 (__m128d __A) {
				2402	return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A,
				2403	(__v4si)
				2404	_mm_setzero_si128 (),
				2405	(__mmask8) -1);
				2406	}
				2407
				2408	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2409	_mm_mask_cvtpd_epu32 (__m128i __W, __mmask8 __U, __m128d __A) {
				2410	return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A,
				2411	(__v4si) __W,
				2412	(__mmask8) __U);
				2413	}
				2414
				2415	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2416	_mm_maskz_cvtpd_epu32 (__mmask8 __U, __m128d __A) {
				2417	return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A,
				2418	(__v4si)
				2419	_mm_setzero_si128 (),
				2420	(__mmask8) __U);
				2421	}
				2422
				2423	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2424	_mm256_cvtpd_epu32 (__m256d __A) {
				2425	return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A,
				2426	(__v4si)
				2427	_mm_setzero_si128 (),
				2428	(__mmask8) -1);
				2429	}
				2430
				2431	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2432	_mm256_mask_cvtpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A) {
				2433	return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A,
				2434	(__v4si) __W,
				2435	(__mmask8) __U);
				2436	}
				2437
				2438	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2439	_mm256_maskz_cvtpd_epu32 (__mmask8 __U, __m256d __A) {
				2440	return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A,
				2441	(__v4si)
				2442	_mm_setzero_si128 (),
				2443	(__mmask8) __U);
				2444	}
				2445
				2446	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2447	_mm_mask_cvtps_epi32 (__m128i __W, __mmask8 __U, __m128 __A) {
				2448	return (__m128i) __builtin_ia32_cvtps2dq128_mask ((__v4sf) __A,
				2449	(__v4si) __W,
				2450	(__mmask8) __U);
				2451	}
				2452
				2453	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2454	_mm_maskz_cvtps_epi32 (__mmask8 __U, __m128 __A) {
				2455	return (__m128i) __builtin_ia32_cvtps2dq128_mask ((__v4sf) __A,
				2456	(__v4si)
				2457	_mm_setzero_si128 (),
				2458	(__mmask8) __U);
				2459	}
				2460
				2461	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2462	_mm256_mask_cvtps_epi32 (__m256i __W, __mmask8 __U, __m256 __A) {
				2463	return (__m256i) __builtin_ia32_cvtps2dq256_mask ((__v8sf) __A,
				2464	(__v8si) __W,
				2465	(__mmask8) __U);
				2466	}
				2467
				2468	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2469	_mm256_maskz_cvtps_epi32 (__mmask8 __U, __m256 __A) {
				2470	return (__m256i) __builtin_ia32_cvtps2dq256_mask ((__v8sf) __A,
				2471	(__v8si)
				2472	_mm256_setzero_si256 (),
				2473	(__mmask8) __U);
				2474	}
				2475
				2476	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2477	_mm_mask_cvtps_pd (__m128d __W, __mmask8 __U, __m128 __A) {
				2478	return (__m128d) __builtin_ia32_cvtps2pd128_mask ((__v4sf) __A,
				2479	(__v2df) __W,
				2480	(__mmask8) __U);
				2481	}
				2482
				2483	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2484	_mm_maskz_cvtps_pd (__mmask8 __U, __m128 __A) {
				2485	return (__m128d) __builtin_ia32_cvtps2pd128_mask ((__v4sf) __A,
				2486	(__v2df)
				2487	_mm_setzero_pd (),
				2488	(__mmask8) __U);
				2489	}
				2490
				2491	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2492	_mm256_mask_cvtps_pd (__m256d __W, __mmask8 __U, __m128 __A) {
				2493	return (__m256d) __builtin_ia32_cvtps2pd256_mask ((__v4sf) __A,
				2494	(__v4df) __W,
				2495	(__mmask8) __U);
				2496	}
				2497
				2498	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2499	_mm256_maskz_cvtps_pd (__mmask8 __U, __m128 __A) {
				2500	return (__m256d) __builtin_ia32_cvtps2pd256_mask ((__v4sf) __A,
				2501	(__v4df)
				2502	_mm256_setzero_pd (),
				2503	(__mmask8) __U);
				2504	}
				2505
				2506	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2507	_mm_cvtps_epu32 (__m128 __A) {
				2508	return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
				2509	(__v4si)
				2510	_mm_setzero_si128 (),
				2511	(__mmask8) -1);
				2512	}
				2513
				2514	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2515	_mm_mask_cvtps_epu32 (__m128i __W, __mmask8 __U, __m128 __A) {
				2516	return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
				2517	(__v4si) __W,
				2518	(__mmask8) __U);
				2519	}
				2520
				2521	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2522	_mm_maskz_cvtps_epu32 (__mmask8 __U, __m128 __A) {
				2523	return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
				2524	(__v4si)
				2525	_mm_setzero_si128 (),
				2526	(__mmask8) __U);
				2527	}
				2528
				2529	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2530	_mm256_cvtps_epu32 (__m256 __A) {
				2531	return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A,
				2532	(__v8si)
				2533	_mm256_setzero_si256 (),
				2534	(__mmask8) -1);
				2535	}
				2536
				2537	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2538	_mm256_mask_cvtps_epu32 (__m256i __W, __mmask8 __U, __m256 __A) {
				2539	return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A,
				2540	(__v8si) __W,
				2541	(__mmask8) __U);
				2542	}
				2543
				2544	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2545	_mm256_maskz_cvtps_epu32 (__mmask8 __U, __m256 __A) {
				2546	return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A,
				2547	(__v8si)
				2548	_mm256_setzero_si256 (),
				2549	(__mmask8) __U);
				2550	}
				2551
				2552	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2553	_mm_mask_cvttpd_epi32 (__m128i __W, __mmask8 __U, __m128d __A) {
				2554	return (__m128i) __builtin_ia32_cvttpd2dq128_mask ((__v2df) __A,
				2555	(__v4si) __W,
				2556	(__mmask8) __U);
				2557	}
				2558
				2559	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2560	_mm_maskz_cvttpd_epi32 (__mmask8 __U, __m128d __A) {
				2561	return (__m128i) __builtin_ia32_cvttpd2dq128_mask ((__v2df) __A,
				2562	(__v4si)
				2563	_mm_setzero_si128 (),
				2564	(__mmask8) __U);
				2565	}
				2566
				2567	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2568	_mm256_mask_cvttpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A) {
				2569	return (__m128i) __builtin_ia32_cvttpd2dq256_mask ((__v4df) __A,
				2570	(__v4si) __W,
				2571	(__mmask8) __U);
				2572	}
				2573
				2574	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2575	_mm256_maskz_cvttpd_epi32 (__mmask8 __U, __m256d __A) {
				2576	return (__m128i) __builtin_ia32_cvttpd2dq256_mask ((__v4df) __A,
				2577	(__v4si)
				2578	_mm_setzero_si128 (),
				2579	(__mmask8) __U);
				2580	}
				2581
				2582	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2583	_mm_cvttpd_epu32 (__m128d __A) {
				2584	return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A,
				2585	(__v4si)
				2586	_mm_setzero_si128 (),
				2587	(__mmask8) -1);
				2588	}
				2589
				2590	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2591	_mm_mask_cvttpd_epu32 (__m128i __W, __mmask8 __U, __m128d __A) {
				2592	return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A,
				2593	(__v4si) __W,
				2594	(__mmask8) __U);
				2595	}
				2596
				2597	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2598	_mm_maskz_cvttpd_epu32 (__mmask8 __U, __m128d __A) {
				2599	return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A,
				2600	(__v4si)
				2601	_mm_setzero_si128 (),
				2602	(__mmask8) __U);
				2603	}
				2604
				2605	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2606	_mm256_cvttpd_epu32 (__m256d __A) {
				2607	return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A,
				2608	(__v4si)
				2609	_mm_setzero_si128 (),
				2610	(__mmask8) -1);
				2611	}
				2612
				2613	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2614	_mm256_mask_cvttpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A) {
				2615	return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A,
				2616	(__v4si) __W,
				2617	(__mmask8) __U);
				2618	}
				2619
				2620	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2621	_mm256_maskz_cvttpd_epu32 (__mmask8 __U, __m256d __A) {
				2622	return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A,
				2623	(__v4si)
				2624	_mm_setzero_si128 (),
				2625	(__mmask8) __U);
				2626	}
				2627
				2628	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2629	_mm_mask_cvttps_epi32 (__m128i __W, __mmask8 __U, __m128 __A) {
				2630	return (__m128i) __builtin_ia32_cvttps2dq128_mask ((__v4sf) __A,
				2631	(__v4si) __W,
				2632	(__mmask8) __U);
				2633	}
				2634
				2635	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2636	_mm_maskz_cvttps_epi32 (__mmask8 __U, __m128 __A) {
				2637	return (__m128i) __builtin_ia32_cvttps2dq128_mask ((__v4sf) __A,
				2638	(__v4si)
				2639	_mm_setzero_si128 (),
				2640	(__mmask8) __U);
				2641	}
				2642
				2643	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2644	_mm256_mask_cvttps_epi32 (__m256i __W, __mmask8 __U, __m256 __A) {
				2645	return (__m256i) __builtin_ia32_cvttps2dq256_mask ((__v8sf) __A,
				2646	(__v8si) __W,
				2647	(__mmask8) __U);
				2648	}
				2649
				2650	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2651	_mm256_maskz_cvttps_epi32 (__mmask8 __U, __m256 __A) {
				2652	return (__m256i) __builtin_ia32_cvttps2dq256_mask ((__v8sf) __A,
				2653	(__v8si)
				2654	_mm256_setzero_si256 (),
				2655	(__mmask8) __U);
				2656	}
				2657
				2658	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2659	_mm_cvttps_epu32 (__m128 __A) {
				2660	return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
				2661	(__v4si)
				2662	_mm_setzero_si128 (),
				2663	(__mmask8) -1);
				2664	}
				2665
				2666	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2667	_mm_mask_cvttps_epu32 (__m128i __W, __mmask8 __U, __m128 __A) {
				2668	return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
				2669	(__v4si) __W,
				2670	(__mmask8) __U);
				2671	}
				2672
				2673	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2674	_mm_maskz_cvttps_epu32 (__mmask8 __U, __m128 __A) {
				2675	return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
				2676	(__v4si)
				2677	_mm_setzero_si128 (),
				2678	(__mmask8) __U);
				2679	}
				2680
				2681	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2682	_mm256_cvttps_epu32 (__m256 __A) {
				2683	return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A,
				2684	(__v8si)
				2685	_mm256_setzero_si256 (),
				2686	(__mmask8) -1);
				2687	}
				2688
				2689	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2690	_mm256_mask_cvttps_epu32 (__m256i __W, __mmask8 __U, __m256 __A) {
				2691	return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A,
				2692	(__v8si) __W,
				2693	(__mmask8) __U);
				2694	}
				2695
				2696	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2697	_mm256_maskz_cvttps_epu32 (__mmask8 __U, __m256 __A) {
				2698	return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A,
				2699	(__v8si)
				2700	_mm256_setzero_si256 (),
				2701	(__mmask8) __U);
				2702	}
				2703
				2704	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2705	_mm_cvtepu32_pd (__m128i __A) {
				2706	return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,
				2707	(__v2df)
				2708	_mm_setzero_pd (),
				2709	(__mmask8) -1);
				2710	}
				2711
				2712	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2713	_mm_mask_cvtepu32_pd (__m128d __W, __mmask8 __U, __m128i __A) {
				2714	return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,
				2715	(__v2df) __W,
				2716	(__mmask8) __U);
				2717	}
				2718
				2719	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2720	_mm_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {
				2721	return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,
				2722	(__v2df)
				2723	_mm_setzero_pd (),
				2724	(__mmask8) __U);
				2725	}
				2726
				2727	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2728	_mm256_cvtepu32_pd (__m128i __A) {
				2729	return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,
				2730	(__v4df)
				2731	_mm256_setzero_pd (),
				2732	(__mmask8) -1);
				2733	}
				2734
				2735	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2736	_mm256_mask_cvtepu32_pd (__m256d __W, __mmask8 __U, __m128i __A) {
				2737	return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,
				2738	(__v4df) __W,
				2739	(__mmask8) __U);
				2740	}
				2741
				2742	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2743	_mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {
				2744	return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,
				2745	(__v4df)
				2746	_mm256_setzero_pd (),
				2747	(__mmask8) __U);
				2748	}
				2749
				2750	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2751	_mm_cvtepu32_ps (__m128i __A) {
				2752	return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
				2753	(__v4sf)
				2754	_mm_setzero_ps (),
				2755	(__mmask8) -1);
				2756	}
				2757
				2758	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2759	_mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
				2760	return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
				2761	(__v4sf) __W,
				2762	(__mmask8) __U);
				2763	}
				2764
				2765	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2766	_mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) {
				2767	return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
				2768	(__v4sf)
				2769	_mm_setzero_ps (),
				2770	(__mmask8) __U);
				2771	}
				2772
				2773	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2774	_mm256_cvtepu32_ps (__m256i __A) {
				2775	return (__m256) __builtin_ia32_cvtudq2ps256_mask ((__v8si) __A,
				2776	(__v8sf)
				2777	_mm256_setzero_ps (),
				2778	(__mmask8) -1);
				2779	}
				2780
				2781	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2782	_mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
				2783	return (__m256) __builtin_ia32_cvtudq2ps256_mask ((__v8si) __A,
				2784	(__v8sf) __W,
				2785	(__mmask8) __U);
				2786	}
				2787
				2788	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2789	_mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) {
				2790	return (__m256) __builtin_ia32_cvtudq2ps256_mask ((__v8si) __A,
				2791	(__v8sf)
				2792	_mm256_setzero_ps (),
				2793	(__mmask8) __U);
				2794	}
				2795
Asaf Badouh	78ee5cc	2015-07-28 10:30:56 +0000	[diff] [blame]	2796	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2797	_mm_mask_div_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
				2798	return (__m128d) __builtin_ia32_divpd_mask ((__v2df) __A,
				2799	(__v2df) __B,
				2800	(__v2df) __W,
				2801	(__mmask8) __U);
				2802	}
				2803
				2804	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2805	_mm_maskz_div_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				2806	return (__m128d) __builtin_ia32_divpd_mask ((__v2df) __A,
				2807	(__v2df) __B,
				2808	(__v2df)
				2809	_mm_setzero_pd (),
				2810	(__mmask8) __U);
				2811	}
				2812
				2813	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2814	_mm256_mask_div_pd (__m256d __W, __mmask8 __U, __m256d __A,
				2815	__m256d __B) {
				2816	return (__m256d) __builtin_ia32_divpd256_mask ((__v4df) __A,
				2817	(__v4df) __B,
				2818	(__v4df) __W,
				2819	(__mmask8) __U);
				2820	}
				2821
				2822	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2823	_mm256_maskz_div_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				2824	return (__m256d) __builtin_ia32_divpd256_mask ((__v4df) __A,
				2825	(__v4df) __B,
				2826	(__v4df)
				2827	_mm256_setzero_pd (),
				2828	(__mmask8) __U);
				2829	}
				2830
				2831	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2832	_mm_mask_div_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
				2833	return (__m128) __builtin_ia32_divps_mask ((__v4sf) __A,
				2834	(__v4sf) __B,
				2835	(__v4sf) __W,
				2836	(__mmask8) __U);
				2837	}
				2838
				2839	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2840	_mm_maskz_div_ps (__mmask8 __U, __m128 __A, __m128 __B) {
				2841	return (__m128) __builtin_ia32_divps_mask ((__v4sf) __A,
				2842	(__v4sf) __B,
				2843	(__v4sf)
				2844	_mm_setzero_ps (),
				2845	(__mmask8) __U);
				2846	}
				2847
				2848	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2849	_mm256_mask_div_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
				2850	return (__m256) __builtin_ia32_divps256_mask ((__v8sf) __A,
				2851	(__v8sf) __B,
				2852	(__v8sf) __W,
				2853	(__mmask8) __U);
				2854	}
				2855
				2856	static __inline__ __m256 __DEFAULT_FN_ATTRS
				2857	_mm256_maskz_div_ps (__mmask8 __U, __m256 __A, __m256 __B) {
				2858	return (__m256) __builtin_ia32_divps256_mask ((__v8sf) __A,
				2859	(__v8sf) __B,
				2860	(__v8sf)
				2861	_mm256_setzero_ps (),
				2862	(__mmask8) __U);
				2863	}
				2864
				2865	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2866	_mm_mask_expand_pd (__m128d __W, __mmask8 __U, __m128d __A) {
				2867	return (__m128d) __builtin_ia32_expanddf128_mask ((__v2df) __A,
				2868	(__v2df) __W,
				2869	(__mmask8) __U);
				2870	}
				2871
				2872	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2873	_mm_maskz_expand_pd (__mmask8 __U, __m128d __A) {
				2874	return (__m128d) __builtin_ia32_expanddf128_mask ((__v2df) __A,
				2875	(__v2df)
				2876	_mm_setzero_pd (),
				2877	(__mmask8) __U);
				2878	}
				2879
				2880	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2881	_mm256_mask_expand_pd (__m256d __W, __mmask8 __U, __m256d __A) {
				2882	return (__m256d) __builtin_ia32_expanddf256_mask ((__v4df) __A,
				2883	(__v4df) __W,
				2884	(__mmask8) __U);
				2885	}
				2886
				2887	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2888	_mm256_maskz_expand_pd (__mmask8 __U, __m256d __A) {
				2889	return (__m256d) __builtin_ia32_expanddf256_mask ((__v4df) __A,
				2890	(__v4df)
				2891	_mm256_setzero_pd (),
				2892	(__mmask8) __U);
				2893	}
				2894
				2895	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2896	_mm_mask_expand_epi64 (__m128i __W, __mmask8 __U, __m128i __A) {
				2897	return (__m128i) __builtin_ia32_expanddi128_mask ((__v2di) __A,
				2898	(__v2di) __W,
				2899	(__mmask8) __U);
				2900	}
				2901
				2902	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2903	_mm_maskz_expand_epi64 (__mmask8 __U, __m128i __A) {
				2904	return (__m128i) __builtin_ia32_expanddi128_mask ((__v2di) __A,
				2905	(__v2di)
				2906	_mm_setzero_si128 (),
				2907	(__mmask8) __U);
				2908	}
				2909
				2910	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2911	_mm256_mask_expand_epi64 (__m256i __W, __mmask8 __U, __m256i __A) {
				2912	return (__m256i) __builtin_ia32_expanddi256_mask ((__v4di) __A,
				2913	(__v4di) __W,
				2914	(__mmask8) __U);
				2915	}
				2916
				2917	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2918	_mm256_maskz_expand_epi64 (__mmask8 __U, __m256i __A) {
				2919	return (__m256i) __builtin_ia32_expanddi256_mask ((__v4di) __A,
				2920	(__v4di)
				2921	_mm256_setzero_si256 (),
				2922	(__mmask8) __U);
				2923	}
				2924
				2925	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2926	_mm_mask_expandloadu_pd (__m128d __W, __mmask8 __U, void const *__P) {
				2927	return (__m128d) __builtin_ia32_expandloaddf128_mask ((__v2df *) __P,
				2928	(__v2df) __W,
				2929	(__mmask8)
				2930	__U);
				2931	}
				2932
				2933	static __inline__ __m128d __DEFAULT_FN_ATTRS
				2934	_mm_maskz_expandloadu_pd (__mmask8 __U, void const *__P) {
				2935	return (__m128d) __builtin_ia32_expandloaddf128_mask ((__v2df *) __P,
				2936	(__v2df)
				2937	_mm_setzero_pd (),
				2938	(__mmask8)
				2939	__U);
				2940	}
				2941
				2942	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2943	_mm256_mask_expandloadu_pd (__m256d __W, __mmask8 __U, void const *__P) {
				2944	return (__m256d) __builtin_ia32_expandloaddf256_mask ((__v4df *) __P,
				2945	(__v4df) __W,
				2946	(__mmask8)
				2947	__U);
				2948	}
				2949
				2950	static __inline__ __m256d __DEFAULT_FN_ATTRS
				2951	_mm256_maskz_expandloadu_pd (__mmask8 __U, void const *__P) {
				2952	return (__m256d) __builtin_ia32_expandloaddf256_mask ((__v4df *) __P,
				2953	(__v4df)
				2954	_mm256_setzero_pd (),
				2955	(__mmask8)
				2956	__U);
				2957	}
				2958
				2959	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2960	_mm_mask_expandloadu_epi64 (__m128i __W, __mmask8 __U, void const *__P) {
				2961	return (__m128i) __builtin_ia32_expandloaddi128_mask ((__v2di *) __P,
				2962	(__v2di) __W,
				2963	(__mmask8)
				2964	__U);
				2965	}
				2966
				2967	static __inline__ __m128i __DEFAULT_FN_ATTRS
				2968	_mm_maskz_expandloadu_epi64 (__mmask8 __U, void const *__P) {
				2969	return (__m128i) __builtin_ia32_expandloaddi128_mask ((__v2di *) __P,
				2970	(__v2di)
				2971	_mm_setzero_si128 (),
				2972	(__mmask8)
				2973	__U);
				2974	}
				2975
				2976	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2977	_mm256_mask_expandloadu_epi64 (__m256i __W, __mmask8 __U,
				2978	void const *__P) {
				2979	return (__m256i) __builtin_ia32_expandloaddi256_mask ((__v4di *) __P,
				2980	(__v4di) __W,
				2981	(__mmask8)
				2982	__U);
				2983	}
				2984
				2985	static __inline__ __m256i __DEFAULT_FN_ATTRS
				2986	_mm256_maskz_expandloadu_epi64 (__mmask8 __U, void const *__P) {
				2987	return (__m256i) __builtin_ia32_expandloaddi256_mask ((__v4di *) __P,
				2988	(__v4di)
				2989	_mm256_setzero_si256 (),
				2990	(__mmask8)
				2991	__U);
				2992	}
				2993
				2994	static __inline__ __m128 __DEFAULT_FN_ATTRS
				2995	_mm_mask_expandloadu_ps (__m128 __W, __mmask8 __U, void const *__P) {
				2996	return (__m128) __builtin_ia32_expandloadsf128_mask ((__v4sf *) __P,
				2997	(__v4sf) __W,
				2998	(__mmask8) __U);
				2999	}
				3000
				3001	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3002	_mm_maskz_expandloadu_ps (__mmask8 __U, void const *__P) {
				3003	return (__m128) __builtin_ia32_expandloadsf128_mask ((__v4sf *) __P,
				3004	(__v4sf)
				3005	_mm_setzero_ps (),
				3006	(__mmask8)
				3007	__U);
				3008	}
				3009
				3010	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3011	_mm256_mask_expandloadu_ps (__m256 __W, __mmask8 __U, void const *__P) {
				3012	return (__m256) __builtin_ia32_expandloadsf256_mask ((__v8sf *) __P,
				3013	(__v8sf) __W,
				3014	(__mmask8) __U);
				3015	}
				3016
				3017	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3018	_mm256_maskz_expandloadu_ps (__mmask8 __U, void const *__P) {
				3019	return (__m256) __builtin_ia32_expandloadsf256_mask ((__v8sf *) __P,
				3020	(__v8sf)
				3021	_mm256_setzero_ps (),
				3022	(__mmask8)
				3023	__U);
				3024	}
				3025
				3026	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3027	_mm_mask_expandloadu_epi32 (__m128i __W, __mmask8 __U, void const *__P) {
				3028	return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P,
				3029	(__v4si) __W,
				3030	(__mmask8)
				3031	__U);
				3032	}
				3033
				3034	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3035	_mm_maskz_expandloadu_epi32 (__mmask8 __U, void const *__P) {
				3036	return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P,
				3037	(__v4si)
				3038	_mm_setzero_si128 (),
				3039	(__mmask8) __U);
				3040	}
				3041
				3042	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3043	_mm256_mask_expandloadu_epi32 (__m256i __W, __mmask8 __U,
				3044	void const *__P) {
				3045	return (__m256i) __builtin_ia32_expandloadsi256_mask ((__v8si *) __P,
				3046	(__v8si) __W,
				3047	(__mmask8)
				3048	__U);
				3049	}
				3050
				3051	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3052	_mm256_maskz_expandloadu_epi32 (__mmask8 __U, void const *__P) {
				3053	return (__m256i) __builtin_ia32_expandloadsi256_mask ((__v8si *) __P,
				3054	(__v8si)
				3055	_mm256_setzero_si256 (),
				3056	(__mmask8)
				3057	__U);
				3058	}
				3059
				3060	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3061	_mm_mask_expand_ps (__m128 __W, __mmask8 __U, __m128 __A) {
				3062	return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A,
				3063	(__v4sf) __W,
				3064	(__mmask8) __U);
				3065	}
				3066
				3067	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3068	_mm_maskz_expand_ps (__mmask8 __U, __m128 __A) {
				3069	return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A,
				3070	(__v4sf)
				3071	_mm_setzero_ps (),
				3072	(__mmask8) __U);
				3073	}
				3074
				3075	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3076	_mm256_mask_expand_ps (__m256 __W, __mmask8 __U, __m256 __A) {
				3077	return (__m256) __builtin_ia32_expandsf256_mask ((__v8sf) __A,
				3078	(__v8sf) __W,
				3079	(__mmask8) __U);
				3080	}
				3081
				3082	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3083	_mm256_maskz_expand_ps (__mmask8 __U, __m256 __A) {
				3084	return (__m256) __builtin_ia32_expandsf256_mask ((__v8sf) __A,
				3085	(__v8sf)
				3086	_mm256_setzero_ps (),
				3087	(__mmask8) __U);
				3088	}
				3089
				3090	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3091	_mm_mask_expand_epi32 (__m128i __W, __mmask8 __U, __m128i __A) {
				3092	return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,
				3093	(__v4si) __W,
				3094	(__mmask8) __U);
				3095	}
				3096
				3097	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3098	_mm_maskz_expand_epi32 (__mmask8 __U, __m128i __A) {
				3099	return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,
				3100	(__v4si)
				3101	_mm_setzero_si128 (),
				3102	(__mmask8) __U);
				3103	}
				3104
				3105	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3106	_mm256_mask_expand_epi32 (__m256i __W, __mmask8 __U, __m256i __A) {
				3107	return (__m256i) __builtin_ia32_expandsi256_mask ((__v8si) __A,
				3108	(__v8si) __W,
				3109	(__mmask8) __U);
				3110	}
				3111
				3112	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3113	_mm256_maskz_expand_epi32 (__mmask8 __U, __m256i __A) {
				3114	return (__m256i) __builtin_ia32_expandsi256_mask ((__v8si) __A,
				3115	(__v8si)
				3116	_mm256_setzero_si256 (),
				3117	(__mmask8) __U);
				3118	}
				3119
				3120	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3121	_mm_getexp_pd (__m128d __A) {
				3122	return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A,
				3123	(__v2df)
				3124	_mm_setzero_pd (),
				3125	(__mmask8) -1);
				3126	}
				3127
				3128	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3129	_mm_mask_getexp_pd (__m128d __W, __mmask8 __U, __m128d __A) {
				3130	return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A,
				3131	(__v2df) __W,
				3132	(__mmask8) __U);
				3133	}
				3134
				3135	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3136	_mm_maskz_getexp_pd (__mmask8 __U, __m128d __A) {
				3137	return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A,
				3138	(__v2df)
				3139	_mm_setzero_pd (),
				3140	(__mmask8) __U);
				3141	}
				3142
				3143	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3144	_mm256_getexp_pd (__m256d __A) {
				3145	return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A,
				3146	(__v4df)
				3147	_mm256_setzero_pd (),
				3148	(__mmask8) -1);
				3149	}
				3150
				3151	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3152	_mm256_mask_getexp_pd (__m256d __W, __mmask8 __U, __m256d __A) {
				3153	return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A,
				3154	(__v4df) __W,
				3155	(__mmask8) __U);
				3156	}
				3157
				3158	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3159	_mm256_maskz_getexp_pd (__mmask8 __U, __m256d __A) {
				3160	return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A,
				3161	(__v4df)
				3162	_mm256_setzero_pd (),
				3163	(__mmask8) __U);
				3164	}
				3165
				3166	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3167	_mm_getexp_ps (__m128 __A) {
				3168	return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
				3169	(__v4sf)
				3170	_mm_setzero_ps (),
				3171	(__mmask8) -1);
				3172	}
				3173
				3174	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3175	_mm_mask_getexp_ps (__m128 __W, __mmask8 __U, __m128 __A) {
				3176	return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
				3177	(__v4sf) __W,
				3178	(__mmask8) __U);
				3179	}
				3180
				3181	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3182	_mm_maskz_getexp_ps (__mmask8 __U, __m128 __A) {
				3183	return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
				3184	(__v4sf)
				3185	_mm_setzero_ps (),
				3186	(__mmask8) __U);
				3187	}
				3188
				3189	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3190	_mm256_getexp_ps (__m256 __A) {
				3191	return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A,
				3192	(__v8sf)
				3193	_mm256_setzero_ps (),
				3194	(__mmask8) -1);
				3195	}
				3196
				3197	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3198	_mm256_mask_getexp_ps (__m256 __W, __mmask8 __U, __m256 __A) {
				3199	return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A,
				3200	(__v8sf) __W,
				3201	(__mmask8) __U);
				3202	}
				3203
				3204	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3205	_mm256_maskz_getexp_ps (__mmask8 __U, __m256 __A) {
				3206	return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A,
				3207	(__v8sf)
				3208	_mm256_setzero_ps (),
				3209	(__mmask8) __U);
				3210	}
				3211
				3212	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3213	_mm_mask_max_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
				3214	return (__m128d) __builtin_ia32_maxpd_mask ((__v2df) __A,
				3215	(__v2df) __B,
				3216	(__v2df) __W,
				3217	(__mmask8) __U);
				3218	}
				3219
				3220	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3221	_mm_maskz_max_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				3222	return (__m128d) __builtin_ia32_maxpd_mask ((__v2df) __A,
				3223	(__v2df) __B,
				3224	(__v2df)
				3225	_mm_setzero_pd (),
				3226	(__mmask8) __U);
				3227	}
				3228
				3229	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3230	_mm256_mask_max_pd (__m256d __W, __mmask8 __U, __m256d __A,
				3231	__m256d __B) {
				3232	return (__m256d) __builtin_ia32_maxpd256_mask ((__v4df) __A,
				3233	(__v4df) __B,
				3234	(__v4df) __W,
				3235	(__mmask8) __U);
				3236	}
				3237
				3238	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3239	_mm256_maskz_max_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				3240	return (__m256d) __builtin_ia32_maxpd256_mask ((__v4df) __A,
				3241	(__v4df) __B,
				3242	(__v4df)
				3243	_mm256_setzero_pd (),
				3244	(__mmask8) __U);
				3245	}
				3246
				3247	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3248	_mm_mask_max_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
				3249	return (__m128) __builtin_ia32_maxps_mask ((__v4sf) __A,
				3250	(__v4sf) __B,
				3251	(__v4sf) __W,
				3252	(__mmask8) __U);
				3253	}
				3254
				3255	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3256	_mm_maskz_max_ps (__mmask8 __U, __m128 __A, __m128 __B) {
				3257	return (__m128) __builtin_ia32_maxps_mask ((__v4sf) __A,
				3258	(__v4sf) __B,
				3259	(__v4sf)
				3260	_mm_setzero_ps (),
				3261	(__mmask8) __U);
				3262	}
				3263
				3264	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3265	_mm256_mask_max_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
				3266	return (__m256) __builtin_ia32_maxps256_mask ((__v8sf) __A,
				3267	(__v8sf) __B,
				3268	(__v8sf) __W,
				3269	(__mmask8) __U);
				3270	}
				3271
				3272	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3273	_mm256_maskz_max_ps (__mmask8 __U, __m256 __A, __m256 __B) {
				3274	return (__m256) __builtin_ia32_maxps256_mask ((__v8sf) __A,
				3275	(__v8sf) __B,
				3276	(__v8sf)
				3277	_mm256_setzero_ps (),
				3278	(__mmask8) __U);
				3279	}
				3280
				3281	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3282	_mm_mask_min_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
				3283	return (__m128d) __builtin_ia32_minpd_mask ((__v2df) __A,
				3284	(__v2df) __B,
				3285	(__v2df) __W,
				3286	(__mmask8) __U);
				3287	}
				3288
				3289	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3290	_mm_maskz_min_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				3291	return (__m128d) __builtin_ia32_minpd_mask ((__v2df) __A,
				3292	(__v2df) __B,
				3293	(__v2df)
				3294	_mm_setzero_pd (),
				3295	(__mmask8) __U);
				3296	}
				3297
				3298	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3299	_mm256_mask_min_pd (__m256d __W, __mmask8 __U, __m256d __A,
				3300	__m256d __B) {
				3301	return (__m256d) __builtin_ia32_minpd256_mask ((__v4df) __A,
				3302	(__v4df) __B,
				3303	(__v4df) __W,
				3304	(__mmask8) __U);
				3305	}
				3306
				3307	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3308	_mm256_maskz_min_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				3309	return (__m256d) __builtin_ia32_minpd256_mask ((__v4df) __A,
				3310	(__v4df) __B,
				3311	(__v4df)
				3312	_mm256_setzero_pd (),
				3313	(__mmask8) __U);
				3314	}
				3315
				3316	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3317	_mm_mask_min_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
				3318	return (__m128) __builtin_ia32_minps_mask ((__v4sf) __A,
				3319	(__v4sf) __B,
				3320	(__v4sf) __W,
				3321	(__mmask8) __U);
				3322	}
				3323
				3324	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3325	_mm_maskz_min_ps (__mmask8 __U, __m128 __A, __m128 __B) {
				3326	return (__m128) __builtin_ia32_minps_mask ((__v4sf) __A,
				3327	(__v4sf) __B,
				3328	(__v4sf)
				3329	_mm_setzero_ps (),
				3330	(__mmask8) __U);
				3331	}
				3332
				3333	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3334	_mm256_mask_min_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
				3335	return (__m256) __builtin_ia32_minps256_mask ((__v8sf) __A,
				3336	(__v8sf) __B,
				3337	(__v8sf) __W,
				3338	(__mmask8) __U);
				3339	}
				3340
				3341	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3342	_mm256_maskz_min_ps (__mmask8 __U, __m256 __A, __m256 __B) {
				3343	return (__m256) __builtin_ia32_minps256_mask ((__v8sf) __A,
				3344	(__v8sf) __B,
				3345	(__v8sf)
				3346	_mm256_setzero_ps (),
				3347	(__mmask8) __U);
				3348	}
				3349
				3350	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3351	_mm_mask_mul_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
				3352	return (__m128d) __builtin_ia32_mulpd_mask ((__v2df) __A,
				3353	(__v2df) __B,
				3354	(__v2df) __W,
				3355	(__mmask8) __U);
				3356	}
				3357
				3358	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3359	_mm_maskz_mul_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				3360	return (__m128d) __builtin_ia32_mulpd_mask ((__v2df) __A,
				3361	(__v2df) __B,
				3362	(__v2df)
				3363	_mm_setzero_pd (),
				3364	(__mmask8) __U);
				3365	}
				3366
				3367	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3368	_mm256_mask_mul_pd (__m256d __W, __mmask8 __U, __m256d __A,
				3369	__m256d __B) {
				3370	return (__m256d) __builtin_ia32_mulpd256_mask ((__v4df) __A,
				3371	(__v4df) __B,
				3372	(__v4df) __W,
				3373	(__mmask8) __U);
				3374	}
				3375
				3376	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3377	_mm256_maskz_mul_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				3378	return (__m256d) __builtin_ia32_mulpd256_mask ((__v4df) __A,
				3379	(__v4df) __B,
				3380	(__v4df)
				3381	_mm256_setzero_pd (),
				3382	(__mmask8) __U);
				3383	}
				3384
				3385	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3386	_mm_mask_mul_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
				3387	return (__m128) __builtin_ia32_mulps_mask ((__v4sf) __A,
				3388	(__v4sf) __B,
				3389	(__v4sf) __W,
				3390	(__mmask8) __U);
				3391	}
				3392
				3393	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3394	_mm_maskz_mul_ps (__mmask8 __U, __m128 __A, __m128 __B) {
				3395	return (__m128) __builtin_ia32_mulps_mask ((__v4sf) __A,
				3396	(__v4sf) __B,
				3397	(__v4sf)
				3398	_mm_setzero_ps (),
				3399	(__mmask8) __U);
				3400	}
				3401
				3402	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3403	_mm256_mask_mul_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
				3404	return (__m256) __builtin_ia32_mulps256_mask ((__v8sf) __A,
				3405	(__v8sf) __B,
				3406	(__v8sf) __W,
				3407	(__mmask8) __U);
				3408	}
				3409
				3410	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3411	_mm256_maskz_mul_ps (__mmask8 __U, __m256 __A, __m256 __B) {
				3412	return (__m256) __builtin_ia32_mulps256_mask ((__v8sf) __A,
				3413	(__v8sf) __B,
				3414	(__v8sf)
				3415	_mm256_setzero_ps (),
				3416	(__mmask8) __U);
				3417	}
				3418
				3419	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3420	_mm_mask_abs_epi32 (__m128i __W, __mmask8 __U, __m128i __A) {
				3421	return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A,
				3422	(__v4si) __W,
				3423	(__mmask8) __U);
				3424	}
				3425
				3426	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3427	_mm_maskz_abs_epi32 (__mmask8 __U, __m128i __A) {
				3428	return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A,
				3429	(__v4si)
				3430	_mm_setzero_si128 (),
				3431	(__mmask8) __U);
				3432	}
				3433
				3434	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3435	_mm256_mask_abs_epi32 (__m256i __W, __mmask8 __U, __m256i __A) {
				3436	return (__m256i) __builtin_ia32_pabsd256_mask ((__v8si) __A,
				3437	(__v8si) __W,
				3438	(__mmask8) __U);
				3439	}
				3440
				3441	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3442	_mm256_maskz_abs_epi32 (__mmask8 __U, __m256i __A) {
				3443	return (__m256i) __builtin_ia32_pabsd256_mask ((__v8si) __A,
				3444	(__v8si)
				3445	_mm256_setzero_si256 (),
				3446	(__mmask8) __U);
				3447	}
				3448
				3449	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3450	_mm_abs_epi64 (__m128i __A) {
				3451	return (__m128i) __builtin_ia32_pabsq128_mask ((__v2di) __A,
				3452	(__v2di)
				3453	_mm_setzero_si128 (),
				3454	(__mmask8) -1);
				3455	}
				3456
				3457	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3458	_mm_mask_abs_epi64 (__m128i __W, __mmask8 __U, __m128i __A) {
				3459	return (__m128i) __builtin_ia32_pabsq128_mask ((__v2di) __A,
				3460	(__v2di) __W,
				3461	(__mmask8) __U);
				3462	}
				3463
				3464	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3465	_mm_maskz_abs_epi64 (__mmask8 __U, __m128i __A) {
				3466	return (__m128i) __builtin_ia32_pabsq128_mask ((__v2di) __A,
				3467	(__v2di)
				3468	_mm_setzero_si128 (),
				3469	(__mmask8) __U);
				3470	}
				3471
				3472	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3473	_mm256_abs_epi64 (__m256i __A) {
				3474	return (__m256i) __builtin_ia32_pabsq256_mask ((__v4di) __A,
				3475	(__v4di)
				3476	_mm256_setzero_si256 (),
				3477	(__mmask8) -1);
				3478	}
				3479
				3480	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3481	_mm256_mask_abs_epi64 (__m256i __W, __mmask8 __U, __m256i __A) {
				3482	return (__m256i) __builtin_ia32_pabsq256_mask ((__v4di) __A,
				3483	(__v4di) __W,
				3484	(__mmask8) __U);
				3485	}
				3486
				3487	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3488	_mm256_maskz_abs_epi64 (__mmask8 __U, __m256i __A) {
				3489	return (__m256i) __builtin_ia32_pabsq256_mask ((__v4di) __A,
				3490	(__v4di)
				3491	_mm256_setzero_si256 (),
				3492	(__mmask8) __U);
				3493	}
				3494
Asaf Badouh	b7cf71b	2015-07-28 11:14:09 +0000	[diff] [blame]	3495	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3496	_mm_maskz_max_epi32 (__mmask8 __M, __m128i __A, __m128i __B) {
				3497	return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A,
				3498	(__v4si) __B,
				3499	(__v4si)
				3500	_mm_setzero_si128 (),
				3501	__M);
				3502	}
				3503
				3504	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3505	_mm_mask_max_epi32 (__m128i __W, __mmask8 __M, __m128i __A,
				3506	__m128i __B) {
				3507	return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A,
				3508	(__v4si) __B,
				3509	(__v4si) __W, __M);
				3510	}
				3511
				3512	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3513	_mm256_maskz_max_epi32 (__mmask8 __M, __m256i __A, __m256i __B) {
				3514	return (__m256i) __builtin_ia32_pmaxsd256_mask ((__v8si) __A,
				3515	(__v8si) __B,
				3516	(__v8si)
				3517	_mm256_setzero_si256 (),
				3518	__M);
				3519	}
				3520
				3521	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3522	_mm256_mask_max_epi32 (__m256i __W, __mmask8 __M, __m256i __A,
				3523	__m256i __B) {
				3524	return (__m256i) __builtin_ia32_pmaxsd256_mask ((__v8si) __A,
				3525	(__v8si) __B,
				3526	(__v8si) __W, __M);
				3527	}
				3528
				3529	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3530	_mm_maskz_max_epi64 (__mmask8 __M, __m128i __A, __m128i __B) {
				3531	return (__m128i) __builtin_ia32_pmaxsq128_mask ((__v2di) __A,
				3532	(__v2di) __B,
				3533	(__v2di)
				3534	_mm_setzero_si128 (),
				3535	__M);
				3536	}
				3537
				3538	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3539	_mm_mask_max_epi64 (__m128i __W, __mmask8 __M, __m128i __A,
				3540	__m128i __B) {
				3541	return (__m128i) __builtin_ia32_pmaxsq128_mask ((__v2di) __A,
				3542	(__v2di) __B,
				3543	(__v2di) __W, __M);
				3544	}
				3545
				3546	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3547	_mm_max_epi64 (__m128i __A, __m128i __B) {
				3548	return (__m128i) __builtin_ia32_pmaxsq128_mask ((__v2di) __A,
				3549	(__v2di) __B,
				3550	(__v2di)
				3551	_mm_setzero_si128 (),
				3552	(__mmask8) -1);
				3553	}
				3554
				3555	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3556	_mm256_maskz_max_epi64 (__mmask8 __M, __m256i __A, __m256i __B) {
				3557	return (__m256i) __builtin_ia32_pmaxsq256_mask ((__v4di) __A,
				3558	(__v4di) __B,
				3559	(__v4di)
				3560	_mm256_setzero_si256 (),
				3561	__M);
				3562	}
				3563
				3564	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3565	_mm256_mask_max_epi64 (__m256i __W, __mmask8 __M, __m256i __A,
				3566	__m256i __B) {
				3567	return (__m256i) __builtin_ia32_pmaxsq256_mask ((__v4di) __A,
				3568	(__v4di) __B,
				3569	(__v4di) __W, __M);
				3570	}
				3571
				3572	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3573	_mm256_max_epi64 (__m256i __A, __m256i __B) {
				3574	return (__m256i) __builtin_ia32_pmaxsq256_mask ((__v4di) __A,
				3575	(__v4di) __B,
				3576	(__v4di)
				3577	_mm256_setzero_si256 (),
				3578	(__mmask8) -1);
				3579	}
				3580
				3581	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3582	_mm_maskz_max_epu32 (__mmask8 __M, __m128i __A, __m128i __B) {
				3583	return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A,
				3584	(__v4si) __B,
				3585	(__v4si)
				3586	_mm_setzero_si128 (),
				3587	__M);
				3588	}
				3589
				3590	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3591	_mm_mask_max_epu32 (__m128i __W, __mmask8 __M, __m128i __A,
				3592	__m128i __B) {
				3593	return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A,
				3594	(__v4si) __B,
				3595	(__v4si) __W, __M);
				3596	}
				3597
				3598	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3599	_mm256_maskz_max_epu32 (__mmask8 __M, __m256i __A, __m256i __B) {
				3600	return (__m256i) __builtin_ia32_pmaxud256_mask ((__v8si) __A,
				3601	(__v8si) __B,
				3602	(__v8si)
				3603	_mm256_setzero_si256 (),
				3604	__M);
				3605	}
				3606
				3607	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3608	_mm256_mask_max_epu32 (__m256i __W, __mmask8 __M, __m256i __A,
				3609	__m256i __B) {
				3610	return (__m256i) __builtin_ia32_pmaxud256_mask ((__v8si) __A,
				3611	(__v8si) __B,
				3612	(__v8si) __W, __M);
				3613	}
				3614
				3615	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3616	_mm_maskz_max_epu64 (__mmask8 __M, __m128i __A, __m128i __B) {
				3617	return (__m128i) __builtin_ia32_pmaxuq128_mask ((__v2di) __A,
				3618	(__v2di) __B,
				3619	(__v2di)
				3620	_mm_setzero_si128 (),
				3621	__M);
				3622	}
				3623
				3624	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3625	_mm_max_epu64 (__m128i __A, __m128i __B) {
				3626	return (__m128i) __builtin_ia32_pmaxuq128_mask ((__v2di) __A,
				3627	(__v2di) __B,
				3628	(__v2di)
				3629	_mm_setzero_si128 (),
				3630	(__mmask8) -1);
				3631	}
				3632
				3633	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3634	_mm_mask_max_epu64 (__m128i __W, __mmask8 __M, __m128i __A,
				3635	__m128i __B) {
				3636	return (__m128i) __builtin_ia32_pmaxuq128_mask ((__v2di) __A,
				3637	(__v2di) __B,
				3638	(__v2di) __W, __M);
				3639	}
				3640
				3641	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3642	_mm256_maskz_max_epu64 (__mmask8 __M, __m256i __A, __m256i __B) {
				3643	return (__m256i) __builtin_ia32_pmaxuq256_mask ((__v4di) __A,
				3644	(__v4di) __B,
				3645	(__v4di)
				3646	_mm256_setzero_si256 (),
				3647	__M);
				3648	}
				3649
				3650	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3651	_mm256_max_epu64 (__m256i __A, __m256i __B) {
				3652	return (__m256i) __builtin_ia32_pmaxuq256_mask ((__v4di) __A,
				3653	(__v4di) __B,
				3654	(__v4di)
				3655	_mm256_setzero_si256 (),
				3656	(__mmask8) -1);
				3657	}
				3658
				3659	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3660	_mm256_mask_max_epu64 (__m256i __W, __mmask8 __M, __m256i __A,
				3661	__m256i __B) {
				3662	return (__m256i) __builtin_ia32_pmaxuq256_mask ((__v4di) __A,
				3663	(__v4di) __B,
				3664	(__v4di) __W, __M);
				3665	}
				3666
				3667	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3668	_mm_maskz_min_epi32 (__mmask8 __M, __m128i __A, __m128i __B) {
				3669	return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A,
				3670	(__v4si) __B,
				3671	(__v4si)
				3672	_mm_setzero_si128 (),
				3673	__M);
				3674	}
				3675
				3676	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3677	_mm_mask_min_epi32 (__m128i __W, __mmask8 __M, __m128i __A,
				3678	__m128i __B) {
				3679	return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A,
				3680	(__v4si) __B,
				3681	(__v4si) __W, __M);
				3682	}
				3683
				3684	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3685	_mm256_maskz_min_epi32 (__mmask8 __M, __m256i __A, __m256i __B) {
				3686	return (__m256i) __builtin_ia32_pminsd256_mask ((__v8si) __A,
				3687	(__v8si) __B,
				3688	(__v8si)
				3689	_mm256_setzero_si256 (),
				3690	__M);
				3691	}
				3692
				3693	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3694	_mm256_mask_min_epi32 (__m256i __W, __mmask8 __M, __m256i __A,
				3695	__m256i __B) {
				3696	return (__m256i) __builtin_ia32_pminsd256_mask ((__v8si) __A,
				3697	(__v8si) __B,
				3698	(__v8si) __W, __M);
				3699	}
				3700
				3701	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3702	_mm_min_epi64 (__m128i __A, __m128i __B) {
				3703	return (__m128i) __builtin_ia32_pminsq128_mask ((__v2di) __A,
				3704	(__v2di) __B,
				3705	(__v2di)
				3706	_mm_setzero_si128 (),
				3707	(__mmask8) -1);
				3708	}
				3709
				3710	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3711	_mm_mask_min_epi64 (__m128i __W, __mmask8 __M, __m128i __A,
				3712	__m128i __B) {
				3713	return (__m128i) __builtin_ia32_pminsq128_mask ((__v2di) __A,
				3714	(__v2di) __B,
				3715	(__v2di) __W, __M);
				3716	}
				3717
				3718	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3719	_mm_maskz_min_epi64 (__mmask8 __M, __m128i __A, __m128i __B) {
				3720	return (__m128i) __builtin_ia32_pminsq128_mask ((__v2di) __A,
				3721	(__v2di) __B,
				3722	(__v2di)
				3723	_mm_setzero_si128 (),
				3724	__M);
				3725	}
				3726
				3727	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3728	_mm256_min_epi64 (__m256i __A, __m256i __B) {
				3729	return (__m256i) __builtin_ia32_pminsq256_mask ((__v4di) __A,
				3730	(__v4di) __B,
				3731	(__v4di)
				3732	_mm256_setzero_si256 (),
				3733	(__mmask8) -1);
				3734	}
				3735
				3736	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3737	_mm256_mask_min_epi64 (__m256i __W, __mmask8 __M, __m256i __A,
				3738	__m256i __B) {
				3739	return (__m256i) __builtin_ia32_pminsq256_mask ((__v4di) __A,
				3740	(__v4di) __B,
				3741	(__v4di) __W, __M);
				3742	}
				3743
				3744	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3745	_mm256_maskz_min_epi64 (__mmask8 __M, __m256i __A, __m256i __B) {
				3746	return (__m256i) __builtin_ia32_pminsq256_mask ((__v4di) __A,
				3747	(__v4di) __B,
				3748	(__v4di)
				3749	_mm256_setzero_si256 (),
				3750	__M);
				3751	}
				3752
				3753	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3754	_mm_maskz_min_epu32 (__mmask8 __M, __m128i __A, __m128i __B) {
				3755	return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A,
				3756	(__v4si) __B,
				3757	(__v4si)
				3758	_mm_setzero_si128 (),
				3759	__M);
				3760	}
				3761
				3762	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3763	_mm_mask_min_epu32 (__m128i __W, __mmask8 __M, __m128i __A,
				3764	__m128i __B) {
				3765	return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A,
				3766	(__v4si) __B,
				3767	(__v4si) __W, __M);
				3768	}
				3769
				3770	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3771	_mm256_maskz_min_epu32 (__mmask8 __M, __m256i __A, __m256i __B) {
				3772	return (__m256i) __builtin_ia32_pminud256_mask ((__v8si) __A,
				3773	(__v8si) __B,
				3774	(__v8si)
				3775	_mm256_setzero_si256 (),
				3776	__M);
				3777	}
				3778
				3779	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3780	_mm256_mask_min_epu32 (__m256i __W, __mmask8 __M, __m256i __A,
				3781	__m256i __B) {
				3782	return (__m256i) __builtin_ia32_pminud256_mask ((__v8si) __A,
				3783	(__v8si) __B,
				3784	(__v8si) __W, __M);
				3785	}
				3786
				3787	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3788	_mm_min_epu64 (__m128i __A, __m128i __B) {
				3789	return (__m128i) __builtin_ia32_pminuq128_mask ((__v2di) __A,
				3790	(__v2di) __B,
				3791	(__v2di)
				3792	_mm_setzero_si128 (),
				3793	(__mmask8) -1);
				3794	}
				3795
				3796	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3797	_mm_mask_min_epu64 (__m128i __W, __mmask8 __M, __m128i __A,
				3798	__m128i __B) {
				3799	return (__m128i) __builtin_ia32_pminuq128_mask ((__v2di) __A,
				3800	(__v2di) __B,
				3801	(__v2di) __W, __M);
				3802	}
				3803
				3804	static __inline__ __m128i __DEFAULT_FN_ATTRS
				3805	_mm_maskz_min_epu64 (__mmask8 __M, __m128i __A, __m128i __B) {
				3806	return (__m128i) __builtin_ia32_pminuq128_mask ((__v2di) __A,
				3807	(__v2di) __B,
				3808	(__v2di)
				3809	_mm_setzero_si128 (),
				3810	__M);
				3811	}
				3812
				3813	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3814	_mm256_min_epu64 (__m256i __A, __m256i __B) {
				3815	return (__m256i) __builtin_ia32_pminuq256_mask ((__v4di) __A,
				3816	(__v4di) __B,
				3817	(__v4di)
				3818	_mm256_setzero_si256 (),
				3819	(__mmask8) -1);
				3820	}
				3821
				3822	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3823	_mm256_mask_min_epu64 (__m256i __W, __mmask8 __M, __m256i __A,
				3824	__m256i __B) {
				3825	return (__m256i) __builtin_ia32_pminuq256_mask ((__v4di) __A,
				3826	(__v4di) __B,
				3827	(__v4di) __W, __M);
				3828	}
				3829
				3830	static __inline__ __m256i __DEFAULT_FN_ATTRS
				3831	_mm256_maskz_min_epu64 (__mmask8 __M, __m256i __A, __m256i __B) {
				3832	return (__m256i) __builtin_ia32_pminuq256_mask ((__v4di) __A,
				3833	(__v4di) __B,
				3834	(__v4di)
				3835	_mm256_setzero_si256 (),
				3836	__M);
				3837	}
				3838
				3839	#define _mm_roundscale_pd(__A, __imm) __extension__ ({ \
				3840	(__m128d) __builtin_ia32_rndscalepd_128_mask ((__v2df) __A, \
				3841	__imm, (__v2df) _mm_setzero_pd (), (__mmask8) -1); })
				3842
				3843
				3844	#define _mm_mask_roundscale_pd(__W, __U, __A, __imm) __extension__ ({ \
				3845	(__m128d) __builtin_ia32_rndscalepd_128_mask ((__v2df) __A, __imm, \
				3846	(__v2df) __W, (__mmask8) __U); })
				3847
				3848
				3849	#define _mm_maskz_roundscale_pd(__U, __A, __imm) __extension__ ({ \
				3850	(__m128d) __builtin_ia32_rndscalepd_128_mask ((__v2df) __A, __imm, \
				3851	(__v2df) _mm_setzero_pd (), (__mmask8) __U); })
				3852
				3853
				3854	#define _mm256_roundscale_pd(__A, __imm) __extension__ ({ \
				3855	(__m256d) __builtin_ia32_rndscalepd_256_mask ((__v4df) __A, __imm, \
				3856	(__v4df) _mm256_setzero_pd (), (__mmask8) -1); })
				3857
				3858
				3859	#define _mm256_mask_roundscale_pd(__W, __U, __A, __imm) __extension__ ({ \
				3860	(__m256d) __builtin_ia32_rndscalepd_256_mask ((__v4df) __A, __imm, \
				3861	(__v4df) __W, (__mmask8) __U); })
				3862
				3863
				3864	#define _mm256_maskz_roundscale_pd(__U, __A, __imm) __extension__ ({ \
				3865	(__m256d) __builtin_ia32_rndscalepd_256_mask ((__v4df) __A, __imm, \
				3866	(__v4df) _mm256_setzero_pd(), (__mmask8) __U); })
				3867
				3868	#define _mm_roundscale_ps(__A, __imm) __extension__ ({ \
				3869	(__m128) __builtin_ia32_rndscaleps_128_mask ((__v4sf) __A, __imm, \
				3870	(__v4sf) _mm_setzero_ps(), (__mmask8) -1); })
				3871
				3872
				3873	#define _mm_mask_roundscale_ps(__W, __U, __A, __imm) __extension__ ({ \
				3874	(__m128) __builtin_ia32_rndscaleps_128_mask ((__v4sf) __A, __imm, \
				3875	(__v4sf) __W, (__mmask8) __U); })
				3876
				3877
				3878	#define _mm_maskz_roundscale_ps(__U, __A, __imm) __extension__ ({ \
				3879	(__m128) __builtin_ia32_rndscaleps_128_mask ((__v4sf) __A, __imm, \
				3880	(__v4sf) _mm_setzero_ps(), (__mmask8) __U); })
				3881
				3882	#define _mm256_roundscale_ps(__A, __imm) __extension__ ({ \
				3883	(__m256) __builtin_ia32_rndscaleps_256_mask ((__v8sf) __A,__imm, \
				3884	(__v8sf) _mm256_setzero_ps(), (__mmask8) -1); })
				3885
				3886	#define _mm256_mask_roundscale_ps(__W, __U, __A,__imm) __extension__ ({ \
				3887	(__m256) __builtin_ia32_rndscaleps_256_mask ((__v8sf) __A, __imm, \
				3888	(__v8sf) __W, (__mmask8) __U); })
				3889
				3890
				3891	#define _mm256_maskz_roundscale_ps(__U, __A, __imm) __extension__ ({ \
				3892	(__m256) __builtin_ia32_rndscaleps_256_mask ((__v8sf) __A, __imm, \
				3893	(__v8sf) _mm256_setzero_ps(), (__mmask8) __U); })
				3894
				3895	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3896	_mm_scalef_pd (__m128d __A, __m128d __B) {
				3897	return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A,
				3898	(__v2df) __B,
				3899	(__v2df)
				3900	_mm_setzero_pd (),
				3901	(__mmask8) -1);
				3902	}
				3903
				3904	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3905	_mm_mask_scalef_pd (__m128d __W, __mmask8 __U, __m128d __A,
				3906	__m128d __B) {
				3907	return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A,
				3908	(__v2df) __B,
				3909	(__v2df) __W,
				3910	(__mmask8) __U);
				3911	}
				3912
				3913	static __inline__ __m128d __DEFAULT_FN_ATTRS
				3914	_mm_maskz_scalef_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				3915	return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A,
				3916	(__v2df) __B,
				3917	(__v2df)
				3918	_mm_setzero_pd (),
				3919	(__mmask8) __U);
				3920	}
				3921
				3922	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3923	_mm256_scalef_pd (__m256d __A, __m256d __B) {
				3924	return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A,
				3925	(__v4df) __B,
				3926	(__v4df)
				3927	_mm256_setzero_pd (),
				3928	(__mmask8) -1);
				3929	}
				3930
				3931	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3932	_mm256_mask_scalef_pd (__m256d __W, __mmask8 __U, __m256d __A,
				3933	__m256d __B) {
				3934	return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A,
				3935	(__v4df) __B,
				3936	(__v4df) __W,
				3937	(__mmask8) __U);
				3938	}
				3939
				3940	static __inline__ __m256d __DEFAULT_FN_ATTRS
				3941	_mm256_maskz_scalef_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				3942	return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A,
				3943	(__v4df) __B,
				3944	(__v4df)
				3945	_mm256_setzero_pd (),
				3946	(__mmask8) __U);
				3947	}
				3948
				3949	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3950	_mm_scalef_ps (__m128 __A, __m128 __B) {
				3951	return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
				3952	(__v4sf) __B,
				3953	(__v4sf)
				3954	_mm_setzero_ps (),
				3955	(__mmask8) -1);
				3956	}
				3957
				3958	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3959	_mm_mask_scalef_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
				3960	return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
				3961	(__v4sf) __B,
				3962	(__v4sf) __W,
				3963	(__mmask8) __U);
				3964	}
				3965
				3966	static __inline__ __m128 __DEFAULT_FN_ATTRS
				3967	_mm_maskz_scalef_ps (__mmask8 __U, __m128 __A, __m128 __B) {
				3968	return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
				3969	(__v4sf) __B,
				3970	(__v4sf)
				3971	_mm_setzero_ps (),
				3972	(__mmask8) __U);
				3973	}
				3974
				3975	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3976	_mm256_scalef_ps (__m256 __A, __m256 __B) {
				3977	return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A,
				3978	(__v8sf) __B,
				3979	(__v8sf)
				3980	_mm256_setzero_ps (),
				3981	(__mmask8) -1);
				3982	}
				3983
				3984	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3985	_mm256_mask_scalef_ps (__m256 __W, __mmask8 __U, __m256 __A,
				3986	__m256 __B) {
				3987	return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A,
				3988	(__v8sf) __B,
				3989	(__v8sf) __W,
				3990	(__mmask8) __U);
				3991	}
				3992
				3993	static __inline__ __m256 __DEFAULT_FN_ATTRS
				3994	_mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
				3995	return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A,
				3996	(__v8sf) __B,
				3997	(__v8sf)
				3998	_mm256_setzero_ps (),
				3999	(__mmask8) __U);
				4000	}
				4001
				4002	#define _mm_i64scatter_pd(__addr,__index, __v1, __scale) __extension__ ({ \
				4003	__builtin_ia32_scatterdiv2df(__addr, (__mmask8) 0xFF, (__v2di) __index, \
				4004	(__v2df) __v1, __scale); })
				4005
				4006	#define _mm_mask_i64scatter_pd(__addr, __mask, __index, __v1, \
				4007	__scale) __extension__ ({ \
				4008	__builtin_ia32_scatterdiv2df (__addr, __mask, (__v2di) __index, \
				4009	(__v2df) __v1, __scale); })
				4010
				4011
				4012	#define _mm_i64scatter_epi64(__addr, __index, __v1, __scale) __extension__ ({ \
				4013	__builtin_ia32_scatterdiv2di (__addr, (__mmask8) 0xFF, \
				4014	(__v2di) __index, (__v2di) __v1, __scale); })
				4015
				4016	#define _mm_mask_i64scatter_epi64(__addr, __mask, __index, __v1,\
				4017	__scale) __extension__ ({ \
				4018	__builtin_ia32_scatterdiv2di (__addr, __mask, (__v2di) __index,\
				4019	(__v2di) __v1, __scale); })
				4020
				4021	#define _mm256_i64scatter_pd(__addr, __index, __v1, __scale) __extension__ ({ \
				4022	__builtin_ia32_scatterdiv4df (__addr, (__mmask8) 0xFF,\
				4023	(__v4di) __index, (__v4df) __v1, __scale); })
				4024
				4025	#define _mm256_mask_i64scatter_pd(__addr, __mask, __index, __v1,\
				4026	__scale) __extension__ ({ \
				4027	__builtin_ia32_scatterdiv4df (__addr, __mask, (__v4di) __index,\
				4028	(__v4df) __v1, __scale); })
				4029
				4030	#define _mm256_i64scatter_epi64(__addr, __index, __v1, __scale) __extension__ ({ \
				4031	__builtin_ia32_scatterdiv4di (__addr, (__mmask8) 0xFF, (__v4di) __index,\
				4032	(__v4di) __v1, __scale); })
				4033
				4034	#define _mm256_mask_i64scatter_epi64(__addr, __mask, __index, __v1,\
				4035	__scale) __extension__ ({ \
				4036	__builtin_ia32_scatterdiv4di (__addr, __mask, (__v4di) __index,\
				4037	(__v4di) __v1, __scale); })
				4038
				4039	#define _mm_i64scatter_ps(__addr, __index, __v1, __scale) __extension__ ({ \
				4040	__builtin_ia32_scatterdiv4sf (__addr, (__mmask8) 0xFF,\
				4041	(__v2di) __index, (__v4sf) __v1, __scale); })
				4042
				4043	#define _mm_mask_i64scatter_ps(__addr, __mask, __index, __v1, \
				4044	__scale) __extension__ ({ \
				4045	__builtin_ia32_scatterdiv4sf (__addr, __mask, (__v2di) __index,\
				4046	(__v4sf) __v1, __scale); })
				4047
				4048	#define _mm_i64scatter_epi32(__addr, __index, __v1, \
				4049	__scale) __extension__ ({ \
				4050	__builtin_ia32_scatterdiv4si (__addr, (__mmask8) 0xFF,\
				4051	(__v2di) __index, (__v4si) __v1, __scale); })
				4052
				4053	#define _mm_mask_i64scatter_epi32(__addr, __mask, __index, __v1,\
				4054	__scale) __extension__ ({ \
				4055	__builtin_ia32_scatterdiv4si (__addr, __mask, (__v2di) __index,\
				4056	(__v4si) __v1, __scale); })
				4057
				4058	#define _mm256_i64scatter_ps(__addr, __index, __v1, __scale) __extension__ ({ \
				4059	__builtin_ia32_scatterdiv8sf (__addr, (__mmask8) 0xFF, (__v4di) __index, \
				4060	(__v4sf) __v1, __scale); })
				4061
				4062	#define _mm256_mask_i64scatter_ps(__addr, __mask, __index, __v1, \
				4063	__scale) __extension__ ({ \
				4064	__builtin_ia32_scatterdiv8sf (__addr, __mask, (__v4di) __index, \
				4065	(__v4sf) __v1, __scale); })
				4066
				4067	#define _mm256_i64scatter_epi32(__addr, __index, __v1, __scale) __extension__ ({ \
				4068	__builtin_ia32_scatterdiv8si (__addr, (__mmask8) 0xFF, \
				4069	(__v4di) __index, (__v4si) __v1, __scale); })
				4070
				4071	#define _mm256_mask_i64scatter_epi32(__addr, __mask, __index, __v1, \
				4072	__scale) __extension__ ({ \
				4073	__builtin_ia32_scatterdiv8si(__addr, __mask, (__v4di) __index, \
				4074	(__v4si) __v1, __scale); })
				4075
				4076	#define _mm_i32scatter_pd(__addr, __index, __v1, \
				4077	__scale) __extension__ ({ \
				4078	__builtin_ia32_scattersiv2df (__addr, (__mmask8) 0xFF, \
				4079	(__v4si) __index, (__v2df) __v1, __scale); })
				4080
				4081	#define _mm_mask_i32scatter_pd(__addr, __mask, __index, __v1, \
				4082	__scale) __extension__ ({ \
				4083	__builtin_ia32_scattersiv2df (__addr, __mask, (__v4si) __index,\
				4084	(__v2df) __v1, __scale); })
				4085
				4086	#define _mm_i32scatter_epi64(__addr, __index, __v1, __scale) __extension__ ({ \
				4087	__builtin_ia32_scattersiv2di (__addr, (__mmask8) 0xFF, \
				4088	(__v4si) __index, (__v2di) __v1, __scale); })
				4089
				4090	#define _mm_mask_i32scatter_epi64(__addr, __mask, __index, __v1, \
				4091	__scale) __extension__ ({ \
				4092	__builtin_ia32_scattersiv2di (__addr, __mask, (__v4si) __index, \
				4093	(__v2di) __v1, __scale); })
				4094
				4095	#define _mm256_i32scatter_pd(__addr, __index, __v1, __scale) __extension__ ({ \
				4096	__builtin_ia32_scattersiv4df (__addr, (__mmask8) 0xFF, \
				4097	(__v4si) __index, (__v4df) __v1, __scale); })
				4098
				4099	#define _mm256_mask_i32scatter_pd(__addr, __mask, __index, __v1, \
				4100	__scale) __extension__ ({ \
				4101	__builtin_ia32_scattersiv4df (__addr, __mask, (__v4si) __index, \
				4102	(__v4df) __v1, __scale); })
				4103
				4104	#define _mm256_i32scatter_epi64(__addr, __index, __v1, \
				4105	__scale) __extension__ ({ \
				4106	__builtin_ia32_scattersiv4di (__addr, (__mmask8) 0xFF, \
				4107	(__v4si) __index, (__v4di) __v1, __scale); })
				4108
				4109	#define _mm256_mask_i32scatter_epi64(__addr, __mask, __index, __v1, \
				4110	__scale) __extension__ ({ \
				4111	__builtin_ia32_scattersiv4di (__addr, __mask, (__v4si) __index, \
				4112	(__v4di) __v1, __scale); })
				4113
				4114	#define _mm_i32scatter_ps(__addr, __index, __v1, __scale) __extension__ ({ \
				4115	__builtin_ia32_scattersiv4sf (__addr, (__mmask8) 0xFF, \
				4116	(__v4si) __index, (__v4sf) __v1, __scale); })
				4117
				4118	#define _mm_mask_i32scatter_ps(__addr, __mask, __index, __v1, \
				4119	__scale) __extension__ ({ \
				4120	__builtin_ia32_scattersiv4sf (__addr, __mask, (__v4si) __index, \
				4121	(__v4sf) __v1, __scale); })
				4122
				4123	#define _mm_i32scatter_epi32(__addr, __index, __v1, __scale) __extension__ ({ \
				4124	__builtin_ia32_scattersiv4si (__addr, (__mmask8) 0xFF, \
				4125	(__v4si) __index, (__v4si) __v1, __scale); })
				4126
				4127	#define _mm_mask_i32scatter_epi32(__addr, __mask, __index, __v1, \
				4128	__scale) __extension__ ({ \
				4129	__builtin_ia32_scattersiv4si (__addr, __mask, (__v4si) __index,\
				4130	(__v4si) __v1, __scale); })
				4131
				4132	#define _mm256_i32scatter_ps(__addr, __index, __v1, __scale) __extension__ ({ \
				4133	__builtin_ia32_scattersiv8sf (__addr, (__mmask8) 0xFF, \
				4134	(__v8si) __index, (__v8sf) __v1, __scale); })
				4135
				4136	#define _mm256_mask_i32scatter_ps(__addr, __mask, __index, __v1, \
				4137	__scale) __extension__ ({ \
				4138	__builtin_ia32_scattersiv8sf (__addr, __mask, (__v8si) __index,\
				4139	(__v8sf) __v1, __scale); })
				4140
				4141	#define _mm256_i32scatter_epi32(__addr, __index, __v1, __scale) __extension__ ({ \
				4142	__builtin_ia32_scattersiv8si (__addr, (__mmask8) 0xFF, \
				4143	(__v8si) __index, (__v8si) __v1, __scale); })
				4144
				4145	#define _mm256_mask_i32scatter_epi32(__addr, __mask, __index, __v1, \
				4146	__scale) __extension__ ({ \
				4147	__builtin_ia32_scattersiv8si (__addr, __mask, (__v8si) __index, \
				4148	(__v8si) __v1, __scale); })
				4149
Asaf Badouh	93aa4c8	2015-07-28 12:04:40 +0000	[diff] [blame^]	4150	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4151	_mm_mask_sqrt_pd (__m128d __W, __mmask8 __U, __m128d __A) {
				4152	return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
				4153	(__v2df) __W,
				4154	(__mmask8) __U);
				4155	}
				4156
				4157	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4158	_mm_maskz_sqrt_pd (__mmask8 __U, __m128d __A) {
				4159	return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
				4160	(__v2df)
				4161	_mm_setzero_pd (),
				4162	(__mmask8) __U);
				4163	}
				4164
				4165	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4166	_mm256_mask_sqrt_pd (__m256d __W, __mmask8 __U, __m256d __A) {
				4167	return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
				4168	(__v4df) __W,
				4169	(__mmask8) __U);
				4170	}
				4171
				4172	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4173	_mm256_maskz_sqrt_pd (__mmask8 __U, __m256d __A) {
				4174	return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
				4175	(__v4df)
				4176	_mm256_setzero_pd (),
				4177	(__mmask8) __U);
				4178	}
				4179
				4180	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4181	_mm_mask_sqrt_ps (__m128 __W, __mmask8 __U, __m128 __A) {
				4182	return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
				4183	(__v4sf) __W,
				4184	(__mmask8) __U);
				4185	}
				4186
				4187	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4188	_mm_maskz_sqrt_ps (__mmask8 __U, __m128 __A) {
				4189	return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
				4190	(__v4sf)
				4191	_mm_setzero_ps (),
				4192	(__mmask8) __U);
				4193	}
				4194
				4195	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4196	_mm256_mask_sqrt_ps (__m256 __W, __mmask8 __U, __m256 __A) {
				4197	return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
				4198	(__v8sf) __W,
				4199	(__mmask8) __U);
				4200	}
				4201
				4202	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4203	_mm256_maskz_sqrt_ps (__mmask8 __U, __m256 __A) {
				4204	return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
				4205	(__v8sf)
				4206	_mm256_setzero_ps (),
				4207	(__mmask8) __U);
				4208	}
				4209
				4210	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4211	_mm_mask_sub_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
				4212	return (__m128d) __builtin_ia32_subpd128_mask ((__v2df) __A,
				4213	(__v2df) __B,
				4214	(__v2df) __W,
				4215	(__mmask8) __U);
				4216	}
				4217
				4218	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4219	_mm_maskz_sub_pd (__mmask8 __U, __m128d __A, __m128d __B) {
				4220	return (__m128d) __builtin_ia32_subpd128_mask ((__v2df) __A,
				4221	(__v2df) __B,
				4222	(__v2df)
				4223	_mm_setzero_pd (),
				4224	(__mmask8) __U);
				4225	}
				4226
				4227	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4228	_mm256_mask_sub_pd (__m256d __W, __mmask8 __U, __m256d __A,
				4229	__m256d __B) {
				4230	return (__m256d) __builtin_ia32_subpd256_mask ((__v4df) __A,
				4231	(__v4df) __B,
				4232	(__v4df) __W,
				4233	(__mmask8) __U);
				4234	}
				4235
				4236	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4237	_mm256_maskz_sub_pd (__mmask8 __U, __m256d __A, __m256d __B) {
				4238	return (__m256d) __builtin_ia32_subpd256_mask ((__v4df) __A,
				4239	(__v4df) __B,
				4240	(__v4df)
				4241	_mm256_setzero_pd (),
				4242	(__mmask8) __U);
				4243	}
				4244
				4245	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4246	_mm_mask_sub_ps (__m128 __W, __mmask16 __U, __m128 __A, __m128 __B) {
				4247	return (__m128) __builtin_ia32_subps128_mask ((__v4sf) __A,
				4248	(__v4sf) __B,
				4249	(__v4sf) __W,
				4250	(__mmask8) __U);
				4251	}
				4252
				4253	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4254	_mm_maskz_sub_ps (__mmask16 __U, __m128 __A, __m128 __B) {
				4255	return (__m128) __builtin_ia32_subps128_mask ((__v4sf) __A,
				4256	(__v4sf) __B,
				4257	(__v4sf)
				4258	_mm_setzero_ps (),
				4259	(__mmask8) __U);
				4260	}
				4261
				4262	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4263	_mm256_mask_sub_ps (__m256 __W, __mmask16 __U, __m256 __A, __m256 __B) {
				4264	return (__m256) __builtin_ia32_subps256_mask ((__v8sf) __A,
				4265	(__v8sf) __B,
				4266	(__v8sf) __W,
				4267	(__mmask8) __U);
				4268	}
				4269
				4270	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4271	_mm256_maskz_sub_ps (__mmask16 __U, __m256 __A, __m256 __B) {
				4272	return (__m256) __builtin_ia32_subps256_mask ((__v8sf) __A,
				4273	(__v8sf) __B,
				4274	(__v8sf)
				4275	_mm256_setzero_ps (),
				4276	(__mmask8) __U);
				4277	}
				4278
				4279	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4280	_mm_mask2_permutex2var_epi32 (__m128i __A, __m128i __I, __mmask8 __U,
				4281	__m128i __B) {
				4282	return (__m128i) __builtin_ia32_vpermi2vard128_mask ((__v4si) __A,
				4283	(__v4si) __I
				4284	/* idx */ ,
				4285	(__v4si) __B,
				4286	(__mmask8) __U);
				4287	}
				4288
				4289	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4290	_mm256_mask2_permutex2var_epi32 (__m256i __A, __m256i __I,
				4291	__mmask8 __U, __m256i __B) {
				4292	return (__m256i) __builtin_ia32_vpermi2vard256_mask ((__v8si) __A,
				4293	(__v8si) __I
				4294	/* idx */ ,
				4295	(__v8si) __B,
				4296	(__mmask8) __U);
				4297	}
				4298
				4299	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4300	_mm_mask2_permutex2var_pd (__m128d __A, __m128i __I, __mmask8 __U,
				4301	__m128d __B) {
				4302	return (__m128d) __builtin_ia32_vpermi2varpd128_mask ((__v2df) __A,
				4303	(__v2di) __I
				4304	/* idx */ ,
				4305	(__v2df) __B,
				4306	(__mmask8)
				4307	__U);
				4308	}
				4309
				4310	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4311	_mm256_mask2_permutex2var_pd (__m256d __A, __m256i __I, __mmask8 __U,
				4312	__m256d __B) {
				4313	return (__m256d) __builtin_ia32_vpermi2varpd256_mask ((__v4df) __A,
				4314	(__v4di) __I
				4315	/* idx */ ,
				4316	(__v4df) __B,
				4317	(__mmask8)
				4318	__U);
				4319	}
				4320
				4321	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4322	_mm_mask2_permutex2var_ps (__m128 __A, __m128i __I, __mmask8 __U,
				4323	__m128 __B) {
				4324	return (__m128) __builtin_ia32_vpermi2varps128_mask ((__v4sf) __A,
				4325	(__v4si) __I
				4326	/* idx */ ,
				4327	(__v4sf) __B,
				4328	(__mmask8) __U);
				4329	}
				4330
				4331	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4332	_mm256_mask2_permutex2var_ps (__m256 __A, __m256i __I, __mmask8 __U,
				4333	__m256 __B) {
				4334	return (__m256) __builtin_ia32_vpermi2varps256_mask ((__v8sf) __A,
				4335	(__v8si) __I
				4336	/* idx */ ,
				4337	(__v8sf) __B,
				4338	(__mmask8) __U);
				4339	}
				4340
				4341	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4342	_mm_mask2_permutex2var_epi64 (__m128i __A, __m128i __I, __mmask8 __U,
				4343	__m128i __B) {
				4344	return (__m128i) __builtin_ia32_vpermi2varq128_mask ((__v2di) __A,
				4345	(__v2di) __I
				4346	/* idx */ ,
				4347	(__v2di) __B,
				4348	(__mmask8) __U);
				4349	}
				4350
				4351	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4352	_mm256_mask2_permutex2var_epi64 (__m256i __A, __m256i __I,
				4353	__mmask8 __U, __m256i __B) {
				4354	return (__m256i) __builtin_ia32_vpermi2varq256_mask ((__v4di) __A,
				4355	(__v4di) __I
				4356	/* idx */ ,
				4357	(__v4di) __B,
				4358	(__mmask8) __U);
				4359	}
				4360
				4361	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4362	_mm_permutex2var_epi32 (__m128i __A, __m128i __I, __m128i __B) {
				4363	return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I
				4364	/* idx */ ,
				4365	(__v4si) __A,
				4366	(__v4si) __B,
				4367	(__mmask8) -1);
				4368	}
				4369
				4370	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4371	_mm_mask_permutex2var_epi32 (__m128i __A, __mmask8 __U, __m128i __I,
				4372	__m128i __B) {
				4373	return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I
				4374	/* idx */ ,
				4375	(__v4si) __A,
				4376	(__v4si) __B,
				4377	(__mmask8) __U);
				4378	}
				4379
				4380	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4381	_mm_maskz_permutex2var_epi32 (__mmask8 __U, __m128i __A, __m128i __I,
				4382	__m128i __B) {
				4383	return (__m128i) __builtin_ia32_vpermt2vard128_maskz ((__v4si) __I
				4384	/* idx */ ,
				4385	(__v4si) __A,
				4386	(__v4si) __B,
				4387	(__mmask8)
				4388	__U);
				4389	}
				4390
				4391	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4392	_mm256_permutex2var_epi32 (__m256i __A, __m256i __I, __m256i __B) {
				4393	return (__m256i) __builtin_ia32_vpermt2vard256_mask ((__v8si) __I
				4394	/* idx */ ,
				4395	(__v8si) __A,
				4396	(__v8si) __B,
				4397	(__mmask8) -1);
				4398	}
				4399
				4400	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4401	_mm256_mask_permutex2var_epi32 (__m256i __A, __mmask8 __U, __m256i __I,
				4402	__m256i __B) {
				4403	return (__m256i) __builtin_ia32_vpermt2vard256_mask ((__v8si) __I
				4404	/* idx */ ,
				4405	(__v8si) __A,
				4406	(__v8si) __B,
				4407	(__mmask8) __U);
				4408	}
				4409
				4410	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4411	_mm256_maskz_permutex2var_epi32 (__mmask8 __U, __m256i __A,
				4412	__m256i __I, __m256i __B) {
				4413	return (__m256i) __builtin_ia32_vpermt2vard256_maskz ((__v8si) __I
				4414	/* idx */ ,
				4415	(__v8si) __A,
				4416	(__v8si) __B,
				4417	(__mmask8)
				4418	__U);
				4419	}
				4420
				4421	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4422	_mm_permutex2var_pd (__m128d __A, __m128i __I, __m128d __B) {
				4423	return (__m128d) __builtin_ia32_vpermt2varpd128_mask ((__v2di) __I
				4424	/* idx */ ,
				4425	(__v2df) __A,
				4426	(__v2df) __B,
				4427	(__mmask8) -
				4428	1);
				4429	}
				4430
				4431	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4432	_mm_mask_permutex2var_pd (__m128d __A, __mmask8 __U, __m128i __I,
				4433	__m128d __B) {
				4434	return (__m128d) __builtin_ia32_vpermt2varpd128_mask ((__v2di) __I
				4435	/* idx */ ,
				4436	(__v2df) __A,
				4437	(__v2df) __B,
				4438	(__mmask8)
				4439	__U);
				4440	}
				4441
				4442	static __inline__ __m128d __DEFAULT_FN_ATTRS
				4443	_mm_maskz_permutex2var_pd (__mmask8 __U, __m128d __A, __m128i __I,
				4444	__m128d __B) {
				4445	return (__m128d) __builtin_ia32_vpermt2varpd128_maskz ((__v2di) __I
				4446	/* idx */ ,
				4447	(__v2df) __A,
				4448	(__v2df) __B,
				4449	(__mmask8)
				4450	__U);
				4451	}
				4452
				4453	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4454	_mm256_permutex2var_pd (__m256d __A, __m256i __I, __m256d __B) {
				4455	return (__m256d) __builtin_ia32_vpermt2varpd256_mask ((__v4di) __I
				4456	/* idx */ ,
				4457	(__v4df) __A,
				4458	(__v4df) __B,
				4459	(__mmask8) -
				4460	1);
				4461	}
				4462
				4463	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4464	_mm256_mask_permutex2var_pd (__m256d __A, __mmask8 __U, __m256i __I,
				4465	__m256d __B) {
				4466	return (__m256d) __builtin_ia32_vpermt2varpd256_mask ((__v4di) __I
				4467	/* idx */ ,
				4468	(__v4df) __A,
				4469	(__v4df) __B,
				4470	(__mmask8)
				4471	__U);
				4472	}
				4473
				4474	static __inline__ __m256d __DEFAULT_FN_ATTRS
				4475	_mm256_maskz_permutex2var_pd (__mmask8 __U, __m256d __A, __m256i __I,
				4476	__m256d __B) {
				4477	return (__m256d) __builtin_ia32_vpermt2varpd256_maskz ((__v4di) __I
				4478	/* idx */ ,
				4479	(__v4df) __A,
				4480	(__v4df) __B,
				4481	(__mmask8)
				4482	__U);
				4483	}
				4484
				4485	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4486	_mm_permutex2var_ps (__m128 __A, __m128i __I, __m128 __B) {
				4487	return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I
				4488	/* idx */ ,
				4489	(__v4sf) __A,
				4490	(__v4sf) __B,
				4491	(__mmask8) -1);
				4492	}
				4493
				4494	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4495	_mm_mask_permutex2var_ps (__m128 __A, __mmask8 __U, __m128i __I,
				4496	__m128 __B) {
				4497	return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I
				4498	/* idx */ ,
				4499	(__v4sf) __A,
				4500	(__v4sf) __B,
				4501	(__mmask8) __U);
				4502	}
				4503
				4504	static __inline__ __m128 __DEFAULT_FN_ATTRS
				4505	_mm_maskz_permutex2var_ps (__mmask8 __U, __m128 __A, __m128i __I,
				4506	__m128 __B) {
				4507	return (__m128) __builtin_ia32_vpermt2varps128_maskz ((__v4si) __I
				4508	/* idx */ ,
				4509	(__v4sf) __A,
				4510	(__v4sf) __B,
				4511	(__mmask8)
				4512	__U);
				4513	}
				4514
				4515	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4516	_mm256_permutex2var_ps (__m256 __A, __m256i __I, __m256 __B) {
				4517	return (__m256) __builtin_ia32_vpermt2varps256_mask ((__v8si) __I
				4518	/* idx */ ,
				4519	(__v8sf) __A,
				4520	(__v8sf) __B,
				4521	(__mmask8) -1);
				4522	}
				4523
				4524	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4525	_mm256_mask_permutex2var_ps (__m256 __A, __mmask8 __U, __m256i __I,
				4526	__m256 __B) {
				4527	return (__m256) __builtin_ia32_vpermt2varps256_mask ((__v8si) __I
				4528	/* idx */ ,
				4529	(__v8sf) __A,
				4530	(__v8sf) __B,
				4531	(__mmask8) __U);
				4532	}
				4533
				4534	static __inline__ __m256 __DEFAULT_FN_ATTRS
				4535	_mm256_maskz_permutex2var_ps (__mmask8 __U, __m256 __A, __m256i __I,
				4536	__m256 __B) {
				4537	return (__m256) __builtin_ia32_vpermt2varps256_maskz ((__v8si) __I
				4538	/* idx */ ,
				4539	(__v8sf) __A,
				4540	(__v8sf) __B,
				4541	(__mmask8)
				4542	__U);
				4543	}
				4544
				4545	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4546	_mm_permutex2var_epi64 (__m128i __A, __m128i __I, __m128i __B) {
				4547	return (__m128i) __builtin_ia32_vpermt2varq128_mask ((__v2di) __I
				4548	/* idx */ ,
				4549	(__v2di) __A,
				4550	(__v2di) __B,
				4551	(__mmask8) -1);
				4552	}
				4553
				4554	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4555	_mm_mask_permutex2var_epi64 (__m128i __A, __mmask8 __U, __m128i __I,
				4556	__m128i __B) {
				4557	return (__m128i) __builtin_ia32_vpermt2varq128_mask ((__v2di) __I
				4558	/* idx */ ,
				4559	(__v2di) __A,
				4560	(__v2di) __B,
				4561	(__mmask8) __U);
				4562	}
				4563
				4564	static __inline__ __m128i __DEFAULT_FN_ATTRS
				4565	_mm_maskz_permutex2var_epi64 (__mmask8 __U, __m128i __A, __m128i __I,
				4566	__m128i __B) {
				4567	return (__m128i) __builtin_ia32_vpermt2varq128_maskz ((__v2di) __I
				4568	/* idx */ ,
				4569	(__v2di) __A,
				4570	(__v2di) __B,
				4571	(__mmask8)
				4572	__U);
				4573	}
				4574
				4575
				4576	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4577	_mm256_permutex2var_epi64 (__m256i __A, __m256i __I, __m256i __B) {
				4578	return (__m256i) __builtin_ia32_vpermt2varq256_mask ((__v4di) __I
				4579	/* idx */ ,
				4580	(__v4di) __A,
				4581	(__v4di) __B,
				4582	(__mmask8) -1);
				4583	}
				4584
				4585	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4586	_mm256_mask_permutex2var_epi64 (__m256i __A, __mmask8 __U, __m256i __I,
				4587	__m256i __B) {
				4588	return (__m256i) __builtin_ia32_vpermt2varq256_mask ((__v4di) __I
				4589	/* idx */ ,
				4590	(__v4di) __A,
				4591	(__v4di) __B,
				4592	(__mmask8) __U);
				4593	}
				4594
				4595	static __inline__ __m256i __DEFAULT_FN_ATTRS
				4596	_mm256_maskz_permutex2var_epi64 (__mmask8 __U, __m256i __A,
				4597	__m256i __I, __m256i __B) {
				4598	return (__m256i) __builtin_ia32_vpermt2varq256_maskz ((__v4di) __I
				4599	/* idx */ ,
				4600	(__v4di) __A,
				4601	(__v4di) __B,
				4602	(__mmask8)
				4603	__U);
				4604	}
				4605
Michael Kuperstein	e45af54	2015-06-30 13:36:19 +0000	[diff] [blame]	4606	#undef __DEFAULT_FN_ATTRS
Eric Christopher	4d185168	2015-06-17 07:09:20 +0000	[diff] [blame]	4607
Robert Khasanov	b9f3a91	2014-10-08 17:18:13 +0000	[diff] [blame]	4608	#endif /* __AVX512VLINTRIN_H */