Oren Ben Simhon | 489d6ef | 2016-11-17 09:59:40 +0000 | [diff] [blame] | 1 | //=== X86CallingConv.cpp - X86 Custom Calling Convention Impl -*- C++ -*-===//
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| 2 | //
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| 3 | // The LLVM Compiler Infrastructure
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| 4 | //
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| 5 | // This file is distributed under the University of Illinois Open Source
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| 6 | // License. See LICENSE.TXT for details.
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| 7 | //
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| 8 | //===----------------------------------------------------------------------===//
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| 9 | //
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| 10 | // This file contains the implementation of custom routines for the X86
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| 11 | // Calling Convention that aren't done by tablegen.
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| 12 | //
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| 13 | //===----------------------------------------------------------------------===//
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| 14 |
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| 15 | #include "MCTargetDesc/X86MCTargetDesc.h"
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| 16 | #include "llvm/CodeGen/CallingConvLower.h"
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| 17 | #include "llvm/IR/CallingConv.h"
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| 18 |
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| 19 | namespace llvm {
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| 20 |
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| 21 | bool CC_X86_32_RegCall_Assign2Regs(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
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| 22 | CCValAssign::LocInfo &LocInfo,
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| 23 | ISD::ArgFlagsTy &ArgFlags, CCState &State) {
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| 24 | // List of GPR registers that are available to store values in regcall
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| 25 | // calling convention.
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| 26 | static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI,
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| 27 | X86::ESI};
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| 28 |
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| 29 | // The vector will save all the available registers for allocation.
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| 30 | SmallVector<unsigned, 5> AvailableRegs;
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| 31 |
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| 32 | // searching for the available registers.
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| 33 | for (auto Reg : RegList) {
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| 34 | if (!State.isAllocated(Reg))
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| 35 | AvailableRegs.push_back(Reg);
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| 36 | }
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| 37 |
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| 38 | const size_t RequiredGprsUponSplit = 2;
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| 39 | if (AvailableRegs.size() < RequiredGprsUponSplit)
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| 40 | return false; // Not enough free registers - continue the search.
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| 41 |
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| 42 | // Allocating the available registers
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| 43 | for (unsigned I = 0; I < RequiredGprsUponSplit; I++) {
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| 44 |
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| 45 | // Marking the register as located
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| 46 | unsigned Reg = State.AllocateReg(AvailableRegs[I]);
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| 47 |
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| 48 | // Since we previously made sure that 2 registers are available
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| 49 | // we expect that a real register number will be returned
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| 50 | assert(Reg && "Expecting a register will be available");
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| 51 |
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| 52 | // Assign the value to the allocated register
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| 53 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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| 54 | }
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| 55 |
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| 56 | // Successful in allocating regsiters - stop scanning next rules.
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| 57 | return true;
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| 58 | }
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| 59 |
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| 60 | } // End llvm namespace
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