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gerrit-public.fairphone.software / toolchain / llvm-project / 967bf5813fb609940fa06510ad70d48268c362d5 / . / llvm / test / CodeGen / R600 / add.ll
blob: e4e7bc6c7f852154abf026e5d5a1963e29ef605f [file] [log] [blame]
Tom Stellard967bf582014-02-13 23:34:15 +0000[diff] [blame^]1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK --check-prefix=FUNC %s
2; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]3
Tom Stellard967bf582014-02-13 23:34:15 +0000[diff] [blame^]4;FUNC-LABEL: @test1:
Matt Arsenault44138782013-10-11 21:03:41 +0000[diff] [blame]5;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6
Matt Arsenault72b31ee2013-11-12 02:35:51 +0000[diff] [blame]7;SI-CHECK: V_ADD_I32_e32 [[REG:v[0-9]+]], {{v[0-9]+, v[0-9]+}}
Matt Arsenault44138782013-10-11 21:03:41 +0000[diff] [blame]8;SI-CHECK-NOT: [[REG]]
9;SI-CHECK: BUFFER_STORE_DWORD [[REG]],
10define void @test1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
11 %b_ptr = getelementptr i32 addrspace(1)* %in, i32 1
12 %a = load i32 addrspace(1)* %in
13 %b = load i32 addrspace(1)* %b_ptr
14 %result = add i32 %a, %b
15 store i32 %result, i32 addrspace(1)* %out
16 ret void
17}
18
Tom Stellard967bf582014-02-13 23:34:15 +0000[diff] [blame^]19;FUNC-LABEL: @test2:
Tom Stellard1e803092013-07-23 01:48:18 +0000[diff] [blame]20;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
21;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]22
Matt Arsenault72b31ee2013-11-12 02:35:51 +0000[diff] [blame]23;SI-CHECK: V_ADD_I32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
24;SI-CHECK: V_ADD_I32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Tom Stellard043795e2013-06-20 21:55:30 +0000[diff] [blame]25
26define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
27 %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
Matt Arsenaultc15b8572013-10-11 21:03:39 +0000[diff] [blame]28 %a = load <2 x i32> addrspace(1)* %in
29 %b = load <2 x i32> addrspace(1)* %b_ptr
Tom Stellard043795e2013-06-20 21:55:30 +0000[diff] [blame]30 %result = add <2 x i32> %a, %b
31 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
32 ret void
33}
34
Tom Stellard967bf582014-02-13 23:34:15 +0000[diff] [blame^]35;FUNC-LABEL: @test4:
Tom Stellard1e803092013-07-23 01:48:18 +0000[diff] [blame]36;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
37;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
38;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
39;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard043795e2013-06-20 21:55:30 +0000[diff] [blame]40
Matt Arsenault72b31ee2013-11-12 02:35:51 +0000[diff] [blame]41;SI-CHECK: V_ADD_I32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
42;SI-CHECK: V_ADD_I32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
43;SI-CHECK: V_ADD_I32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
44;SI-CHECK: V_ADD_I32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Tom Stellard043795e2013-06-20 21:55:30 +0000[diff] [blame]45
46define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]47 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
Matt Arsenaultc15b8572013-10-11 21:03:39 +0000[diff] [blame]48 %a = load <4 x i32> addrspace(1)* %in
49 %b = load <4 x i32> addrspace(1)* %b_ptr
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]50 %result = add <4 x i32> %a, %b
51 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
52 ret void
53}
Tom Stellard967bf582014-02-13 23:34:15 +0000[diff] [blame^]54
55; FUNC-LABEL: @test8
56; EG-CHECK: ADD_INT
57; EG-CHECK: ADD_INT
58; EG-CHECK: ADD_INT
59; EG-CHECK: ADD_INT
60; EG-CHECK: ADD_INT
61; EG-CHECK: ADD_INT
62; EG-CHECK: ADD_INT
63; EG-CHECK: ADD_INT
64; SI-CHECK: S_ADD_I32
65; SI-CHECK: S_ADD_I32
66; SI-CHECK: S_ADD_I32
67; SI-CHECK: S_ADD_I32
68; SI-CHECK: S_ADD_I32
69; SI-CHECK: S_ADD_I32
70; SI-CHECK: S_ADD_I32
71; SI-CHECK: S_ADD_I32
72define void @test8(<8 x i32> addrspace(1)* %out, <8 x i32> %a, <8 x i32> %b) {
73entry:
74 %0 = add <8 x i32> %a, %b
75 store <8 x i32> %0, <8 x i32> addrspace(1)* %out
76 ret void
77}