Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 970f686faa6502bf8b72ae7d7211fe08de804dd1 / . / llvm / test / CodeGen / Mips / llvm-ir / xor.ll
blob: 1fb51876608b06b54d25d56d452ad41900601150 [file] [log] [blame]
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s -check-prefix=MIPS
3; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s -check-prefix=MIPS
4; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \
5; RUN: -check-prefix=MIPS32R2
6; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \
7; RUN: -check-prefix=MIPS32R2
8; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \
9; RUN: -check-prefix=MIPS32R2
10; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \
11; RUN: -check-prefix=MIPS32R6
12; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \
13; RUN: -check-prefix=MIPS64
14; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \
15; RUN: -check-prefix=MIPS64
16; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
17; RUN: -check-prefix=MIPS64
18; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
19; RUN: -check-prefix=MIPS64R2
20; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \
21; RUN: -check-prefix=MIPS64R2
22; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \
23; RUN: -check-prefix=MIPS64R2
24; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \
25; RUN: -check-prefix=MIPS64R6
26; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
27; RUN: -check-prefix=MM32R3
28; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
29; RUN: -check-prefix=MM32R6
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]30
31define signext i1 @xor_i1(i1 signext %a, i1 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]32; MIPS-LABEL: xor_i1:
33; MIPS: # %bb.0: # %entry
34; MIPS-NEXT: jr $ra
35; MIPS-NEXT: xor $2, $4, $5
36;
37; MIPS32R2-LABEL: xor_i1:
38; MIPS32R2: # %bb.0: # %entry
39; MIPS32R2-NEXT: jr $ra
40; MIPS32R2-NEXT: xor $2, $4, $5
41;
42; MIPS32R6-LABEL: xor_i1:
43; MIPS32R6: # %bb.0: # %entry
44; MIPS32R6-NEXT: jr $ra
45; MIPS32R6-NEXT: xor $2, $4, $5
46;
47; MIPS64-LABEL: xor_i1:
48; MIPS64: # %bb.0: # %entry
49; MIPS64-NEXT: xor $1, $4, $5
50; MIPS64-NEXT: jr $ra
51; MIPS64-NEXT: sll $2, $1, 0
52;
53; MIPS64R2-LABEL: xor_i1:
54; MIPS64R2: # %bb.0: # %entry
55; MIPS64R2-NEXT: xor $1, $4, $5
56; MIPS64R2-NEXT: jr $ra
57; MIPS64R2-NEXT: sll $2, $1, 0
58;
59; MIPS64R6-LABEL: xor_i1:
60; MIPS64R6: # %bb.0: # %entry
61; MIPS64R6-NEXT: xor $1, $4, $5
62; MIPS64R6-NEXT: jr $ra
63; MIPS64R6-NEXT: sll $2, $1, 0
64;
65; MM32R3-LABEL: xor_i1:
66; MM32R3: # %bb.0: # %entry
67; MM32R3-NEXT: xor16 $4, $5
68; MM32R3-NEXT: move $2, $4
69; MM32R3-NEXT: jrc $ra
70;
71; MM32R6-LABEL: xor_i1:
72; MM32R6: # %bb.0: # %entry
73; MM32R6-NEXT: xor16 $4, $5
74; MM32R6-NEXT: move $2, $4
75; MM32R6-NEXT: jrc $ra
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]76entry:
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]77 %r = xor i1 %a, %b
78 ret i1 %r
79}
80
81define signext i8 @xor_i8(i8 signext %a, i8 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]82; MIPS-LABEL: xor_i8:
83; MIPS: # %bb.0: # %entry
84; MIPS-NEXT: jr $ra
85; MIPS-NEXT: xor $2, $4, $5
86;
87; MIPS32R2-LABEL: xor_i8:
88; MIPS32R2: # %bb.0: # %entry
89; MIPS32R2-NEXT: jr $ra
90; MIPS32R2-NEXT: xor $2, $4, $5
91;
92; MIPS32R6-LABEL: xor_i8:
93; MIPS32R6: # %bb.0: # %entry
94; MIPS32R6-NEXT: jr $ra
95; MIPS32R6-NEXT: xor $2, $4, $5
96;
97; MIPS64-LABEL: xor_i8:
98; MIPS64: # %bb.0: # %entry
99; MIPS64-NEXT: xor $1, $4, $5
100; MIPS64-NEXT: jr $ra
101; MIPS64-NEXT: sll $2, $1, 0
102;
103; MIPS64R2-LABEL: xor_i8:
104; MIPS64R2: # %bb.0: # %entry
105; MIPS64R2-NEXT: xor $1, $4, $5
106; MIPS64R2-NEXT: jr $ra
107; MIPS64R2-NEXT: sll $2, $1, 0
108;
109; MIPS64R6-LABEL: xor_i8:
110; MIPS64R6: # %bb.0: # %entry
111; MIPS64R6-NEXT: xor $1, $4, $5
112; MIPS64R6-NEXT: jr $ra
113; MIPS64R6-NEXT: sll $2, $1, 0
114;
115; MM32R3-LABEL: xor_i8:
116; MM32R3: # %bb.0: # %entry
117; MM32R3-NEXT: xor16 $4, $5
118; MM32R3-NEXT: move $2, $4
119; MM32R3-NEXT: jrc $ra
120;
121; MM32R6-LABEL: xor_i8:
122; MM32R6: # %bb.0: # %entry
123; MM32R6-NEXT: xor16 $4, $5
124; MM32R6-NEXT: move $2, $4
125; MM32R6-NEXT: jrc $ra
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]126entry:
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]127 %r = xor i8 %a, %b
128 ret i8 %r
129}
130
131define signext i16 @xor_i16(i16 signext %a, i16 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]132; MIPS-LABEL: xor_i16:
133; MIPS: # %bb.0: # %entry
134; MIPS-NEXT: jr $ra
135; MIPS-NEXT: xor $2, $4, $5
136;
137; MIPS32R2-LABEL: xor_i16:
138; MIPS32R2: # %bb.0: # %entry
139; MIPS32R2-NEXT: jr $ra
140; MIPS32R2-NEXT: xor $2, $4, $5
141;
142; MIPS32R6-LABEL: xor_i16:
143; MIPS32R6: # %bb.0: # %entry
144; MIPS32R6-NEXT: jr $ra
145; MIPS32R6-NEXT: xor $2, $4, $5
146;
147; MIPS64-LABEL: xor_i16:
148; MIPS64: # %bb.0: # %entry
149; MIPS64-NEXT: xor $1, $4, $5
150; MIPS64-NEXT: jr $ra
151; MIPS64-NEXT: sll $2, $1, 0
152;
153; MIPS64R2-LABEL: xor_i16:
154; MIPS64R2: # %bb.0: # %entry
155; MIPS64R2-NEXT: xor $1, $4, $5
156; MIPS64R2-NEXT: jr $ra
157; MIPS64R2-NEXT: sll $2, $1, 0
158;
159; MIPS64R6-LABEL: xor_i16:
160; MIPS64R6: # %bb.0: # %entry
161; MIPS64R6-NEXT: xor $1, $4, $5
162; MIPS64R6-NEXT: jr $ra
163; MIPS64R6-NEXT: sll $2, $1, 0
164;
165; MM32R3-LABEL: xor_i16:
166; MM32R3: # %bb.0: # %entry
167; MM32R3-NEXT: xor16 $4, $5
168; MM32R3-NEXT: move $2, $4
169; MM32R3-NEXT: jrc $ra
170;
171; MM32R6-LABEL: xor_i16:
172; MM32R6: # %bb.0: # %entry
173; MM32R6-NEXT: xor16 $4, $5
174; MM32R6-NEXT: move $2, $4
175; MM32R6-NEXT: jrc $ra
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]176entry:
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]177 %r = xor i16 %a, %b
178 ret i16 %r
179}
180
181define signext i32 @xor_i32(i32 signext %a, i32 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]182; MIPS-LABEL: xor_i32:
183; MIPS: # %bb.0: # %entry
184; MIPS-NEXT: jr $ra
185; MIPS-NEXT: xor $2, $4, $5
186;
187; MIPS32R2-LABEL: xor_i32:
188; MIPS32R2: # %bb.0: # %entry
189; MIPS32R2-NEXT: jr $ra
190; MIPS32R2-NEXT: xor $2, $4, $5
191;
192; MIPS32R6-LABEL: xor_i32:
193; MIPS32R6: # %bb.0: # %entry
194; MIPS32R6-NEXT: jr $ra
195; MIPS32R6-NEXT: xor $2, $4, $5
196;
197; MIPS64-LABEL: xor_i32:
198; MIPS64: # %bb.0: # %entry
199; MIPS64-NEXT: xor $1, $4, $5
200; MIPS64-NEXT: jr $ra
201; MIPS64-NEXT: sll $2, $1, 0
202;
203; MIPS64R2-LABEL: xor_i32:
204; MIPS64R2: # %bb.0: # %entry
205; MIPS64R2-NEXT: xor $1, $4, $5
206; MIPS64R2-NEXT: jr $ra
207; MIPS64R2-NEXT: sll $2, $1, 0
208;
209; MIPS64R6-LABEL: xor_i32:
210; MIPS64R6: # %bb.0: # %entry
211; MIPS64R6-NEXT: xor $1, $4, $5
212; MIPS64R6-NEXT: jr $ra
213; MIPS64R6-NEXT: sll $2, $1, 0
214;
215; MM32R3-LABEL: xor_i32:
216; MM32R3: # %bb.0: # %entry
217; MM32R3-NEXT: xor16 $4, $5
218; MM32R3-NEXT: move $2, $4
219; MM32R3-NEXT: jrc $ra
220;
221; MM32R6-LABEL: xor_i32:
222; MM32R6: # %bb.0: # %entry
223; MM32R6-NEXT: xor16 $4, $5
224; MM32R6-NEXT: move $2, $4
225; MM32R6-NEXT: jrc $ra
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]226entry:
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]227 %r = xor i32 %a, %b
228 ret i32 %r
229}
230
231define signext i64 @xor_i64(i64 signext %a, i64 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]232; MIPS-LABEL: xor_i64:
233; MIPS: # %bb.0: # %entry
234; MIPS-NEXT: xor $2, $4, $6
235; MIPS-NEXT: jr $ra
236; MIPS-NEXT: xor $3, $5, $7
237;
238; MIPS32R2-LABEL: xor_i64:
239; MIPS32R2: # %bb.0: # %entry
240; MIPS32R2-NEXT: xor $2, $4, $6
241; MIPS32R2-NEXT: jr $ra
242; MIPS32R2-NEXT: xor $3, $5, $7
243;
244; MIPS32R6-LABEL: xor_i64:
245; MIPS32R6: # %bb.0: # %entry
246; MIPS32R6-NEXT: xor $2, $4, $6
247; MIPS32R6-NEXT: jr $ra
248; MIPS32R6-NEXT: xor $3, $5, $7
249;
250; MIPS64-LABEL: xor_i64:
251; MIPS64: # %bb.0: # %entry
252; MIPS64-NEXT: jr $ra
253; MIPS64-NEXT: xor $2, $4, $5
254;
255; MIPS64R2-LABEL: xor_i64:
256; MIPS64R2: # %bb.0: # %entry
257; MIPS64R2-NEXT: jr $ra
258; MIPS64R2-NEXT: xor $2, $4, $5
259;
260; MIPS64R6-LABEL: xor_i64:
261; MIPS64R6: # %bb.0: # %entry
262; MIPS64R6-NEXT: jr $ra
263; MIPS64R6-NEXT: xor $2, $4, $5
264;
265; MM32R3-LABEL: xor_i64:
266; MM32R3: # %bb.0: # %entry
267; MM32R3-NEXT: xor16 $4, $6
268; MM32R3-NEXT: xor16 $5, $7
269; MM32R3-NEXT: move $2, $4
270; MM32R3-NEXT: move $3, $5
271; MM32R3-NEXT: jrc $ra
272;
273; MM32R6-LABEL: xor_i64:
274; MM32R6: # %bb.0: # %entry
275; MM32R6-NEXT: xor16 $4, $6
276; MM32R6-NEXT: xor16 $5, $7
277; MM32R6-NEXT: move $2, $4
278; MM32R6-NEXT: move $3, $5
279; MM32R6-NEXT: jrc $ra
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]280entry:
Vasileios Kalintiris2ed214f2015-01-26 12:04:40 +0000[diff] [blame]281 %r = xor i64 %a, %b
282 ret i64 %r
283}
Vasileios Kalintirisef96a8e2015-01-26 12:33:22 +0000[diff] [blame]284
285define signext i128 @xor_i128(i128 signext %a, i128 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]286; MIPS-LABEL: xor_i128:
287; MIPS: # %bb.0: # %entry
288; MIPS-NEXT: lw $1, 20($sp)
289; MIPS-NEXT: lw $2, 16($sp)
290; MIPS-NEXT: xor $2, $4, $2
291; MIPS-NEXT: xor $3, $5, $1
292; MIPS-NEXT: lw $1, 24($sp)
293; MIPS-NEXT: xor $4, $6, $1
294; MIPS-NEXT: lw $1, 28($sp)
295; MIPS-NEXT: jr $ra
296; MIPS-NEXT: xor $5, $7, $1
297;
298; MIPS32R2-LABEL: xor_i128:
299; MIPS32R2: # %bb.0: # %entry
300; MIPS32R2-NEXT: lw $1, 20($sp)
301; MIPS32R2-NEXT: lw $2, 16($sp)
302; MIPS32R2-NEXT: xor $2, $4, $2
303; MIPS32R2-NEXT: xor $3, $5, $1
304; MIPS32R2-NEXT: lw $1, 24($sp)
305; MIPS32R2-NEXT: xor $4, $6, $1
306; MIPS32R2-NEXT: lw $1, 28($sp)
307; MIPS32R2-NEXT: jr $ra
308; MIPS32R2-NEXT: xor $5, $7, $1
309;
310; MIPS32R6-LABEL: xor_i128:
311; MIPS32R6: # %bb.0: # %entry
312; MIPS32R6-NEXT: lw $1, 20($sp)
313; MIPS32R6-NEXT: lw $2, 16($sp)
314; MIPS32R6-NEXT: xor $2, $4, $2
315; MIPS32R6-NEXT: xor $3, $5, $1
316; MIPS32R6-NEXT: lw $1, 24($sp)
317; MIPS32R6-NEXT: xor $4, $6, $1
318; MIPS32R6-NEXT: lw $1, 28($sp)
319; MIPS32R6-NEXT: jr $ra
320; MIPS32R6-NEXT: xor $5, $7, $1
321;
322; MIPS64-LABEL: xor_i128:
323; MIPS64: # %bb.0: # %entry
324; MIPS64-NEXT: xor $2, $4, $6
325; MIPS64-NEXT: jr $ra
326; MIPS64-NEXT: xor $3, $5, $7
327;
328; MIPS64R2-LABEL: xor_i128:
329; MIPS64R2: # %bb.0: # %entry
330; MIPS64R2-NEXT: xor $2, $4, $6
331; MIPS64R2-NEXT: jr $ra
332; MIPS64R2-NEXT: xor $3, $5, $7
333;
334; MIPS64R6-LABEL: xor_i128:
335; MIPS64R6: # %bb.0: # %entry
336; MIPS64R6-NEXT: xor $2, $4, $6
337; MIPS64R6-NEXT: jr $ra
338; MIPS64R6-NEXT: xor $3, $5, $7
339;
340; MM32R3-LABEL: xor_i128:
341; MM32R3: # %bb.0: # %entry
342; MM32R3-NEXT: lw $3, 20($sp)
343; MM32R3-NEXT: lw $2, 16($sp)
344; MM32R3-NEXT: xor16 $2, $4
345; MM32R3-NEXT: xor16 $3, $5
346; MM32R3-NEXT: lw $4, 24($sp)
347; MM32R3-NEXT: xor16 $4, $6
348; MM32R3-NEXT: lw $5, 28($sp)
349; MM32R3-NEXT: xor16 $5, $7
350; MM32R3-NEXT: jrc $ra
351;
352; MM32R6-LABEL: xor_i128:
353; MM32R6: # %bb.0: # %entry
354; MM32R6-NEXT: lw $3, 20($sp)
355; MM32R6-NEXT: lw $2, 16($sp)
356; MM32R6-NEXT: xor16 $2, $4
357; MM32R6-NEXT: xor16 $3, $5
358; MM32R6-NEXT: lw $4, 24($sp)
359; MM32R6-NEXT: xor16 $4, $6
360; MM32R6-NEXT: lw $5, 28($sp)
361; MM32R6-NEXT: xor16 $5, $7
362; MM32R6-NEXT: jrc $ra
Vasileios Kalintirisef96a8e2015-01-26 12:33:22 +0000[diff] [blame]363entry:
Vasileios Kalintirisef96a8e2015-01-26 12:33:22 +0000[diff] [blame]364 %r = xor i128 %a, %b
365 ret i128 %r
366}
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]367
368define signext i1 @xor_i1_4(i1 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]369; MIPS-LABEL: xor_i1_4:
370; MIPS: # %bb.0: # %entry
371; MIPS-NEXT: jr $ra
372; MIPS-NEXT: move $2, $4
373;
374; MIPS32R2-LABEL: xor_i1_4:
375; MIPS32R2: # %bb.0: # %entry
376; MIPS32R2-NEXT: jr $ra
377; MIPS32R2-NEXT: move $2, $4
378;
379; MIPS32R6-LABEL: xor_i1_4:
380; MIPS32R6: # %bb.0: # %entry
381; MIPS32R6-NEXT: jr $ra
382; MIPS32R6-NEXT: move $2, $4
383;
384; MIPS64-LABEL: xor_i1_4:
385; MIPS64: # %bb.0: # %entry
386; MIPS64-NEXT: jr $ra
387; MIPS64-NEXT: move $2, $4
388;
389; MIPS64R2-LABEL: xor_i1_4:
390; MIPS64R2: # %bb.0: # %entry
391; MIPS64R2-NEXT: jr $ra
392; MIPS64R2-NEXT: move $2, $4
393;
394; MIPS64R6-LABEL: xor_i1_4:
395; MIPS64R6: # %bb.0: # %entry
396; MIPS64R6-NEXT: jr $ra
397; MIPS64R6-NEXT: move $2, $4
398;
399; MM32R3-LABEL: xor_i1_4:
400; MM32R3: # %bb.0: # %entry
401; MM32R3-NEXT: move $2, $4
402; MM32R3-NEXT: jrc $ra
403;
404; MM32R6-LABEL: xor_i1_4:
405; MM32R6: # %bb.0: # %entry
406; MM32R6-NEXT: move $2, $4
407; MM32R6-NEXT: jrc $ra
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]408entry:
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]409 %r = xor i1 4, %b
410 ret i1 %r
411}
412
413define signext i8 @xor_i8_4(i8 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]414; MIPS-LABEL: xor_i8_4:
415; MIPS: # %bb.0: # %entry
416; MIPS-NEXT: jr $ra
417; MIPS-NEXT: xori $2, $4, 4
418;
419; MIPS32R2-LABEL: xor_i8_4:
420; MIPS32R2: # %bb.0: # %entry
421; MIPS32R2-NEXT: jr $ra
422; MIPS32R2-NEXT: xori $2, $4, 4
423;
424; MIPS32R6-LABEL: xor_i8_4:
425; MIPS32R6: # %bb.0: # %entry
426; MIPS32R6-NEXT: jr $ra
427; MIPS32R6-NEXT: xori $2, $4, 4
428;
429; MIPS64-LABEL: xor_i8_4:
430; MIPS64: # %bb.0: # %entry
431; MIPS64-NEXT: jr $ra
432; MIPS64-NEXT: xori $2, $4, 4
433;
434; MIPS64R2-LABEL: xor_i8_4:
435; MIPS64R2: # %bb.0: # %entry
436; MIPS64R2-NEXT: jr $ra
437; MIPS64R2-NEXT: xori $2, $4, 4
438;
439; MIPS64R6-LABEL: xor_i8_4:
440; MIPS64R6: # %bb.0: # %entry
441; MIPS64R6-NEXT: jr $ra
442; MIPS64R6-NEXT: xori $2, $4, 4
443;
444; MM32R3-LABEL: xor_i8_4:
445; MM32R3: # %bb.0: # %entry
446; MM32R3-NEXT: jr $ra
447; MM32R3-NEXT: xori $2, $4, 4
448;
449; MM32R6-LABEL: xor_i8_4:
450; MM32R6: # %bb.0: # %entry
451; MM32R6-NEXT: xori $2, $4, 4
452; MM32R6-NEXT: jrc $ra
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]453entry:
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]454 %r = xor i8 4, %b
455 ret i8 %r
456}
457
458define signext i16 @xor_i16_4(i16 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]459; MIPS-LABEL: xor_i16_4:
460; MIPS: # %bb.0: # %entry
461; MIPS-NEXT: jr $ra
462; MIPS-NEXT: xori $2, $4, 4
463;
464; MIPS32R2-LABEL: xor_i16_4:
465; MIPS32R2: # %bb.0: # %entry
466; MIPS32R2-NEXT: jr $ra
467; MIPS32R2-NEXT: xori $2, $4, 4
468;
469; MIPS32R6-LABEL: xor_i16_4:
470; MIPS32R6: # %bb.0: # %entry
471; MIPS32R6-NEXT: jr $ra
472; MIPS32R6-NEXT: xori $2, $4, 4
473;
474; MIPS64-LABEL: xor_i16_4:
475; MIPS64: # %bb.0: # %entry
476; MIPS64-NEXT: jr $ra
477; MIPS64-NEXT: xori $2, $4, 4
478;
479; MIPS64R2-LABEL: xor_i16_4:
480; MIPS64R2: # %bb.0: # %entry
481; MIPS64R2-NEXT: jr $ra
482; MIPS64R2-NEXT: xori $2, $4, 4
483;
484; MIPS64R6-LABEL: xor_i16_4:
485; MIPS64R6: # %bb.0: # %entry
486; MIPS64R6-NEXT: jr $ra
487; MIPS64R6-NEXT: xori $2, $4, 4
488;
489; MM32R3-LABEL: xor_i16_4:
490; MM32R3: # %bb.0: # %entry
491; MM32R3-NEXT: jr $ra
492; MM32R3-NEXT: xori $2, $4, 4
493;
494; MM32R6-LABEL: xor_i16_4:
495; MM32R6: # %bb.0: # %entry
496; MM32R6-NEXT: xori $2, $4, 4
497; MM32R6-NEXT: jrc $ra
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]498entry:
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]499 %r = xor i16 4, %b
500 ret i16 %r
501}
502
503define signext i32 @xor_i32_4(i32 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]504; MIPS-LABEL: xor_i32_4:
505; MIPS: # %bb.0: # %entry
506; MIPS-NEXT: jr $ra
507; MIPS-NEXT: xori $2, $4, 4
508;
509; MIPS32R2-LABEL: xor_i32_4:
510; MIPS32R2: # %bb.0: # %entry
511; MIPS32R2-NEXT: jr $ra
512; MIPS32R2-NEXT: xori $2, $4, 4
513;
514; MIPS32R6-LABEL: xor_i32_4:
515; MIPS32R6: # %bb.0: # %entry
516; MIPS32R6-NEXT: jr $ra
517; MIPS32R6-NEXT: xori $2, $4, 4
518;
519; MIPS64-LABEL: xor_i32_4:
520; MIPS64: # %bb.0: # %entry
521; MIPS64-NEXT: jr $ra
522; MIPS64-NEXT: xori $2, $4, 4
523;
524; MIPS64R2-LABEL: xor_i32_4:
525; MIPS64R2: # %bb.0: # %entry
526; MIPS64R2-NEXT: jr $ra
527; MIPS64R2-NEXT: xori $2, $4, 4
528;
529; MIPS64R6-LABEL: xor_i32_4:
530; MIPS64R6: # %bb.0: # %entry
531; MIPS64R6-NEXT: jr $ra
532; MIPS64R6-NEXT: xori $2, $4, 4
533;
534; MM32R3-LABEL: xor_i32_4:
535; MM32R3: # %bb.0: # %entry
536; MM32R3-NEXT: jr $ra
537; MM32R3-NEXT: xori $2, $4, 4
538;
539; MM32R6-LABEL: xor_i32_4:
540; MM32R6: # %bb.0: # %entry
541; MM32R6-NEXT: xori $2, $4, 4
542; MM32R6-NEXT: jrc $ra
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]543entry:
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]544 %r = xor i32 4, %b
545 ret i32 %r
546}
547
548define signext i64 @xor_i64_4(i64 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]549; MIPS-LABEL: xor_i64_4:
550; MIPS: # %bb.0: # %entry
551; MIPS-NEXT: xori $3, $5, 4
552; MIPS-NEXT: jr $ra
553; MIPS-NEXT: move $2, $4
554;
555; MIPS32R2-LABEL: xor_i64_4:
556; MIPS32R2: # %bb.0: # %entry
557; MIPS32R2-NEXT: xori $3, $5, 4
558; MIPS32R2-NEXT: jr $ra
559; MIPS32R2-NEXT: move $2, $4
560;
561; MIPS32R6-LABEL: xor_i64_4:
562; MIPS32R6: # %bb.0: # %entry
563; MIPS32R6-NEXT: xori $3, $5, 4
564; MIPS32R6-NEXT: jr $ra
565; MIPS32R6-NEXT: move $2, $4
566;
567; MIPS64-LABEL: xor_i64_4:
568; MIPS64: # %bb.0: # %entry
569; MIPS64-NEXT: jr $ra
570; MIPS64-NEXT: xori $2, $4, 4
571;
572; MIPS64R2-LABEL: xor_i64_4:
573; MIPS64R2: # %bb.0: # %entry
574; MIPS64R2-NEXT: jr $ra
575; MIPS64R2-NEXT: xori $2, $4, 4
576;
577; MIPS64R6-LABEL: xor_i64_4:
578; MIPS64R6: # %bb.0: # %entry
579; MIPS64R6-NEXT: jr $ra
580; MIPS64R6-NEXT: xori $2, $4, 4
581;
582; MM32R3-LABEL: xor_i64_4:
583; MM32R3: # %bb.0: # %entry
584; MM32R3-NEXT: xori $3, $5, 4
585; MM32R3-NEXT: move $2, $4
586; MM32R3-NEXT: jrc $ra
587;
588; MM32R6-LABEL: xor_i64_4:
589; MM32R6: # %bb.0: # %entry
590; MM32R6-NEXT: xori $3, $5, 4
591; MM32R6-NEXT: move $2, $4
592; MM32R6-NEXT: jrc $ra
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]593entry:
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]594 %r = xor i64 4, %b
595 ret i64 %r
596}
597
598define signext i128 @xor_i128_4(i128 signext %b) {
Simon Dardis12645282017-12-14 16:42:04 +0000[diff] [blame]599; MIPS-LABEL: xor_i128_4:
600; MIPS: # %bb.0: # %entry
601; MIPS-NEXT: xori $1, $7, 4
602; MIPS-NEXT: move $2, $4
603; MIPS-NEXT: move $3, $5
604; MIPS-NEXT: move $4, $6
605; MIPS-NEXT: jr $ra
606; MIPS-NEXT: move $5, $1
607;
608; MIPS32R2-LABEL: xor_i128_4:
609; MIPS32R2: # %bb.0: # %entry
610; MIPS32R2-NEXT: xori $1, $7, 4
611; MIPS32R2-NEXT: move $2, $4
612; MIPS32R2-NEXT: move $3, $5
613; MIPS32R2-NEXT: move $4, $6
614; MIPS32R2-NEXT: jr $ra
615; MIPS32R2-NEXT: move $5, $1
616;
617; MIPS32R6-LABEL: xor_i128_4:
618; MIPS32R6: # %bb.0: # %entry
619; MIPS32R6-NEXT: xori $1, $7, 4
620; MIPS32R6-NEXT: move $2, $4
621; MIPS32R6-NEXT: move $3, $5
622; MIPS32R6-NEXT: move $4, $6
623; MIPS32R6-NEXT: jr $ra
624; MIPS32R6-NEXT: move $5, $1
625;
626; MIPS64-LABEL: xor_i128_4:
627; MIPS64: # %bb.0: # %entry
628; MIPS64-NEXT: xori $3, $5, 4
629; MIPS64-NEXT: jr $ra
630; MIPS64-NEXT: move $2, $4
631;
632; MIPS64R2-LABEL: xor_i128_4:
633; MIPS64R2: # %bb.0: # %entry
634; MIPS64R2-NEXT: xori $3, $5, 4
635; MIPS64R2-NEXT: jr $ra
636; MIPS64R2-NEXT: move $2, $4
637;
638; MIPS64R6-LABEL: xor_i128_4:
639; MIPS64R6: # %bb.0: # %entry
640; MIPS64R6-NEXT: xori $3, $5, 4
641; MIPS64R6-NEXT: jr $ra
642; MIPS64R6-NEXT: move $2, $4
643;
644; MM32R3-LABEL: xor_i128_4:
645; MM32R3: # %bb.0: # %entry
646; MM32R3-NEXT: xori $1, $7, 4
647; MM32R3-NEXT: move $2, $4
648; MM32R3-NEXT: move $3, $5
649; MM32R3-NEXT: move $4, $6
650; MM32R3-NEXT: move $5, $1
651; MM32R3-NEXT: jrc $ra
652;
653; MM32R6-LABEL: xor_i128_4:
654; MM32R6: # %bb.0: # %entry
655; MM32R6-NEXT: xori $1, $7, 4
656; MM32R6-NEXT: move $2, $4
657; MM32R6-NEXT: move $3, $5
658; MM32R6-NEXT: move $4, $6
659; MM32R6-NEXT: move $5, $1
660; MM32R6-NEXT: jrc $ra
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]661entry:
Zlatko Buljand2ed9c62016-06-15 07:46:24 +0000[diff] [blame]662 %r = xor i128 4, %b
663 ret i128 %r
664}