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Joerg Sonnenbergerdde27002014-01-30 18:41:32 +00001/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===//
Stephen Canon5abb5c12011-03-18 16:35:02 +00002 *
3 * The LLVM Compiler Infrastructure
4 *
5 * This file is dual licensed under the MIT and the University of Illinois Open
6 * Source Licenses. See LICENSE.TXT for details.
7 *
8 *===----------------------------------------------------------------------===//
9 *
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000010 * This file implements the __udivsi3 (32-bit unsigned integer divide)
11 * function for the ARM 32-bit architecture.
Stephen Canon5abb5c12011-03-18 16:35:02 +000012 *
13 *===----------------------------------------------------------------------===*/
14
15#include "../assembly.h"
16
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000017 .syntax unified
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000018 .text
Saleem Abdulrasool8f2efc32014-06-16 16:36:25 +000019
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000020#if __ARM_ARCH_ISA_THUMB == 2
21 .thumb
22#endif
23
24#if __ARM_ARCH_ISA_THUMB == 2
25#define IT(cond) it cond
26#define ITT(cond) itt cond
27#else
28#define IT(cond)
29#define ITT(cond)
30#endif
31
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000032 .p2align 2
Anton Korobeynikov75e3c192011-04-19 17:51:24 +000033DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3)
Stephen Canon5abb5c12011-03-18 16:35:02 +000034DEFINE_COMPILERRT_FUNCTION(__udivsi3)
Stephen Hines7633afc2013-10-25 06:26:44 +000035#if __ARM_ARCH_EXT_IDIV__
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000036 tst r1, r1
37 beq LOCAL_LABEL(divby0)
38 mov r3, r0
39 udiv r0, r3, r1
40 mls r1, r0, r1, r3
Bob Wilsona4cefbd2012-09-29 23:37:01 +000041 bx lr
Bob Wilsona4cefbd2012-09-29 23:37:01 +000042#else
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000043 cmp r1, #1
44 bcc LOCAL_LABEL(divby0)
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000045 IT(eq)
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000046 JMPc(lr, eq)
47 cmp r0, r1
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000048 ITT(cc)
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000049 movcc r0, #0
50 JMPc(lr, cc)
51 /*
52 * Implement division using binary long division algorithm.
53 *
54 * r0 is the numerator, r1 the denominator.
55 *
56 * The code before JMP computes the correct shift I, so that
57 * r0 and (r1 << I) have the highest bit set in the same position.
58 * At the time of JMP, ip := .Ldiv0block - 12 * I.
59 * This depends on the fixed instruction size of block.
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000060 * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000061 *
62 * block(shift) implements the test-and-update-quotient core.
63 * It assumes (r0 << shift) can be computed without overflow and
64 * that (r0 << shift) < 2 * r1. The quotient is stored in r3.
65 */
Stephen Canon5abb5c12011-03-18 16:35:02 +000066
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000067# ifdef __ARM_FEATURE_CLZ
68 clz ip, r0
69 clz r3, r1
70 /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */
71 sub r3, r3, ip
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000072# if __ARM_ARCH_ISA_THUMB == 2
73 adr ip, LOCAL_LABEL(div0block) + 1
74 sub ip, ip, r3, lsl #1
75# else
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +000076 adr ip, LOCAL_LABEL(div0block)
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000077# endif
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000078 sub ip, ip, r3, lsl #2
79 sub ip, ip, r3, lsl #3
80 mov r3, #0
81 bx ip
82# else
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +000083# if __ARM_ARCH_ISA_THUMB == 2
84# error THUMB mode requires CLZ or UDIV
85# endif
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000086 mov r2, r0
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +000087 adr ip, LOCAL_LABEL(div0block)
Stephen Canon5abb5c12011-03-18 16:35:02 +000088
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000089 lsr r3, r2, #16
90 cmp r3, r1
91 movhs r2, r3
92 subhs ip, ip, #(16 * 12)
Stephen Canon5abb5c12011-03-18 16:35:02 +000093
Joerg Sonnenberger59611a82014-01-24 13:43:35 +000094 lsr r3, r2, #8
95 cmp r3, r1
96 movhs r2, r3
97 subhs ip, ip, #(8 * 12)
98
99 lsr r3, r2, #4
100 cmp r3, r1
101 movhs r2, r3
102 subhs ip, #(4 * 12)
103
104 lsr r3, r2, #2
105 cmp r3, r1
106 movhs r2, r3
107 subhs ip, ip, #(2 * 12)
108
109 /* Last block, no need to update r2 or r3. */
110 cmp r1, r2, lsr #1
111 subls ip, ip, #(1 * 12)
112
113 mov r3, #0
114
115 JMP(ip)
116# endif
117
118#define IMM #
119
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +0000120#define block(shift) \
121 cmp r0, r1, lsl IMM shift; \
Joerg Sonnenberger9720fcf2014-07-20 20:53:37 +0000122 ITT(hs); \
123 addhs.w r3, r3, IMM (1 << shift); \
124 subhs.w r0, r0, r1, lsl IMM shift
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000125
126 block(31)
127 block(30)
128 block(29)
129 block(28)
130 block(27)
131 block(26)
132 block(25)
133 block(24)
134 block(23)
135 block(22)
136 block(21)
137 block(20)
138 block(19)
139 block(18)
140 block(17)
141 block(16)
142 block(15)
143 block(14)
144 block(13)
145 block(12)
146 block(11)
147 block(10)
148 block(9)
149 block(8)
150 block(7)
151 block(6)
152 block(5)
153 block(4)
154 block(3)
155 block(2)
156 block(1)
Joerg Sonnenberger8f6cf702014-07-20 20:00:26 +0000157LOCAL_LABEL(div0block):
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000158 block(0)
159
160 mov r0, r3
161 JMP(lr)
162#endif /* __ARM_ARCH_EXT_IDIV__ */
163
164LOCAL_LABEL(divby0):
165 mov r0, #0
166#ifdef __ARM_EABI__
167 b __aeabi_idiv0
168#else
169 JMP(lr)
Bob Wilsona4cefbd2012-09-29 23:37:01 +0000170#endif
Joerg Sonnenberger59611a82014-01-24 13:43:35 +0000171
172END_COMPILERRT_FUNCTION(__udivsi3)