Simon Pilgrim | 9b7aaaf | 2016-03-14 00:18:26 +0000 | [diff] [blame^] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s |
| 3 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s |
| 4 | |
| 5 | declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone |
| 6 | declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x double>, i8) nounwind readnone |
| 7 | |
| 8 | declare <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone |
| 9 | declare <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float>, <8 x float>, <8 x float>, i8) nounwind readnone |
| 10 | |
| 11 | declare <16 x i8> @llvm.x86.xop.vpperm(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone |
| 12 | |
| 13 | define <16 x i8> @combine_vpperm_identity(<16 x i8> %a0, <16 x i8> %a1) { |
| 14 | ; CHECK-LABEL: combine_vpperm_identity: |
| 15 | ; CHECK: # BB#0: |
| 16 | ; CHECK-NEXT: vpperm {{.*}}(%rip), %xmm1, %xmm0, %xmm0 |
| 17 | ; CHECK-NEXT: vpperm {{.*}}(%rip), %xmm0, %xmm0, %xmm0 |
| 18 | ; CHECK-NEXT: retq |
| 19 | %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16>) |
| 20 | %res1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res0, <16 x i8> undef, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) |
| 21 | ret <16 x i8> %res1 |
| 22 | } |
| 23 | |
| 24 | define <16 x i8> @combine_vpperm_as_unpckhwd(<16 x i8> %a0, <16 x i8> %a1) { |
| 25 | ; CHECK-LABEL: combine_vpperm_as_unpckhwd: |
| 26 | ; CHECK: # BB#0: |
| 27 | ; CHECK-NEXT: vpperm {{.*}}(%rip), %xmm0, %xmm0, %xmm0 |
| 28 | ; CHECK-NEXT: retq |
| 29 | %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 8, i8 24, i8 9, i8 25, i8 10, i8 26, i8 11, i8 27, i8 12, i8 28, i8 13, i8 29, i8 14, i8 30, i8 15, i8 31>) |
| 30 | ret <16 x i8> %res0 |
| 31 | } |