blob: 94b745437bd354347ef49f271c477e28a7268880 [file] [log] [blame]
Tim Northover00ed9962014-03-29 10:18:08 +00001; RUN: llc -march=arm64 -enable-no-nans-fp-math < %s | FileCheck %s
2
3define double @test_direct(float %in) #1 {
Tim Northover55b3e222014-05-10 07:37:50 +00004; CHECK-LABEL: test_direct:
Tim Northover00ed9962014-03-29 10:18:08 +00005 %cmp = fcmp olt float %in, 0.000000e+00
6 %longer = fpext float %in to double
7 %val = select i1 %cmp, double 0.000000e+00, double %longer
8 ret double %val
9
10; CHECK: fmax
11}
12
13define double @test_cross(float %in) #1 {
Tim Northover55b3e222014-05-10 07:37:50 +000014; CHECK-LABEL: test_cross:
Tim Northover00ed9962014-03-29 10:18:08 +000015 %cmp = fcmp olt float %in, 0.000000e+00
16 %longer = fpext float %in to double
17 %val = select i1 %cmp, double %longer, double 0.000000e+00
18 ret double %val
19
20; CHECK: fmin
21}
Tim Northover55b3e222014-05-10 07:37:50 +000022
23; This isn't a min or a max, but passes the first condition for swapping the
24; results. Make sure they're put back before we resort to the normal fcsel.
25define float @test_cross_fail(float %lhs, float %rhs) {
26; CHECK-LABEL: test_cross_fail:
27 %tst = fcmp une float %lhs, %rhs
28 %res = select i1 %tst, float %rhs, float %lhs
29 ret float %res
30
31 ; The register allocator would have to decide to be deliberately obtuse before
32 ; other register were used.
33; CHECK: fcsel s0, s1, s0, ne
34}