| Jyotsna Verma | 89c8482 | 2013-04-23 19:15:55 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s |
| 2 | ; Make sure that the assembler mapped compare instructions are correctly generated. |
| 3 | |
| 4 | @c = common global i32 0, align 4 |
| 5 | |
| 6 | define i32 @test1(i32 %a, i32 %b) nounwind { |
| 7 | ; CHECK-NOT: cmp.ge |
| 8 | ; CHECK: cmp.gt |
| 9 | entry: |
| 10 | %cmp = icmp slt i32 %a, 100 |
| 11 | br i1 %cmp, label %if.then, label %entry.if.end_crit_edge |
| 12 | |
| 13 | entry.if.end_crit_edge: |
| 14 | %.pre = load i32* @c, align 4 |
| 15 | br label %if.end |
| 16 | |
| 17 | if.then: |
| 18 | %sub = add nsw i32 %a, -10 |
| 19 | store i32 %sub, i32* @c, align 4 |
| 20 | br label %if.end |
| 21 | |
| 22 | if.end: |
| 23 | %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] |
| 24 | ret i32 %0 |
| 25 | } |
| 26 | |
| 27 | define i32 @test2(i32 %a, i32 %b) nounwind { |
| 28 | ; CHECK-NOT: cmp.lt |
| 29 | ; CHECK: cmp.gt |
| 30 | entry: |
| 31 | %cmp = icmp sge i32 %a, %b |
| 32 | br i1 %cmp, label %entry.if.end_crit_edge, label %if.then |
| 33 | |
| 34 | entry.if.end_crit_edge: |
| 35 | %.pre = load i32* @c, align 4 |
| 36 | br label %if.end |
| 37 | |
| 38 | if.then: |
| 39 | %sub = add nsw i32 %a, -10 |
| 40 | store i32 %sub, i32* @c, align 4 |
| 41 | br label %if.end |
| 42 | |
| 43 | if.end: |
| 44 | %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] |
| 45 | ret i32 %0 |
| 46 | } |
| 47 | |
| 48 | define i32 @test4(i32 %a, i32 %b) nounwind { |
| 49 | ; CHECK-NOT: cmp.ltu |
| 50 | ; CHECK: cmp.gtu |
| 51 | entry: |
| 52 | %cmp = icmp uge i32 %a, %b |
| 53 | br i1 %cmp, label %entry.if.end_crit_edge, label %if.then |
| 54 | |
| 55 | entry.if.end_crit_edge: |
| 56 | %.pre = load i32* @c, align 4 |
| 57 | br label %if.end |
| 58 | |
| 59 | if.then: |
| 60 | %sub = add i32 %a, -10 |
| 61 | store i32 %sub, i32* @c, align 4 |
| 62 | br label %if.end |
| 63 | |
| 64 | if.end: |
| 65 | %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] |
| 66 | ret i32 %0 |
| 67 | } |
| 68 | |
| 69 | define i32 @test5(i32 %a, i32 %b) nounwind { |
| 70 | ; CHECK: cmp.gtu |
| 71 | entry: |
| 72 | %cmp = icmp uge i32 %a, 29999 |
| 73 | br i1 %cmp, label %if.then, label %entry.if.end_crit_edge |
| 74 | |
| 75 | entry.if.end_crit_edge: |
| 76 | %.pre = load i32* @c, align 4 |
| 77 | br label %if.end |
| 78 | |
| 79 | if.then: |
| 80 | %sub = add i32 %a, -10 |
| 81 | store i32 %sub, i32* @c, align 4 |
| 82 | br label %if.end |
| 83 | |
| 84 | if.end: |
| 85 | %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] |
| 86 | ret i32 %0 |
| 87 | } |