Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 9e3577ff44fe5360c72fad02fbe931977f9235fb / . / llvm / test / CodeGen / SystemZ / atomicrmw-nand-04.ll
blob: 0c857d97fe83c2644aef9d5f578c2f83a6449e6c [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame^]1; Test 64-bit atomic NANDs.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check NANDs of a variable.
6define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
7; CHECK: f1:
8; CHECK: lg %r2, 0(%r3)
9; CHECK: [[LABEL:\.[^:]*]]:
10; CHECK: lgr %r0, %r2
11; CHECK: ngr %r0, %r4
12; CHECK: lcgr %r0, %r0
13; CHECK: aghi %r0, -1
14; CHECK: csg %r2, %r0, 0(%r3)
15; CHECK: j{{g?}}lh [[LABEL]]
16; CHECK: br %r14
17 %res = atomicrmw nand i64 *%src, i64 %b seq_cst
18 ret i64 %res
19}
20
21; Check NANDs of 1, which must be done using a register.
22define i64 @f2(i64 %dummy, i64 *%src) {
23; CHECK: f2:
24; CHECK: ngr
25; CHECK: br %r14
26 %res = atomicrmw nand i64 *%src, i64 1 seq_cst
27 ret i64 %res
28}
29
30; Check the low end of the NIHF range.
31define i64 @f3(i64 %dummy, i64 *%src) {
32; CHECK: f3:
33; CHECK: lg %r2, 0(%r3)
34; CHECK: [[LABEL:\.[^:]*]]:
35; CHECK: lgr %r0, %r2
36; CHECK: nihf %r0, 0
37; CHECK: lcgr %r0, %r0
38; CHECK: aghi %r0, -1
39; CHECK: csg %r2, %r0, 0(%r3)
40; CHECK: j{{g?}}lh [[LABEL]]
41; CHECK: br %r14
42 %res = atomicrmw nand i64 *%src, i64 4294967295 seq_cst
43 ret i64 %res
44}
45
46; Check the next value up, which must use a register.
47define i64 @f4(i64 %dummy, i64 *%src) {
48; CHECK: f4:
49; CHECK: ngr
50; CHECK: br %r14
51 %res = atomicrmw nand i64 *%src, i64 4294967296 seq_cst
52 ret i64 %res
53}
54
55; Check the low end of the NIHH range.
56define i64 @f5(i64 %dummy, i64 *%src) {
57; CHECK: f5:
58; CHECK: nihh %r0, 0
59; CHECK: lcgr %r0, %r0
60; CHECK: aghi %r0, -1
61; CHECK: br %r14
62 %res = atomicrmw nand i64 *%src, i64 281474976710655 seq_cst
63 ret i64 %res
64}
65
66; Check the next value up, which must use a register.
67define i64 @f6(i64 %dummy, i64 *%src) {
68; CHECK: f6:
69; CHECK: ngr
70; CHECK: br %r14
71 %res = atomicrmw nand i64 *%src, i64 281474976710656 seq_cst
72 ret i64 %res
73}
74
75; Check the highest useful NILL value.
76define i64 @f7(i64 %dummy, i64 *%src) {
77; CHECK: f7:
78; CHECK: nill %r0, 65534
79; CHECK: lcgr %r0, %r0
80; CHECK: aghi %r0, -1
81; CHECK: br %r14
82 %res = atomicrmw nand i64 *%src, i64 -2 seq_cst
83 ret i64 %res
84}
85
86; Check the low end of the NILL range.
87define i64 @f8(i64 %dummy, i64 *%src) {
88; CHECK: f8:
89; CHECK: nill %r0, 0
90; CHECK: lcgr %r0, %r0
91; CHECK: aghi %r0, -1
92; CHECK: br %r14
93 %res = atomicrmw nand i64 *%src, i64 -65536 seq_cst
94 ret i64 %res
95}
96
97; Check the highest useful NILH value, which is one less than the above.
98define i64 @f9(i64 %dummy, i64 *%src) {
99; CHECK: f9:
100; CHECK: nilh %r0, 65534
101; CHECK: lcgr %r0, %r0
102; CHECK: aghi %r0, -1
103; CHECK: br %r14
104 %res = atomicrmw nand i64 *%src, i64 -65537 seq_cst
105 ret i64 %res
106}
107
108; Check the highest useful NILF value, which is one less than the above.
109define i64 @f10(i64 %dummy, i64 *%src) {
110; CHECK: f10:
111; CHECK: nilf %r0, 4294901758
112; CHECK: lcgr %r0, %r0
113; CHECK: aghi %r0, -1
114; CHECK: br %r14
115 %res = atomicrmw nand i64 *%src, i64 -65538 seq_cst
116 ret i64 %res
117}
118
119; Check the low end of the NILH range.
120define i64 @f11(i64 %dummy, i64 *%src) {
121; CHECK: f11:
122; CHECK: nilh %r0, 0
123; CHECK: lcgr %r0, %r0
124; CHECK: aghi %r0, -1
125; CHECK: br %r14
126 %res = atomicrmw nand i64 *%src, i64 -4294901761 seq_cst
127 ret i64 %res
128}
129
130; Check the low end of the NILF range.
131define i64 @f12(i64 %dummy, i64 *%src) {
132; CHECK: f12:
133; CHECK: nilf %r0, 0
134; CHECK: lcgr %r0, %r0
135; CHECK: aghi %r0, -1
136; CHECK: br %r14
137 %res = atomicrmw nand i64 *%src, i64 -4294967296 seq_cst
138 ret i64 %res
139}
140
141; Check the highest useful NIHL value, which is one less than the above.
142define i64 @f13(i64 %dummy, i64 *%src) {
143; CHECK: f13:
144; CHECK: nihl %r0, 65534
145; CHECK: lcgr %r0, %r0
146; CHECK: aghi %r0, -1
147; CHECK: br %r14
148 %res = atomicrmw nand i64 *%src, i64 -4294967297 seq_cst
149 ret i64 %res
150}
151
152; Check the low end of the NIHL range.
153define i64 @f14(i64 %dummy, i64 *%src) {
154; CHECK: f14:
155; CHECK: nihl %r0, 0
156; CHECK: lcgr %r0, %r0
157; CHECK: aghi %r0, -1
158; CHECK: br %r14
159 %res = atomicrmw nand i64 *%src, i64 -281470681743361 seq_cst
160 ret i64 %res
161}
162
163; Check the highest useful NIHH value, which is 1<<32 less than the above.
164define i64 @f15(i64 %dummy, i64 *%src) {
165; CHECK: f15:
166; CHECK: nihh %r0, 65534
167; CHECK: lcgr %r0, %r0
168; CHECK: aghi %r0, -1
169; CHECK: br %r14
170 %res = atomicrmw nand i64 *%src, i64 -281474976710657 seq_cst
171 ret i64 %res
172}
173
174; Check the highest useful NIHF value, which is 1<<32 less than the above.
175define i64 @f16(i64 %dummy, i64 *%src) {
176; CHECK: f16:
177; CHECK: nihf %r0, 4294901758
178; CHECK: lcgr %r0, %r0
179; CHECK: aghi %r0, -1
180; CHECK: br %r14
181 %res = atomicrmw nand i64 *%src, i64 -281479271677953 seq_cst
182 ret i64 %res
183}