blob: 72e90d1fffd1c8006d2b62a81c21ec2546f7a25b [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +00001; Test 64-bit floating-point loads.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Test the low end of the LD range.
6define double @f1(double *%src) {
7; CHECK: f1:
8; CHECK: ld %f0, 0(%r2)
9; CHECK: br %r14
10 %val = load double *%src
11 ret double %val
12}
13
14; Test the high end of the LD range.
15define double @f2(double *%src) {
16; CHECK: f2:
17; CHECK: ld %f0, 4088(%r2)
18; CHECK: br %r14
19 %ptr = getelementptr double *%src, i64 511
20 %val = load double *%ptr
21 ret double %val
22}
23
24; Check the next doubleword up, which should use LDY instead of LD.
25define double @f3(double *%src) {
26; CHECK: f3:
27; CHECK: ldy %f0, 4096(%r2)
28; CHECK: br %r14
29 %ptr = getelementptr double *%src, i64 512
30 %val = load double *%ptr
31 ret double %val
32}
33
34; Check the high end of the aligned LDY range.
35define double @f4(double *%src) {
36; CHECK: f4:
37; CHECK: ldy %f0, 524280(%r2)
38; CHECK: br %r14
39 %ptr = getelementptr double *%src, i64 65535
40 %val = load double *%ptr
41 ret double %val
42}
43
44; Check the next doubleword up, which needs separate address logic.
45; Other sequences besides this one would be OK.
46define double @f5(double *%src) {
47; CHECK: f5:
48; CHECK: agfi %r2, 524288
49; CHECK: ld %f0, 0(%r2)
50; CHECK: br %r14
51 %ptr = getelementptr double *%src, i64 65536
52 %val = load double *%ptr
53 ret double %val
54}
55
56; Check the high end of the negative aligned LDY range.
57define double @f6(double *%src) {
58; CHECK: f6:
59; CHECK: ldy %f0, -8(%r2)
60; CHECK: br %r14
61 %ptr = getelementptr double *%src, i64 -1
62 %val = load double *%ptr
63 ret double %val
64}
65
66; Check the low end of the LDY range.
67define double @f7(double *%src) {
68; CHECK: f7:
69; CHECK: ldy %f0, -524288(%r2)
70; CHECK: br %r14
71 %ptr = getelementptr double *%src, i64 -65536
72 %val = load double *%ptr
73 ret double %val
74}
75
76; Check the next doubleword down, which needs separate address logic.
77; Other sequences besides this one would be OK.
78define double @f8(double *%src) {
79; CHECK: f8:
80; CHECK: agfi %r2, -524296
81; CHECK: ld %f0, 0(%r2)
82; CHECK: br %r14
83 %ptr = getelementptr double *%src, i64 -65537
84 %val = load double *%ptr
85 ret double %val
86}
87
88; Check that LD allows an index.
89define double @f9(i64 %src, i64 %index) {
90; CHECK: f9:
91; CHECK: ld %f0, 4095({{%r3,%r2|%r2,%r3}})
92; CHECK: br %r14
93 %add1 = add i64 %src, %index
94 %add2 = add i64 %add1, 4095
95 %ptr = inttoptr i64 %add2 to double *
96 %val = load double *%ptr
97 ret double %val
98}
99
100; Check that LDY allows an index.
101define double @f10(i64 %src, i64 %index) {
102; CHECK: f10:
103; CHECK: ldy %f0, 4096({{%r3,%r2|%r2,%r3}})
104; CHECK: br %r14
105 %add1 = add i64 %src, %index
106 %add2 = add i64 %add1, 4096
107 %ptr = inttoptr i64 %add2 to double *
108 %val = load double *%ptr
109 ret double %val
110}