| Ulrich Weigand | 9e3577f | 2013-05-06 16:17:29 +0000 | [diff] [blame^] | 1 | ; Test subtractions of a sign-extended i32 from an i64. |
| 2 | ; |
| 3 | ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s |
| 4 | |
| 5 | ; Check SGFR. |
| 6 | define i64 @f1(i64 %a, i32 %b) { |
| 7 | ; CHECK: f1: |
| 8 | ; CHECK: sgfr %r2, %r3 |
| 9 | ; CHECK: br %r14 |
| 10 | %bext = sext i32 %b to i64 |
| 11 | %sub = sub i64 %a, %bext |
| 12 | ret i64 %sub |
| 13 | } |
| 14 | |
| 15 | ; Check SGF with no displacement. |
| 16 | define i64 @f2(i64 %a, i32 *%src) { |
| 17 | ; CHECK: f2: |
| 18 | ; CHECK: sgf %r2, 0(%r3) |
| 19 | ; CHECK: br %r14 |
| 20 | %b = load i32 *%src |
| 21 | %bext = sext i32 %b to i64 |
| 22 | %sub = sub i64 %a, %bext |
| 23 | ret i64 %sub |
| 24 | } |
| 25 | |
| 26 | ; Check the high end of the aligned SGF range. |
| 27 | define i64 @f3(i64 %a, i32 *%src) { |
| 28 | ; CHECK: f3: |
| 29 | ; CHECK: sgf %r2, 524284(%r3) |
| 30 | ; CHECK: br %r14 |
| 31 | %ptr = getelementptr i32 *%src, i64 131071 |
| 32 | %b = load i32 *%ptr |
| 33 | %bext = sext i32 %b to i64 |
| 34 | %sub = sub i64 %a, %bext |
| 35 | ret i64 %sub |
| 36 | } |
| 37 | |
| 38 | ; Check the next word up, which needs separate address logic. |
| 39 | ; Other sequences besides this one would be OK. |
| 40 | define i64 @f4(i64 %a, i32 *%src) { |
| 41 | ; CHECK: f4: |
| 42 | ; CHECK: agfi %r3, 524288 |
| 43 | ; CHECK: sgf %r2, 0(%r3) |
| 44 | ; CHECK: br %r14 |
| 45 | %ptr = getelementptr i32 *%src, i64 131072 |
| 46 | %b = load i32 *%ptr |
| 47 | %bext = sext i32 %b to i64 |
| 48 | %sub = sub i64 %a, %bext |
| 49 | ret i64 %sub |
| 50 | } |
| 51 | |
| 52 | ; Check the high end of the negative aligned SGF range. |
| 53 | define i64 @f5(i64 %a, i32 *%src) { |
| 54 | ; CHECK: f5: |
| 55 | ; CHECK: sgf %r2, -4(%r3) |
| 56 | ; CHECK: br %r14 |
| 57 | %ptr = getelementptr i32 *%src, i64 -1 |
| 58 | %b = load i32 *%ptr |
| 59 | %bext = sext i32 %b to i64 |
| 60 | %sub = sub i64 %a, %bext |
| 61 | ret i64 %sub |
| 62 | } |
| 63 | |
| 64 | ; Check the low end of the SGF range. |
| 65 | define i64 @f6(i64 %a, i32 *%src) { |
| 66 | ; CHECK: f6: |
| 67 | ; CHECK: sgf %r2, -524288(%r3) |
| 68 | ; CHECK: br %r14 |
| 69 | %ptr = getelementptr i32 *%src, i64 -131072 |
| 70 | %b = load i32 *%ptr |
| 71 | %bext = sext i32 %b to i64 |
| 72 | %sub = sub i64 %a, %bext |
| 73 | ret i64 %sub |
| 74 | } |
| 75 | |
| 76 | ; Check the next word down, which needs separate address logic. |
| 77 | ; Other sequences besides this one would be OK. |
| 78 | define i64 @f7(i64 %a, i32 *%src) { |
| 79 | ; CHECK: f7: |
| 80 | ; CHECK: agfi %r3, -524292 |
| 81 | ; CHECK: sgf %r2, 0(%r3) |
| 82 | ; CHECK: br %r14 |
| 83 | %ptr = getelementptr i32 *%src, i64 -131073 |
| 84 | %b = load i32 *%ptr |
| 85 | %bext = sext i32 %b to i64 |
| 86 | %sub = sub i64 %a, %bext |
| 87 | ret i64 %sub |
| 88 | } |
| 89 | |
| 90 | ; Check that SGF allows an index. |
| 91 | define i64 @f8(i64 %a, i64 %src, i64 %index) { |
| 92 | ; CHECK: f8: |
| 93 | ; CHECK: sgf %r2, 524284({{%r4,%r3|%r3,%r4}}) |
| 94 | ; CHECK: br %r14 |
| 95 | %add1 = add i64 %src, %index |
| 96 | %add2 = add i64 %add1, 524284 |
| 97 | %ptr = inttoptr i64 %add2 to i32 * |
| 98 | %b = load i32 *%ptr |
| 99 | %bext = sext i32 %b to i64 |
| 100 | %sub = sub i64 %a, %bext |
| 101 | ret i64 %sub |
| 102 | } |