Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 1 | //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file implements the AArch64 specific subclass of TargetSubtarget. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "AArch64InstrInfo.h" |
Lang Hames | 8f31f44 | 2014-10-09 18:20:51 +0000 | [diff] [blame] | 15 | #include "AArch64PBQPRegAlloc.h" |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 16 | #include "AArch64Subtarget.h" |
| 17 | #include "llvm/ADT/SmallVector.h" |
| 18 | #include "llvm/CodeGen/MachineScheduler.h" |
| 19 | #include "llvm/IR/GlobalValue.h" |
| 20 | #include "llvm/Support/TargetRegistry.h" |
| 21 | |
| 22 | using namespace llvm; |
| 23 | |
| 24 | #define DEBUG_TYPE "aarch64-subtarget" |
| 25 | |
| 26 | #define GET_SUBTARGETINFO_CTOR |
| 27 | #define GET_SUBTARGETINFO_TARGET_DESC |
| 28 | #include "AArch64GenSubtargetInfo.inc" |
| 29 | |
| 30 | static cl::opt<bool> |
| 31 | EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if " |
| 32 | "converter pass"), cl::init(true), cl::Hidden); |
| 33 | |
Eric Christopher | 7c9d4e0 | 2014-06-11 00:46:34 +0000 | [diff] [blame] | 34 | AArch64Subtarget & |
| 35 | AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) { |
| 36 | // Determine default and user-specified characteristics |
| 37 | |
| 38 | if (CPUString.empty()) |
| 39 | CPUString = "generic"; |
| 40 | |
| 41 | ParseSubtargetFeatures(CPUString, FS); |
| 42 | return *this; |
| 43 | } |
| 44 | |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 45 | AArch64Subtarget::AArch64Subtarget(const std::string &TT, |
| 46 | const std::string &CPU, |
Eric Christopher | f12e1ab | 2014-10-03 00:42:41 +0000 | [diff] [blame] | 47 | const std::string &FS, |
Eric Christopher | a0de253 | 2015-03-18 20:37:30 +0000 | [diff] [blame^] | 48 | const TargetMachine &TM, bool LittleEndian) |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 49 | : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others), |
| 50 | HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false), |
Eric Christopher | 8b77065 | 2015-01-26 19:03:15 +0000 | [diff] [blame] | 51 | HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), |
Eric Christopher | a0de253 | 2015-03-18 20:37:30 +0000 | [diff] [blame^] | 52 | IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(), |
| 53 | InstrInfo(initializeSubtargetDependencies(FS)), |
Eric Christopher | 905f12d | 2015-01-29 00:19:42 +0000 | [diff] [blame] | 54 | TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {} |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 55 | |
| 56 | /// ClassifyGlobalReference - Find the target operand flags that describe |
| 57 | /// how a global value should be referenced for the current subtarget. |
| 58 | unsigned char |
| 59 | AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV, |
| 60 | const TargetMachine &TM) const { |
Rafael Espindola | 246c4fb | 2014-11-01 16:46:18 +0000 | [diff] [blame] | 61 | bool isDecl = GV->isDeclarationForLinker(); |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 62 | |
| 63 | // MachO large model always goes via a GOT, simply to get a single 8-byte |
| 64 | // absolute relocation on all global addresses. |
| 65 | if (TM.getCodeModel() == CodeModel::Large && isTargetMachO()) |
| 66 | return AArch64II::MO_GOT; |
| 67 | |
| 68 | // The small code mode's direct accesses use ADRP, which cannot necessarily |
Asiri Rathnayake | 369c030 | 2014-09-10 13:54:38 +0000 | [diff] [blame] | 69 | // produce the value 0 (if the code is above 4GB). |
| 70 | if (TM.getCodeModel() == CodeModel::Small && |
| 71 | GV->isWeakForLinker() && isDecl) { |
| 72 | // In PIC mode use the GOT, but in absolute mode use a constant pool load. |
| 73 | if (TM.getRelocationModel() == Reloc::Static) |
| 74 | return AArch64II::MO_CONSTPOOL; |
| 75 | else |
| 76 | return AArch64II::MO_GOT; |
| 77 | } |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 78 | |
| 79 | // If symbol visibility is hidden, the extra load is not needed if |
| 80 | // the symbol is definitely defined in the current translation unit. |
| 81 | |
| 82 | // The handling of non-hidden symbols in PIC mode is rather target-dependent: |
| 83 | // + On MachO, if the symbol is defined in this module the GOT can be |
| 84 | // skipped. |
| 85 | // + On ELF, the R_AARCH64_COPY relocation means that even symbols actually |
| 86 | // defined could end up in unexpected places. Use a GOT. |
| 87 | if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) { |
| 88 | if (isTargetMachO()) |
| 89 | return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT |
| 90 | : AArch64II::MO_NO_FLAG; |
| 91 | else |
| 92 | // No need to go through the GOT for local symbols on ELF. |
| 93 | return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT; |
| 94 | } |
| 95 | |
| 96 | return AArch64II::MO_NO_FLAG; |
| 97 | } |
| 98 | |
| 99 | /// This function returns the name of a function which has an interface |
| 100 | /// like the non-standard bzero function, if such a function exists on |
| 101 | /// the current subtarget and it is considered prefereable over |
| 102 | /// memset with zero passed as the second argument. Otherwise it |
| 103 | /// returns null. |
| 104 | const char *AArch64Subtarget::getBZeroEntry() const { |
| 105 | // Prefer bzero on Darwin only. |
| 106 | if(isTargetDarwin()) |
| 107 | return "bzero"; |
| 108 | |
| 109 | return nullptr; |
| 110 | } |
| 111 | |
| 112 | void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy, |
| 113 | MachineInstr *begin, MachineInstr *end, |
| 114 | unsigned NumRegionInstrs) const { |
| 115 | // LNT run (at least on Cyclone) showed reasonably significant gains for |
| 116 | // bi-directional scheduling. 253.perlbmk. |
| 117 | Policy.OnlyTopDown = false; |
| 118 | Policy.OnlyBottomUp = false; |
| 119 | } |
| 120 | |
| 121 | bool AArch64Subtarget::enableEarlyIfConversion() const { |
| 122 | return EnableEarlyIfConvert; |
| 123 | } |
Lang Hames | 8f31f44 | 2014-10-09 18:20:51 +0000 | [diff] [blame] | 124 | |
| 125 | std::unique_ptr<PBQPRAConstraint> |
| 126 | AArch64Subtarget::getCustomPBQPConstraints() const { |
Arnaud A. de Grandmaison | 9b33305 | 2014-10-22 12:40:20 +0000 | [diff] [blame] | 127 | if (!isCortexA57()) |
| 128 | return nullptr; |
| 129 | |
| 130 | return llvm::make_unique<A57ChainingConstraint>(); |
Lang Hames | 8f31f44 | 2014-10-09 18:20:51 +0000 | [diff] [blame] | 131 | } |